From: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
stuart.yoder-3arQi8VN3Tc@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
Date: Mon, 24 Oct 2016 13:46:33 +0800 [thread overview]
Message-ID: <f1d3b4bb-e3ba-3cdf-69d5-46c8487a5a7f@huawei.com> (raw)
In-Reply-To: <20161023120423.GO30578@tiger>
On 2016/10/23 20:04, Shawn Guo wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> QorIQ is a Freescale/NXP specific name, and shouldn't be there.
>
> Shawn
>
Got it, will wait other feedback and fix them together, thanks.
Ding
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>> --
>> 1.9.0
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
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WARNING: multiple messages have this Message-ID (diff)
From: dingtianhong@huawei.com (Ding Tianhong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum
Date: Mon, 24 Oct 2016 13:46:33 +0800 [thread overview]
Message-ID: <f1d3b4bb-e3ba-3cdf-69d5-46c8487a5a7f@huawei.com> (raw)
In-Reply-To: <20161023120423.GO30578@tiger>
On 2016/10/23 20:04, Shawn Guo wrote:
> On Sun, Oct 23, 2016 at 11:21:10AM +0800, Ding Tianhong wrote:
>> This erratum describes a bug in logic outside the core, so MIDR can't be
>> used to identify its presence, and reading an SoC-specific revision
>> register from common arch timer code would be awkward. So, describe it
>> in the device tree.
>>
>> Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
>> ---
>> Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> index ef5fbe9..26bc837 100644
>> --- a/Documentation/devicetree/bindings/arm/arch_timer.txt
>> +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
>> @@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
>> This also affects writes to the tval register, due to the implicit
>> counter read.
>>
>> +- hisilicon,erratum-161x01 : A boolean property. Indicates the presence of
>> + QorIQ erratum 161201, which says that reading the counter is
>
> QorIQ is a Freescale/NXP specific name, and shouldn't be there.
>
> Shawn
>
Got it, will wait other feedback and fix them together, thanks.
Ding
>> + unreliable unless the small range of value is returned by back-to-back reads.
>> + This also affects writes to the tval register, due to the implicit
>> + counter read.
>> +
>> ** Optional properties:
>>
>> - arm,cpu-registers-not-fw-configured : Firmware does not initialize
>> --
>> 1.9.0
>>
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
next prev parent reply other threads:[~2016-10-24 5:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-23 3:21 [PATCH 1/3] arm64: arch_timer: Add device tree binding for hisilicon-161x01 erratum Ding Tianhong
2016-10-23 3:21 ` Ding Tianhong
[not found] ` <962ea92f-870b-e1d0-5bb7-1a6d66c35122-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-10-23 12:04 ` Shawn Guo
2016-10-23 12:04 ` Shawn Guo
2016-10-24 5:46 ` Ding Tianhong [this message]
2016-10-24 5:46 ` Ding Tianhong
2016-10-24 8:36 ` Marc Zyngier
2016-10-24 8:36 ` Marc Zyngier
[not found] ` <3a29c03a-2da1-7bfe-28ff-21dada50ee8d-5wv7dgnIgG8@public.gmane.org>
2016-10-24 8:43 ` Ding Tianhong
2016-10-24 8:43 ` Ding Tianhong
2016-10-24 11:16 ` Mark Rutland
2016-10-24 11:16 ` Mark Rutland
2016-10-24 12:40 ` Ding Tianhong
2016-10-24 12:40 ` Ding Tianhong
[not found] ` <7e839df8-f8f7-3b16-8321-4ff45b6c5884-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-10-24 13:16 ` Mark Rutland
2016-10-24 13:16 ` Mark Rutland
2016-10-24 13:23 ` Ding Tianhong
2016-10-24 13:23 ` Ding Tianhong
[not found] ` <1dcfb21a-7417-282e-f187-425d2c148672-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2016-10-24 13:39 ` Mark Rutland
2016-10-24 13:39 ` Mark Rutland
2016-10-26 2:59 ` Ding Tianhong
2016-10-26 2:59 ` Ding Tianhong
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