[Qemu-devel] [PATCH 0/4] hw/virtio: fix several PCI Express compliance issues

[Qemu-devel] [PATCH 0/4] hw/virtio: fix several PCI Express compliance issues

[Marcel Apfelbaum]

Fix a few issues found while running WHQL tests:

 - Assertion 1F27399E-30B9-44BC-8908-D6E6F3836212: FAILED. Enhanced Capability Header register
   of the PCI Express Enhanced Capabilities Absent Indicator table must be read-only .

   Solved in patch 1/4

 - Assertion 47C39833-84AD-44EA-9723-0695202ADDEA: FAILED. Bit 0 (Correctable Error Reporting Enable)
   in the Device Control register (offset 8h) in the PCI Express Capability table must be read-writable .
 - Assertion 5CBA2A63-A48E-4443-85FA-A7DCD8EA47BC: FAILED. Bit 1 (Non-Fatal Error Reporting Enable)
   in the Device Control register (offset 8h) in the PCI Express Capability table must be read-writable .
 - Assertion 0AB06F7C-59CB-4F9A-8363-B51B1ACAB54F: FAILED. Bit 2 (Fatal Error Reporting Enable)
   in the Device Control register (offset 8h) in the PCI Express Capability table must be read-writable .
 - Assertion E3834E4A-A7BD-410C-9A61-FA91770D2A71: FAILED. Bit 3 (Unsupported Request Reporting Enable)
   in the Device Control register (offset 8h) in the PCI Express Capability table must be read-writable 

   Solved in patch 2/4

 - Assertion 1587DC0B-FE59-494E-85B5-C2A59D0CC098: FAILED. Bit 6 (Common Clock Configuration)
   in the Link Control register (offset 10h) in the PCI Express Capability table must be read-writable .
 - Assertion 13DD25A3-07E4-4477-BE0F-2273BBB32174: FAILED. Bit 7 (Extended Synch) in the Link Control
   register (offset 10h) in the PCI Express Capability table must be read-writable .

  Solved in patch 3/4

  - AM Assertion 06779BD9-0C35-4CA1-9EB3-96E7DA9A74F8: FAILED. Bit range 1:0 (PowerState)in
    the Power Management Control/Status register (offset 4h) in the Power Management Capability table is 0h.
    It must be 3h after a supported D3 transition. 

Thanks,
Marcel

Marcel Apfelbaum (4):
  hw/pcie: fix Extended Configuration Space for devices with no Extended
    Capabilities
  hw/virtio: fix error enabling flags in Device Control register
  hw/virtio: fix Link Control Register for PCI Express virtio devices
  hw/virtio: fix Power Management Control Register for PCI Express
    virtio devices

 hw/pci/pcie.c          | 17 +++++++++++++++++
 hw/virtio/virtio-pci.c | 15 +++++++++++++++
 include/hw/pci/pcie.h  |  5 +++++
 3 files changed, 37 insertions(+)

-- 
2.5.5

[Qemu-devel] [PATCH 1/4] hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities

[Marcel Apfelbaum]

Absence of any Extended Capabilities is required to be
indicated by an Extended Capability header with a Capability ID of
0000h, a Capability Version of 0h, and a Next Capability Offset of 000h.

Instead of inserting a 'NULL' capability is simpler to mark the start
of the Extended Configuration Space as read-only to achieve the same
behaviour.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
 hw/pci/pcie.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 99cfb45..62c1def 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -109,6 +109,9 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
                  PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
 
     pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
+
+    /* read-only to behave like a 'NULL' Extended Capability Header */
+    pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
     return pos;
 }
 
-- 
2.5.5

[Qemu-devel] [PATCH 2/4] hw/virtio: fix error enabling flags in Device Control register

[Marcel Apfelbaum]

When the virtio devices are PCI Express, make error-enabling flags
writable to respect the PCIe spec.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
 hw/virtio/virtio-pci.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 21c2b9d..da2124f 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1802,6 +1802,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
          * PCI Power Management Interface Specification.
          */
         pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
+        /* Init error enabling flags */
+        pcie_cap_deverr_init(pci_dev);
     } else {
         /*
          * make future invocations of pci_is_express() return false
@@ -1828,6 +1830,7 @@ static void virtio_pci_reset(DeviceState *qdev)
 {
     VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
     VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
+    PCIDevice *dev = PCI_DEVICE(qdev);
     int i;
 
     virtio_pci_stop_ioeventfd(proxy);
@@ -1837,6 +1840,10 @@ static void virtio_pci_reset(DeviceState *qdev)
     for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
         proxy->vqs[i].enabled = 0;
     }
+
+    if (pci_is_express(dev)) {
+        pcie_cap_deverr_reset(dev);
+    }
 }
 
 static Property virtio_pci_properties[] = {
-- 
2.5.5

[Qemu-devel] [PATCH 3/4] hw/virtio: fix Link Control Register for PCI Express virtio devices

[Marcel Apfelbaum]

Make several Link Control Register flags writable to conform
with the PCI Express spec.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
 hw/pci/pcie.c          | 14 ++++++++++++++
 hw/virtio/virtio-pci.c |  3 +++
 include/hw/pci/pcie.h  |  3 +++
 3 files changed, 20 insertions(+)

diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 62c1def..a596400 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -220,6 +220,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev)
                                  PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE);
 }
 
+void pcie_cap_lnkctl_init(PCIDevice *dev)
+{
+    uint32_t pos = dev->exp.exp_cap;
+    pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL,
+                               PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
+}
+
+void pcie_cap_lnkctl_reset(PCIDevice *dev)
+{
+    uint8_t *lnkctl = dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL;
+    pci_long_test_and_clear_mask(lnkctl,
+                                 PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
+}
+
 static void hotplug_event_update_event_status(PCIDevice *dev)
 {
     uint32_t pos = dev->exp.exp_cap;
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index da2124f..66a5bf3 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1804,6 +1804,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
         pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
         /* Init error enabling flags */
         pcie_cap_deverr_init(pci_dev);
+        /* Init Link Control Register */
+        pcie_cap_lnkctl_init(pci_dev);
     } else {
         /*
          * make future invocations of pci_is_express() return false
@@ -1843,6 +1845,7 @@ static void virtio_pci_reset(DeviceState *qdev)
 
     if (pci_is_express(dev)) {
         pcie_cap_deverr_reset(dev);
+        pcie_cap_lnkctl_reset(dev);
     }
 }
 
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
index 056d25e..7d6611a 100644
--- a/include/hw/pci/pcie.h
+++ b/include/hw/pci/pcie.h
@@ -93,6 +93,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev);
 void pcie_cap_deverr_init(PCIDevice *dev);
 void pcie_cap_deverr_reset(PCIDevice *dev);
 
+void pcie_cap_lnkctl_init(PCIDevice *dev);
+void pcie_cap_lnkctl_reset(PCIDevice *dev);
+
 void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot);
 void pcie_cap_slot_reset(PCIDevice *dev);
 void pcie_cap_slot_write_config(PCIDevice *dev,
-- 
2.5.5

[Qemu-devel] [PATCH 4/4] hw/virtio: fix Power Management Control Register for PCI Express virtio devices

[Marcel Apfelbaum]

Make Power Management State flag writable to conform
with the PCI Express spec.

Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
 hw/virtio/virtio-pci.c | 5 +++++
 include/hw/pci/pcie.h  | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 66a5bf3..7a98078 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1796,12 +1796,15 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
 
         pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
         assert(pos > 0);
+        pci_dev->exp.pm_cap = pos;
 
         /*
          * Indicates that this function complies with revision 1.2 of the
          * PCI Power Management Interface Specification.
          */
         pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
+        pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
+                     PCI_PM_CTRL_STATE_MASK);
         /* Init error enabling flags */
         pcie_cap_deverr_init(pci_dev);
         /* Init Link Control Register */
@@ -1846,6 +1849,8 @@ static void virtio_pci_reset(DeviceState *qdev)
     if (pci_is_express(dev)) {
         pcie_cap_deverr_reset(dev);
         pcie_cap_lnkctl_reset(dev);
+
+        pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
     }
 }
 
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
index 7d6611a..7c9c573 100644
--- a/include/hw/pci/pcie.h
+++ b/include/hw/pci/pcie.h
@@ -63,6 +63,8 @@ typedef enum {
 struct PCIExpressDevice {
     /* Offset of express capability in config space */
     uint8_t exp_cap;
+    /* Offset of Power Management capability in config space */
+    uint8_t pm_cap;
 
     /* SLOT */
     bool hpev_notified; /* Logical AND of conditions for hot plug event.
-- 
2.5.5

Re: [Qemu-devel] [PATCH 2/4] hw/virtio: fix error enabling flags in Device Control register

[Michael S. Tsirkin]

On Wed, Jan 04, 2017 at 09:57:16PM +0200, Marcel Apfelbaum wrote:
> When the virtio devices are PCI Express, make error-enabling flags
> writable to respect the PCIe spec.
> 
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>

If guest writes there, it won't be able to migrate.
So I think this needs a compat flag.

> ---
>  hw/virtio/virtio-pci.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 21c2b9d..da2124f 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1802,6 +1802,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
>           * PCI Power Management Interface Specification.
>           */
>          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
> +        /* Init error enabling flags */
> +        pcie_cap_deverr_init(pci_dev);
>      } else {
>          /*
>           * make future invocations of pci_is_express() return false
> @@ -1828,6 +1830,7 @@ static void virtio_pci_reset(DeviceState *qdev)
>  {
>      VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
>      VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
> +    PCIDevice *dev = PCI_DEVICE(qdev);
>      int i;
>  
>      virtio_pci_stop_ioeventfd(proxy);
> @@ -1837,6 +1840,10 @@ static void virtio_pci_reset(DeviceState *qdev)
>      for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
>          proxy->vqs[i].enabled = 0;
>      }
> +
> +    if (pci_is_express(dev)) {
> +        pcie_cap_deverr_reset(dev);
> +    }
>  }
>  
>  static Property virtio_pci_properties[] = {
> -- 
> 2.5.5

Re: [Qemu-devel] [PATCH 3/4] hw/virtio: fix Link Control Register for PCI Express virtio devices

[Michael S. Tsirkin]

On Wed, Jan 04, 2017 at 09:57:17PM +0200, Marcel Apfelbaum wrote:
> Make several Link Control Register flags writable to conform
> with the PCI Express spec.
> 
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>

Same comment as 2.

> ---
>  hw/pci/pcie.c          | 14 ++++++++++++++
>  hw/virtio/virtio-pci.c |  3 +++
>  include/hw/pci/pcie.h  |  3 +++
>  3 files changed, 20 insertions(+)
> 
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 62c1def..a596400 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -220,6 +220,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev)
>                                   PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE);
>  }
>  
> +void pcie_cap_lnkctl_init(PCIDevice *dev)
> +{
> +    uint32_t pos = dev->exp.exp_cap;
> +    pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL,
> +                               PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
> +}
> +
> +void pcie_cap_lnkctl_reset(PCIDevice *dev)
> +{
> +    uint8_t *lnkctl = dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL;
> +    pci_long_test_and_clear_mask(lnkctl,
> +                                 PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES);
> +}
> +
>  static void hotplug_event_update_event_status(PCIDevice *dev)
>  {
>      uint32_t pos = dev->exp.exp_cap;
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index da2124f..66a5bf3 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1804,6 +1804,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
>          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
>          /* Init error enabling flags */
>          pcie_cap_deverr_init(pci_dev);
> +        /* Init Link Control Register */
> +        pcie_cap_lnkctl_init(pci_dev);
>      } else {
>          /*
>           * make future invocations of pci_is_express() return false
> @@ -1843,6 +1845,7 @@ static void virtio_pci_reset(DeviceState *qdev)
>  
>      if (pci_is_express(dev)) {
>          pcie_cap_deverr_reset(dev);
> +        pcie_cap_lnkctl_reset(dev);
>      }
>  }
>  
> diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
> index 056d25e..7d6611a 100644
> --- a/include/hw/pci/pcie.h
> +++ b/include/hw/pci/pcie.h
> @@ -93,6 +93,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev);
>  void pcie_cap_deverr_init(PCIDevice *dev);
>  void pcie_cap_deverr_reset(PCIDevice *dev);
>  
> +void pcie_cap_lnkctl_init(PCIDevice *dev);
> +void pcie_cap_lnkctl_reset(PCIDevice *dev);
> +
>  void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot);
>  void pcie_cap_slot_reset(PCIDevice *dev);
>  void pcie_cap_slot_write_config(PCIDevice *dev,
> -- 
> 2.5.5

Re: [Qemu-devel] [PATCH 4/4] hw/virtio: fix Power Management Control Register for PCI Express virtio devices

[Michael S. Tsirkin]

On Wed, Jan 04, 2017 at 09:57:18PM +0200, Marcel Apfelbaum wrote:
> Make Power Management State flag writable to conform
> with the PCI Express spec.
> 
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>

Same comment as previously.

> ---
>  hw/virtio/virtio-pci.c | 5 +++++
>  include/hw/pci/pcie.h  | 2 ++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 66a5bf3..7a98078 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1796,12 +1796,15 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
>  
>          pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF);
>          assert(pos > 0);
> +        pci_dev->exp.pm_cap = pos;
>  
>          /*
>           * Indicates that this function complies with revision 1.2 of the
>           * PCI Power Management Interface Specification.
>           */
>          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
> +        pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
> +                     PCI_PM_CTRL_STATE_MASK);
>          /* Init error enabling flags */
>          pcie_cap_deverr_init(pci_dev);
>          /* Init Link Control Register */
> @@ -1846,6 +1849,8 @@ static void virtio_pci_reset(DeviceState *qdev)
>      if (pci_is_express(dev)) {
>          pcie_cap_deverr_reset(dev);
>          pcie_cap_lnkctl_reset(dev);
> +
> +        pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
>      }
>  }
>  
> diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
> index 7d6611a..7c9c573 100644
> --- a/include/hw/pci/pcie.h
> +++ b/include/hw/pci/pcie.h
> @@ -63,6 +63,8 @@ typedef enum {
>  struct PCIExpressDevice {
>      /* Offset of express capability in config space */
>      uint8_t exp_cap;
> +    /* Offset of Power Management capability in config space */
> +    uint8_t pm_cap;
>  
>      /* SLOT */
>      bool hpev_notified; /* Logical AND of conditions for hot plug event.
> -- 
> 2.5.5

Re: [Qemu-devel] [PATCH 1/4] hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities

[Michael S. Tsirkin]

On Wed, Jan 04, 2017 at 09:57:15PM +0200, Marcel Apfelbaum wrote:
> Absence of any Extended Capabilities is required to be
> indicated by an Extended Capability header with a Capability ID of
> 0000h, a Capability Version of 0h, and a Next Capability Offset of 000h.
> 
> Instead of inserting a 'NULL' capability is simpler to mark the start
> of the Extended Configuration Space as read-only to achieve the same
> behaviour.
> 
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>

Kind of hacky and only theoretical - I don't think any guest writes
there - but ok. However I think
1. we should init config to 0 too
2. this needs a compat flag

> ---
>  hw/pci/pcie.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 99cfb45..62c1def 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -109,6 +109,9 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
>                   PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
>  
>      pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
> +
> +    /* read-only to behave like a 'NULL' Extended Capability Header */
> +    pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
>      return pos;
>  }
>  
> -- 
> 2.5.5

Re: [Qemu-devel] [PATCH 2/4] hw/virtio: fix error enabling flags in Device Control register

[Marcel Apfelbaum]

On 01/10/2017 05:07 AM, Michael S. Tsirkin wrote:
> On Wed, Jan 04, 2017 at 09:57:16PM +0200, Marcel Apfelbaum wrote:
>> When the virtio devices are PCI Express, make error-enabling flags
>> writable to respect the PCIe spec.
>>
>> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
>
> If guest writes there, it won't be able to migrate.
> So I think this needs a compat flag.

Hi Michael,
Thanks for the review.

Do you have any suggestion on the compat property name?
Should I use the same property for all patches in this path set,
something like "x-pcie-compliance" or one per issue?

Thanks,
Marcel

>
>> ---
>>  hw/virtio/virtio-pci.c | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
>> index 21c2b9d..da2124f 100644
>> --- a/hw/virtio/virtio-pci.c
>> +++ b/hw/virtio/virtio-pci.c
>> @@ -1802,6 +1802,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
>>           * PCI Power Management Interface Specification.
>>           */
>>          pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
>> +        /* Init error enabling flags */
>> +        pcie_cap_deverr_init(pci_dev);
>>      } else {
>>          /*
>>           * make future invocations of pci_is_express() return false
>> @@ -1828,6 +1830,7 @@ static void virtio_pci_reset(DeviceState *qdev)
>>  {
>>      VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
>>      VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
>> +    PCIDevice *dev = PCI_DEVICE(qdev);
>>      int i;
>>
>>      virtio_pci_stop_ioeventfd(proxy);
>> @@ -1837,6 +1840,10 @@ static void virtio_pci_reset(DeviceState *qdev)
>>      for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
>>          proxy->vqs[i].enabled = 0;
>>      }
>> +
>> +    if (pci_is_express(dev)) {
>> +        pcie_cap_deverr_reset(dev);
>> +    }
>>  }
>>
>>  static Property virtio_pci_properties[] = {
>> --
>> 2.5.5

Re: [Qemu-devel] [PATCH 1/4] hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities

[Marcel Apfelbaum]

On 01/10/2017 05:13 AM, Michael S. Tsirkin wrote:
> On Wed, Jan 04, 2017 at 09:57:15PM +0200, Marcel Apfelbaum wrote:
>> Absence of any Extended Capabilities is required to be
>> indicated by an Extended Capability header with a Capability ID of
>> 0000h, a Capability Version of 0h, and a Next Capability Offset of 000h.
>>
>> Instead of inserting a 'NULL' capability is simpler to mark the start
>> of the Extended Configuration Space as read-only to achieve the same
>> behaviour.
>>
>> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
>
> Kind of hacky and only theoretical - I don't think any guest writes
> there - but ok.

I agree is theoretical, but Windows PCI Hardware Compliance WHQL tests find it.

  However I think
> 1. we should init config to 0 too

What do you mean? Have a 'Null' capability for regular PCI capabilities list?
I'll have a look on the spec to see if is required.

> 2. this needs a compat flag

Sure, I'll add one.

Thanks,
Marcel

>
>> ---
>>  hw/pci/pcie.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
>> index 99cfb45..62c1def 100644
>> --- a/hw/pci/pcie.c
>> +++ b/hw/pci/pcie.c
>> @@ -109,6 +109,9 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
>>                   PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP);
>>
>>      pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB);
>> +
>> +    /* read-only to behave like a 'NULL' Extended Capability Header */
>> +    pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0);
>>      return pos;
>>  }
>>
>> --
>> 2.5.5