[U-Boot] [PATCH v11 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL

[Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>]

Am 05.03.2019 um 17:23 schrieb tien.fong.chee at intel.com:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> After some series of patches to maximise reusable of memory pool, here come
> to result of reasonable size required for whole SDMMC boot working on A10
> SoCDK. Size required come from default max cluster(0x10000) +
> others(0x2000) + additional memory for headroom(0x3000).
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> ---
> 
> changes for v7
> - Added 0x3000 for memory headroom.
> ---
>   include/configs/socfpga_common.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index 4551cb29bc..548b458e78 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -1,6 +1,6 @@
>   /* SPDX-License-Identifier: GPL-2.0+ */
>   /*
> - * Copyright (C) 2012 Altera Corporation <www.altera.com>
> + * Copyright (C) 2012-2019 Altera Corporation <www.altera.com>
>    */
>   #ifndef __CONFIG_SOCFPGA_COMMON_H__
>   #define __CONFIG_SOCFPGA_COMMON_H__
> @@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>   #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>   /* SPL memory allocation configuration, this is for FAT implementation */
>   #ifndef CONFIG_SYS_SPL_MALLOC_START
> -#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
> +#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00015000

This will clash with my series here:
https://patchwork.ozlabs.org/patch/1051451/

Any chance you could test that on A10? I only have a cyclone 5.

Regards,
Simon


>   #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_INIT_RAM_SIZE - \
>   					 CONFIG_SYS_SPL_MALLOC_SIZE + \
>   					 CONFIG_SYS_INIT_RAM_ADDR)
>