[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Bin Meng]

Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
the board. This series fixes a bunch of xHCI driver issues to make it
work on Intel's platform.

Issues identified in the U-Boot xHCI driver are really spec violations,
but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
are quite tolerant with these spec violations, or IOW those IPs don't
respect the xHCI spec. While it comes to Intel platform, it just breaks.

Note xHCI interrupt transfer is still not supported in this series, as
it has been there since the original commit of xHCI support for years.

Tested on Intel MinnowMax board with the following USB devices:
- Dell USB 1.1 keyboard
- Dell USB 2.0 mouse
- Netac USB 2.0 flash disk
- JetFlash USB 3.0 flash disk
- GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
  ethernet chipset connected to one of its downstream port

Testing were performed on both ports (2.0 port and 3.0 port), and both
ports are connected to xHCI (configure MinnowMax to enable xHCI).

Testing results:
- DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
- USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
  both ports
- GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
  and the integrated Realtek USB ethernet chipset enumerated as well.
  USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
  but DELL USB 1.1 keyboard and 2.0 mouse cannot.
- GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
  but the integrated Realtek USB ethernet chipset cannot be enumerated.
  None of devices connected via the hub can be enumerated. U-Boot xHCI
  driver just throws BUG_ON() on the event TRB handling.

This indicates that USB 3.0 hub support in U-Boot is seriously broken.
So far this series tries to fix some of the issues identified, but the
USB 3.0 hub is still not working. This will be left as future work, or
if someone else is interested it to pick up the work.

The USB 3.0 hub work includes: port status translation, USB 3.0 newly
added "Set Hub Depth" request support, xHCI codes update to fill in
hub description fields in the input slot context when issuing commands
to xHC, etc.


Bin Meng (20):
  usb: xhci: Remove incorrect comments for struct xhci_container_ctx
  usb: xhci: Correct command TRB 4th dword initialization
  usb: xhci: Initialize scratchpad buffer array and scratchpad buffers
  usb: xhci: Add input slot context in xhci_set_configuration()
  usb: hub: Update handling connect status/change in usb_scan_port()
  usb: hub: Send correct wValue to get hub descriptor of a USB 3.0 hub
  usb: hub: Revise wLength for 'get port status' request
  usb: hub: Change USB hub descriptor to match USB 3.0 hubs
  usb: hub: Add 3.0 hub port status mask of 2.0 hub
  usb: xhci: Change MAX_HC_PORTS to 255
  usb: xhci: Get rid of CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
  configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards
  usb: ehci: Get rid of CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
  configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards
  usb: cmd: Print actual packet size for super speed devices
  usb: xhci: Convert CONFIG_USB_XHCI_PCI to Kconfig
  x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS
  x86: minnowmax: Add a environment variable for USB power-on delay
  x86: minnowmax: Enable USB xHCI support
  x86: Remove CONFIG_USB_MAX_CONTROLLER_COUNT

 arch/arm/include/asm/ehci-omap.h          |  4 --
 arch/x86/dts/minnowmax.dts                |  3 ++
 board/intel/minnowmax/minnowmax.c         | 53 +++++++++++++++++++
 cmd/usb.c                                 |  7 ++-
 common/usb_hub.c                          | 41 ++++++++++-----
 configs/minnowmax_defconfig               |  1 +
 drivers/usb/emul/sandbox_hub.c            |  7 ++-
 drivers/usb/host/Kconfig                  |  6 +++
 drivers/usb/host/ehci-hcd.c               | 14 +++--
 drivers/usb/host/ehci.h                   |  7 ++-
 drivers/usb/host/xhci-mem.c               | 87 +++++++++++++++++++++++++++++++
 drivers/usb/host/xhci-ring.c              | 11 +++-
 drivers/usb/host/xhci.c                   | 17 +++---
 drivers/usb/host/xhci.h                   | 23 ++++----
 include/configs/MPC8572DS.h               |  1 -
 include/configs/am43xx_evm.h              |  1 -
 include/configs/am57xx_evm.h              |  1 -
 include/configs/cl-som-am57x.h            |  1 -
 include/configs/cm_t43.h                  |  1 -
 include/configs/cm_t54.h                  |  1 -
 include/configs/conga-qeval20-qa3-e3845.h |  3 --
 include/configs/corvus.h                  |  3 --
 include/configs/dfi-bt700.h               |  3 --
 include/configs/dra7xx_evm.h              |  1 -
 include/configs/ds414.h                   |  1 -
 include/configs/duovero.h                 |  2 -
 include/configs/exynos5-common.h          |  3 --
 include/configs/ls1012afrdm.h             |  1 -
 include/configs/ls1012aqds.h              |  1 -
 include/configs/ls1012ardb.h              |  1 -
 include/configs/ls1021aiot.h              |  1 -
 include/configs/ls1021aqds.h              |  1 -
 include/configs/ls1021atwr.h              |  1 -
 include/configs/ls1043aqds.h              |  1 -
 include/configs/ls1043ardb.h              |  1 -
 include/configs/ls1046aqds.h              |  1 -
 include/configs/ls1046ardb.h              |  1 -
 include/configs/ls2080aqds.h              |  1 -
 include/configs/ls2080ardb.h              |  1 -
 include/configs/ma5d4evk.h                |  1 -
 include/configs/mcx.h                     |  1 -
 include/configs/minnowmax.h               |  7 ++-
 include/configs/mvebu_armada-37xx.h       |  9 +---
 include/configs/mvebu_armada-8k.h         |  9 +---
 include/configs/mx35pdk.h                 |  1 -
 include/configs/odroid.h                  |  1 -
 include/configs/omap3_beagle.h            |  1 -
 include/configs/omap3_overo.h             |  1 -
 include/configs/omap4_panda.h             |  2 -
 include/configs/omap5_uevm.h              |  1 -
 include/configs/picosam9g45.h             |  3 --
 include/configs/rk3328_common.h           |  2 -
 include/configs/rk3399_common.h           |  3 --
 include/configs/sama5d2_ptc.h             |  4 --
 include/configs/snapper9g45.h             |  3 --
 include/configs/sunxi-common.h            |  1 -
 include/configs/tam3517-common.h          |  1 -
 include/configs/tao3530.h                 |  1 -
 include/configs/tegra114-common.h         |  1 -
 include/configs/tegra124-common.h         |  1 -
 include/configs/tegra20-common.h          |  1 -
 include/configs/tegra210-common.h         |  1 -
 include/configs/tegra30-common.h          |  1 -
 include/configs/ti_armv7_keystone2.h      |  1 -
 include/configs/uniphier.h                |  3 --
 include/configs/vinco.h                   |  6 ---
 include/configs/x86-common.h              |  2 -
 include/configs/xilinx_zynqmp.h           |  2 -
 include/usb.h                             | 18 +++++--
 include/usb_defs.h                        |  8 ++-
 scripts/config_whitelist.txt              |  2 -
 71 files changed, 259 insertions(+), 155 deletions(-)

-- 
2.9.2

[U-Boot] [PATCH 01/20] usb: xhci: Remove incorrect comments for struct xhci_container_ctx

[Bin Meng]

There is no member called 'dma' in struct xhci_container_ctx. Remove
the comments that mentions it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 2afa386..431afd8 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -482,10 +482,9 @@ struct xhci_protocol_caps {
  * @type: Type of context.  Used to calculated offsets to contained contexts.
  * @size: Size of the context data
  * @bytes: The raw context data given to HW
- * @dma: dma address of the bytes
  *
  * Represents either a Device or Input context.  Holds a pointer to the raw
- * memory used for the context (bytes) and dma address of it (dma).
+ * memory used for the context (bytes).
  */
 struct xhci_container_ctx {
 	unsigned type;
-- 
2.9.2

[U-Boot] [PATCH 02/20] usb: xhci: Correct command TRB 4th dword initialization

[Bin Meng]

In xhci_queue_command(), when the command is not 'reset endpoint',
'stop endpoint' or 'set TR dequeue pointer', endpoint ID should not
be encoded in the TRB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci-ring.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 2675a8f..579e670 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -280,8 +280,15 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id,
 	fields[0] = lower_32_bits(val_64);
 	fields[1] = upper_32_bits(val_64);
 	fields[2] = 0;
-	fields[3] = TRB_TYPE(cmd) | EP_ID_FOR_TRB(ep_index) |
-		    SLOT_ID_FOR_TRB(slot_id) | ctrl->cmd_ring->cycle_state;
+	fields[3] = TRB_TYPE(cmd) | SLOT_ID_FOR_TRB(slot_id) |
+		    ctrl->cmd_ring->cycle_state;
+
+	/*
+	 * Only 'reset endpoint', 'stop endpoint' and 'set TR dequeue pointer'
+	 * commands need endpoint id encoded.
+	 */
+	if (cmd >= TRB_RESET_EP && cmd <= TRB_SET_DEQ)
+		fields[3] |= EP_ID_FOR_TRB(ep_index);
 
 	queue_trb(ctrl, ctrl->cmd_ring, false, fields);
 
-- 
2.9.2

[U-Boot] [PATCH 03/20] usb: xhci: Initialize scratchpad buffer array and scratchpad buffers

[Bin Meng]

The scratchpad buffer array is used to define the locations of
statically allocated memory pages that are available for the
private use of the xHC. The xHCI spec explicitly mentions that
system software shall allocate the scratchpad buffers before
placing the xHC in to Run mode (Run/Stop (R/S) = ‘1’), however
U-Boot is missing this part.

This causes xHC on Intel platform does not respond the very first
'enable slot' command that is given to xHC and the 'enable slot'
command completion event TRB is never generated and xHC seems to
hang forever.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci-mem.c | 87 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/usb/host/xhci.h     | 10 ++++--
 2 files changed, 95 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 62db51d..12e277a 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -96,6 +96,25 @@ static void xhci_ring_free(struct xhci_ring *ring)
 }
 
 /**
+ * Free the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl	host controller data structure
+ * @return	none
+ */
+static void xhci_scratchpad_free(struct xhci_ctrl *ctrl)
+{
+	if (!ctrl->scratchpad)
+		return;
+
+	ctrl->dcbaa->dev_context_ptrs[0] = 0;
+
+	free((void *)(uintptr_t)ctrl->scratchpad->sp_array[0]);
+	free(ctrl->scratchpad->sp_array);
+	free(ctrl->scratchpad);
+	ctrl->scratchpad = NULL;
+}
+
+/**
  * frees the "xhci_container_ctx" pointer passed
  *
  * @param ptr	pointer to "xhci_container_ctx" to be freed
@@ -155,6 +174,7 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
 {
 	xhci_ring_free(ctrl->event_ring);
 	xhci_ring_free(ctrl->cmd_ring);
+	xhci_scratchpad_free(ctrl);
 	xhci_free_virt_devices(ctrl);
 	free(ctrl->erst.entries);
 	free(ctrl->dcbaa);
@@ -320,6 +340,70 @@ struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs)
 }
 
 /**
+ * Set up the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl	host controller data structure
+ * @return	-ENOMEM if buffer allocation fails, 0 on success
+ */
+static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
+{
+	struct xhci_hccr *hccr = ctrl->hccr;
+	struct xhci_hcor *hcor = ctrl->hcor;
+	struct xhci_scratchpad *scratchpad;
+	int num_sp;
+	uint32_t page_size;
+	void *buf;
+	int i;
+
+	num_sp = HCS_MAX_SCRATCHPAD(xhci_readl(&hccr->cr_hcsparams2));
+	if (!num_sp)
+		return 0;
+
+	scratchpad = malloc(sizeof(*scratchpad));
+	if (!scratchpad)
+		goto fail_sp;
+	ctrl->scratchpad = scratchpad;
+
+	scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64));
+	if (!scratchpad->sp_array)
+		goto fail_sp2;
+	ctrl->dcbaa->dev_context_ptrs[0] =
+		cpu_to_le64((uintptr_t)scratchpad->sp_array);
+
+	page_size = xhci_readl(&hcor->or_pagesize) & 0xffff;
+	for (i = 0; i < 16; i++) {
+		if ((0x1 & page_size) != 0)
+			break;
+		page_size = page_size >> 1;
+	}
+	BUG_ON(i == 16);
+
+	page_size = 1 << (i + 12);
+	buf = memalign(page_size, num_sp * page_size);
+	if (!buf)
+		goto fail_sp3;
+	memset(buf, '\0', num_sp * page_size);
+	xhci_flush_cache((uintptr_t)buf, num_sp * page_size);
+
+	for (i = 0; i < num_sp; i++) {
+		uintptr_t ptr = (uintptr_t)buf + i * page_size;
+		scratchpad->sp_array[i] = cpu_to_le64(ptr);
+	}
+
+	return 0;
+
+fail_sp3:
+	free(scratchpad->sp_array);
+
+fail_sp2:
+	free(scratchpad);
+	ctrl->scratchpad = NULL;
+
+fail_sp:
+	return -ENOMEM;
+}
+
+/**
  * Allocates the Container context
  *
  * @param ctrl	Host controller data structure
@@ -499,6 +583,9 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
 
 	xhci_writeq(&ctrl->ir_set->erst_base, val_64);
 
+	/* set up the scratchpad buffer array and scratchpad buffers */
+	xhci_scratchpad_alloc(ctrl);
+
 	/* initializing the virtual devices to NULL */
 	for (i = 0; i < MAX_HC_SLOTS; ++i)
 		ctrl->devs[i] = NULL;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 431afd8..32dd611 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -111,9 +111,10 @@ struct xhci_hccr {
 #define HCS_IST(p)		(((p) >> 0) & 0xf)
 /* bits 4:7, max number of Event Ring segments */
 #define HCS_ERST_MAX(p)		(((p) >> 4) & 0xf)
+/* bits 21:25 Hi 5 bits of Scratchpad buffers SW must allocate for the HW */
 /* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
-/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
-#define HCS_MAX_SCRATCHPAD(p)   (((p) >> 27) & 0x1f)
+/* bits 27:31 Lo 5 bits of Scratchpad buffers SW must allocate for the HW */
+#define HCS_MAX_SCRATCHPAD(p)	((((p) >> 16) & 0x3e0) | (((p) >> 27) & 0x1f))
 
 /* HCSPARAMS3 - hcs_params3 - bitmasks */
 /* bits 0:7, Max U1 to U0 latency for the roothub ports */
@@ -1037,6 +1038,10 @@ struct xhci_erst {
 	unsigned int		erst_size;
 };
 
+struct xhci_scratchpad {
+	u64 *sp_array;
+};
+
 /*
  * Each segment table entry is 4*32bits long.  1K seems like an ok size:
  * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
@@ -1224,6 +1229,7 @@ struct xhci_ctrl {
 	struct xhci_intr_reg *ir_set;
 	struct xhci_erst erst;
 	struct xhci_erst_entry entry[ERST_NUM_SEGS];
+	struct xhci_scratchpad *scratchpad;
 	struct xhci_virt_device *devs[MAX_HC_SLOTS];
 	int rootdev;
 };
-- 
2.9.2

[U-Boot] [PATCH 04/20] usb: xhci: Add input slot context in xhci_set_configuration()

[Bin Meng]

A valid input slot context for a 'configure endpoint' command requires
the 'Context Entries' field to be initialized to the index of the last
valid endpoint context that is defined by the target configuration. We
set up the 'Context Entries' field, but we forget to include the input
slot context in the input control context 'Add Context flags' bitmap.
So xHC will simply ignore input slot context and continue using its own
which contains old information of the device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 3201177..c949000 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -332,8 +332,8 @@ static int xhci_set_configuration(struct usb_device *udev)
 	ifdesc = &udev->config.if_desc[0];
 
 	ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
-	/* Zero the input context control */
-	ctrl_ctx->add_flags = 0;
+	/* Initialize the input context control */
+	ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
 	ctrl_ctx->drop_flags = 0;
 
 	/* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
-- 
2.9.2

[U-Boot] [PATCH 05/20] usb: hub: Update handling connect status/change in usb_scan_port()

[Bin Meng]

It was observed that on Intel MinnowMax board, when xHCI is enabled
in the BayTrail SoC, with a USB 3.0 device connected to the bottom
USB 3.0 port (mapped to xHCI root port #7), its PORTSC register is
always 0x201203 (CCS = 1, CSC = 0). The root cause of such behavior
is unknown yet. Connect status change bit is set on the same port
with a USB 2.0 device (mapped to xHCI port #1, which is a different
port on the root hub).

With current logic in usb_scan_port(), the enumeration process will
abort if it does not detect a connect status change on a hub port.
However since a device connection status is correctly reported, the
enumeration process can still continue.

With this change, USB device connected to the bottom blue port on
MinnowMax board can be enumerated under either SS or HS mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 common/usb_hub.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index ff9cd50..8279e5c 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -408,8 +408,15 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 	portchange = le16_to_cpu(portsts->wPortChange);
 	debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange);
 
-	/* No connection change happened, wait a bit more. */
-	if (!(portchange & USB_PORT_STAT_C_CONNECTION)) {
+	/*
+	 * No connection change happened, wait a bit more.
+	 *
+	 * For some situation, the hub reports no connection change but a
+	 * device is connected to the port (eg: CCS bit is set but CSC is not
+	 * in the PORTSC register of a root hub), ignore such case.
+	 */
+	if (!(portchange & USB_PORT_STAT_C_CONNECTION) &&
+	    !(portstatus & USB_PORT_STAT_CONNECTION)) {
 		if (get_timer(0) >= hub->connect_timeout) {
 			debug("devnum=%d port=%d: timeout\n",
 			      dev->devnum, i + 1);
@@ -421,10 +428,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		return 0;
 	}
 
-	/* Test if the connection came up, and if not exit */
-	if (!(portstatus & USB_PORT_STAT_CONNECTION))
-		return 0;
-
 	/* A new USB device is ready at this point */
 	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
 
-- 
2.9.2

[U-Boot] [PATCH 06/20] usb: hub: Send correct wValue to get hub descriptor of a USB 3.0 hub

[Bin Meng]

Testing a USB 3.0 hub by connecting it to the xHCI port on Intel
MinnowMax, when issuing 'get hub descriptor' to the hub, xHCI
reports a transfer event TRB with a completion code 6 which means
'Stall Error'.

In fact super speed USB hub descriptor type is 0x2a, not 0x29.
Sending correct SETUP packet to the hub makes it not stall anymore.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 common/usb_hub.c        | 12 +++++++++++-
 drivers/usb/host/xhci.c |  1 +
 include/usb_defs.h      |  1 +
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 8279e5c..ca830df 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -68,11 +68,21 @@ __weak void usb_hub_reset_devices(int port)
 	return;
 }
 
+static inline bool usb_hub_is_superspeed(struct usb_device *hdev)
+{
+	return hdev->descriptor.bDeviceProtocol == 3;
+}
+
 static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size)
 {
+	unsigned short dtype = USB_DT_HUB;
+
+	if (usb_hub_is_superspeed(dev))
+		dtype = USB_DT_SS_HUB;
+
 	return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
 		USB_REQ_GET_DESCRIPTOR, USB_DIR_IN | USB_RT_HUB,
-		USB_DT_HUB << 8, 0, data, size, USB_CNTL_TIMEOUT);
+		dtype << 8, 0, data, size, USB_CNTL_TIMEOUT);
 }
 
 static int usb_clear_port_feature(struct usb_device *dev, int port, int feature)
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index c949000..9fa0d8f 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -727,6 +727,7 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
 	case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 		switch (le16_to_cpu(req->value) >> 8) {
 		case USB_DT_HUB:
+		case USB_DT_SS_HUB:
 			debug("USB_DT_HUB config\n");
 			srcptr = &descriptor.hub;
 			srclen = 0x8;
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 8214ba9..608a0ca 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -93,6 +93,7 @@
 #define USB_DT_REPORT       (USB_TYPE_CLASS | 0x02)
 #define USB_DT_PHYSICAL     (USB_TYPE_CLASS | 0x03)
 #define USB_DT_HUB          (USB_TYPE_CLASS | 0x09)
+#define USB_DT_SS_HUB       (USB_TYPE_CLASS | 0x0a)
 
 /* Descriptor sizes per descriptor type */
 #define USB_DT_DEVICE_SIZE      18
-- 
2.9.2

[U-Boot] [PATCH 07/20] usb: hub: Revise wLength for 'get port status' request

[Bin Meng]

For accuracy, we should use 'sizeof(struct usb_port_status)' as the
wLength for 'get port status' request, although it happens to be
equal to 'sizeof(struct usb_hub_status)'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 common/usb_hub.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index ca830df..8c6d33a 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -110,7 +110,7 @@ int usb_get_port_status(struct usb_device *dev, int port, void *data)
 {
 	return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
 			USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port,
-			data, sizeof(struct usb_hub_status), USB_CNTL_TIMEOUT);
+			data, sizeof(struct usb_port_status), USB_CNTL_TIMEOUT);
 }
 
 
-- 
2.9.2

[U-Boot] [PATCH 08/20] usb: hub: Change USB hub descriptor to match USB 3.0 hubs

[Bin Meng]

USB 3.0 hubs have a slightly different hub descriptor than USB 2.0
hubs, with a fixed (rather than variable length) size. Change the
host controller drivers that access those last two fields
(DeviceRemovable and PortPowerCtrlMask) to use the union.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 common/usb_hub.c               | 12 +++++++-----
 drivers/usb/emul/sandbox_hub.c |  7 ++++++-
 drivers/usb/host/ehci-hcd.c    |  4 ++--
 drivers/usb/host/xhci.c        |  4 ++--
 include/usb.h                  | 18 ++++++++++++++----
 5 files changed, 31 insertions(+), 14 deletions(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 8c6d33a..090966b 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -586,17 +586,19 @@ static int usb_hub_configure(struct usb_device *dev)
 			&descriptor->wHubCharacteristics)),
 			&hub->desc.wHubCharacteristics);
 	/* set the bitmap */
-	bitmap = (unsigned char *)&hub->desc.DeviceRemovable[0];
+	bitmap = (unsigned char *)&hub->desc.u.hs.DeviceRemovable[0];
 	/* devices not removable by default */
 	memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8);
-	bitmap = (unsigned char *)&hub->desc.PortPowerCtrlMask[0];
+	bitmap = (unsigned char *)&hub->desc.u.hs.PortPowerCtrlMask[0];
 	memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8); /* PowerMask = 1B */
 
 	for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
-		hub->desc.DeviceRemovable[i] = descriptor->DeviceRemovable[i];
+		hub->desc.u.hs.DeviceRemovable[i] =
+			descriptor->u.hs.DeviceRemovable[i];
 
 	for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
-		hub->desc.PortPowerCtrlMask[i] = descriptor->PortPowerCtrlMask[i];
+		hub->desc.u.hs.PortPowerCtrlMask[i] =
+			descriptor->u.hs.PortPowerCtrlMask[i];
 
 	dev->maxchild = descriptor->bNbrPorts;
 	debug("%d ports detected\n", dev->maxchild);
@@ -640,7 +642,7 @@ static int usb_hub_configure(struct usb_device *dev)
 
 	for (i = 0; i < dev->maxchild; i++)
 		debug("port %d is%s removable\n", i + 1,
-		      hub->desc.DeviceRemovable[(i + 1) / 8] & \
+		      hub->desc.u.hs.DeviceRemovable[(i + 1) / 8] & \
 		      (1 << ((i + 1) % 8)) ? " not" : "");
 
 	if (sizeof(struct usb_hub_status) > USB_BUFSIZ) {
diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 9ffda9c..1432858 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -96,7 +96,12 @@ static struct usb_hub_descriptor hub_desc = {
 								1 << 7),
 	.bPwrOn2PwrGood		= 2,
 	.bHubContrCurrent	= 5,
-	.DeviceRemovable	= {0, 0xff}, /* all ports removeable */
+	{
+		{
+			/* all ports removeable */
+			.DeviceRemovable	= {0, 0xff}
+		}
+	}
 #if SANDBOX_NUM_PORTS > 8
 #error "This code sets up an incorrect mask"
 #endif
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 13aa70d..25f9d6d 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -52,8 +52,8 @@ static struct descriptor {
 		0,		/* wHubCharacteristics */
 		10,		/* bPwrOn2PwrGood */
 		0,		/* bHubCntrCurrent */
-		{},		/* Device removable */
-		{}		/* at most 7 ports! XXX */
+		{		/* Device removable */
+		}		/* at most 7 ports! XXX */
 	},
 	{
 		0x12,		/* bLength */
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 9fa0d8f..2acb0e6 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -50,8 +50,8 @@ static struct descriptor {
 		cpu_to_le16(0x8), /* wHubCharacteristics */
 		10,		/* bPwrOn2PwrGood */
 		0,		/* bHubCntrCurrent */
-		{},		/* Device removable */
-		{}		/* at most 7 ports! XXX */
+		{		/* Device removable */
+		}		/* at most 7 ports! XXX */
 	},
 	{
 		0x12,		/* bLength */
diff --git a/include/usb.h b/include/usb.h
index 62f051f..eb82cc2 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -546,10 +546,20 @@ struct usb_hub_descriptor {
 	unsigned short wHubCharacteristics;
 	unsigned char  bPwrOn2PwrGood;
 	unsigned char  bHubContrCurrent;
-	unsigned char  DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
-	unsigned char  PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
-	/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
-	   bitmaps that hold max 255 entries. (bit0 is ignored) */
+	/* 2.0 and 3.0 hubs differ here */
+	union {
+		struct {
+			/* add 1 bit for hub status change; round to bytes */
+			__u8 DeviceRemovable[(USB_MAXCHILDREN + 1 + 7) / 8];
+			__u8 PortPowerCtrlMask[(USB_MAXCHILDREN + 1 + 7) / 8];
+		} __attribute__ ((packed)) hs;
+
+		struct {
+			__u8 bHubHdrDecLat;
+			__le16 wHubDelay;
+			__le16 DeviceRemovable;
+		} __attribute__ ((packed)) ss;
+	} u;
 } __attribute__ ((packed));
 
 
-- 
2.9.2

[U-Boot] [PATCH 09/20] usb: hub: Add 3.0 hub port status mask of 2.0 hub

[Bin Meng]

USB 3.0 hub port status has different bit position regarding to
port power, port speed, etc. But others are the same as 2.0 hubs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 include/usb_defs.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/usb_defs.h b/include/usb_defs.h
index 608a0ca..6b4385a 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -262,12 +262,17 @@
 
 /*
  * Changes to wPortStatus bit field in USB 3.0
- * See USB 3.0 spec Table 10-11
+ * See USB 3.0 spec Table 10-10
  */
 #define USB_SS_PORT_STAT_LINK_STATE	0x01e0
 #define USB_SS_PORT_STAT_POWER		0x0200
 #define USB_SS_PORT_STAT_SPEED		0x1c00
 #define USB_SS_PORT_STAT_SPEED_5GBPS	0x0000
+/* Bits that are the same from USB 2.0 */
+#define USB_SS_PORT_STAT_MASK		(USB_PORT_STAT_CONNECTION | \
+					 USB_PORT_STAT_ENABLE | \
+					 USB_PORT_STAT_OVERCURRENT | \
+					 USB_PORT_STAT_RESET)
 
 /* wPortChange bits */
 #define USB_PORT_STAT_C_CONNECTION  0x0001
-- 
2.9.2

[U-Boot] [PATCH 10/20] usb: xhci: Change MAX_HC_PORTS to 255

[Bin Meng]

HCSPARAMS1:MaxPorts field specifies the maximum port number value,
and its valid values are in the range of 1 to 255.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 32dd611..3cf08e4 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -30,7 +30,7 @@
 /* Max number of USB devices for any host controller - limit in section 6.1 */
 #define MAX_HC_SLOTS            256
 /* Section 5.3.3 - MaxPorts */
-#define MAX_HC_PORTS            127
+#define MAX_HC_PORTS            255
 
 /* Up to 16 ms to halt an HC */
 #define XHCI_MAX_HALT_USEC	(16*1000)
@@ -102,8 +102,8 @@ struct xhci_hccr {
 #define HCS_MAX_INTRS(p)	(((p) >> 8) & 0x7ff)
 /* bits 24:31, Max Ports - max value is 0x7F = 127 ports */
 #define HCS_MAX_PORTS_SHIFT	24
-#define HCS_MAX_PORTS_MASK	(0x7f << HCS_MAX_PORTS_SHIFT)
-#define HCS_MAX_PORTS(p)	(((p) >> 24) & 0x7f)
+#define HCS_MAX_PORTS_MASK	(0xff << HCS_MAX_PORTS_SHIFT)
+#define HCS_MAX_PORTS(p)	(((p) >> 24) & 0xff)
 
 /* HCSPARAMS2 - hcs_params2 - bitmasks */
 /* bits 0:3, frames or uframes that SW needs to queue transactions
-- 
2.9.2

[U-Boot] [PATCH 11/20] usb: xhci: Get rid of CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS

[Bin Meng]

xHC reports supported maximum number of ports in the HCSPARAMS1
register, so it's unnecessary to use a hardcoded config option
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/xhci.c | 8 +++++---
 drivers/usb/host/xhci.h | 4 +---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 2acb0e6..8631e27 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -668,12 +668,14 @@ static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
 	uint32_t reg;
 	volatile uint32_t *status_reg;
 	struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
+	struct xhci_hccr *hccr = ctrl->hccr;
 	struct xhci_hcor *hcor = ctrl->hcor;
+	int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
 
 	if ((req->requesttype & USB_RT_PORT) &&
-	    le16_to_cpu(req->index) > CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) {
-		printf("The request port(%d) is not configured\n",
-			le16_to_cpu(req->index) - 1);
+	    le16_to_cpu(req->index) > max_ports) {
+		printf("The request port(%d) exceeds maximum port number\n",
+		       le16_to_cpu(req->index) - 1);
 		return -EINVAL;
 	}
 
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 3cf08e4..b9602ba 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -172,9 +172,7 @@ struct xhci_hcor {
 	volatile uint64_t or_dcbaap;
 	volatile uint32_t or_config;
 	volatile uint32_t reserved_2[241];
-	struct xhci_hcor_port_regs portregs[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS];
-
-	uint32_t reserved_4[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS * 254];
+	struct xhci_hcor_port_regs portregs[MAX_HC_PORTS];
 };
 
 /* USBCMD - USB command - command bitmasks */
-- 
2.9.2

[U-Boot] [PATCH 12/20] configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards

[Bin Meng]

Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 include/configs/am43xx_evm.h         | 1 -
 include/configs/am57xx_evm.h         | 1 -
 include/configs/cl-som-am57x.h       | 1 -
 include/configs/cm_t43.h             | 1 -
 include/configs/dra7xx_evm.h         | 1 -
 include/configs/ds414.h              | 1 -
 include/configs/exynos5-common.h     | 1 -
 include/configs/ls1012afrdm.h        | 1 -
 include/configs/ls1012aqds.h         | 1 -
 include/configs/ls1012ardb.h         | 1 -
 include/configs/ls1021aiot.h         | 1 -
 include/configs/ls1021aqds.h         | 1 -
 include/configs/ls1021atwr.h         | 1 -
 include/configs/ls1043aqds.h         | 1 -
 include/configs/ls1043ardb.h         | 1 -
 include/configs/ls1046aqds.h         | 1 -
 include/configs/ls1046ardb.h         | 1 -
 include/configs/ls2080aqds.h         | 1 -
 include/configs/ls2080ardb.h         | 1 -
 include/configs/mvebu_armada-37xx.h  | 4 +---
 include/configs/mvebu_armada-8k.h    | 4 +---
 include/configs/rk3328_common.h      | 2 --
 include/configs/rk3399_common.h      | 3 ---
 include/configs/ti_armv7_keystone2.h | 1 -
 include/configs/uniphier.h           | 3 ---
 include/configs/xilinx_zynqmp.h      | 2 --
 scripts/config_whitelist.txt         | 1 -
 27 files changed, 2 insertions(+), 37 deletions(-)

diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 1d8e39c..4278878 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -83,7 +83,6 @@
 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 7a42d79..a88164e 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -93,7 +93,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_OMAP_USB3PHY1_HOST
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index a04f4cd..02adac5 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -84,7 +84,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_OMAP_USB3PHY1_HOST
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index 7b5ca0d..ad6f6ce 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -60,7 +60,6 @@
 
 /* USB support */
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
 
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index d6c4a71..b97a34b 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -156,7 +156,6 @@
 
 /* USB xHCI HOST */
 #define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_OMAP_USB2PHY2_HOST
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index aaba5d8..b0846ef 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -69,7 +69,6 @@
 #if 0
 #undef CONFIG_DM_USB
 #define CONFIG_USB_XHCI_PCI
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 #endif
 
 #if !defined(CONFIG_USB_XHCI_HCD)
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 378219d..7cb3278 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -135,7 +135,6 @@
 
 /* USB */
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index f6f88e8..6b1ba57 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -39,7 +39,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #endif
 
 #define CONFIG_CMD_MEMINFO
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 5b8500b..e7d1cd5 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -124,7 +124,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #endif
 
 /*  MMC  */
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 276fe10..a6ca330 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -27,7 +27,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #endif
 
 /*
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index c1ec2d4..26fbb09 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -26,7 +26,6 @@
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
 
 #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 1529541..101e2e5 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -413,7 +413,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
 
 /*
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 067ef4d..fd3b979 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -50,7 +50,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
 #endif
 
 #define CONFIG_SYS_CLK_FREQ		100000000
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 04d74ac..ddfe754 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -378,7 +378,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
 
 /*
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index deae787..f87fce6 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -291,7 +291,6 @@
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
 #endif
 
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 5d2e819..9101f62 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -144,7 +144,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #define CONFIG_CMD_USB
 #define CONFIG_USB_STORAGE
 #endif
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 6f649a6..73d95ae 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -222,7 +222,6 @@
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_XHCI_DWC3
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 #define CONFIG_CMD_USB
 #define CONFIG_USB_STORAGE
 #endif
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 8a8ee9d..666634d 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -450,7 +450,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 
 #include <asm/fsl_secure_boot.h>
 
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2dab065..0a4c90c 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -349,7 +349,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
 
 #undef CONFIG_CMDLINE_EDITING
 #include <config_distro_defaults.h>
diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
index 5408490..7a255a1 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -98,10 +98,8 @@
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 
 /* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
 #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
-					 CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+					 3)
 
 /* USB ethernet */
 #define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index 9d3aeef..c29d7f9 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -104,10 +104,8 @@
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 
 /* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
 #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
-					 CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+					 3)
 
 /* USB ethernet */
 #define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 5a06244..bc89fd6 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -63,6 +63,4 @@
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
 
-/* xhci host */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 7a8a442..31320ac 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -81,7 +81,4 @@
 #define CONFIG_USB_ETHER_SMSC95XX
 #define CONFIG_USB_ETHER_RTL8152
 
-/* rockchip xhci host driver */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
-
 #endif
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index ac8dabd..ea93b05 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -195,7 +195,6 @@
 
 /* USB Configuration */
 #define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_SS_BASE			KS2_USB_SS_BASE
 #define CONFIG_USB_HOST_XHCI_BASE		KS2_USB_HOST_XHCI_BASE
 #define CONFIG_DEV_USB_PHY_BASE			KS2_DEV_USB_PHY_BASE
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index e45b506..aa6900e 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -114,9 +114,6 @@
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS			0
 
-/* USB */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	4
-
 /* SD/MMC */
 #define CONFIG_SUPPORT_EMMC_BOOT
 
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index c56cd8c..b37255c 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -94,8 +94,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x8000000
 
 #if defined(CONFIG_ZYNQMP_USB)
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
-
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x1800000
 #define DFU_DEFAULT_POLL_TIMEOUT	300
 #define CONFIG_USB_CABLE_CHECK
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 2d9a9fe..8c7b6e6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5777,7 +5777,6 @@ CONFIG_SYS_USB_OHCI_CPU_INIT
 CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
 CONFIG_SYS_USB_OHCI_REGS_BASE
 CONFIG_SYS_USB_OHCI_SLOT_NAME
-CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
 CONFIG_SYS_USER_SWITCHES_BASE
 CONFIG_SYS_USE_BOOT_NORFLASH
 CONFIG_SYS_USE_DATAFLASH
-- 
2.9.2

[U-Boot] [PATCH 13/20] usb: ehci: Get rid of CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS

[Bin Meng]

EHC reports supported maximum number of ports in the HCSPARAMS
register, so it's unnecessary to use a hardcoded config option
CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/ehci-hcd.c | 10 +++++++---
 drivers/usb/host/ehci.h     |  7 +++----
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 25f9d6d..69fae2c 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -148,9 +148,12 @@ static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
 
 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
 {
-	if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
+
+	if (port < 0 || port >= max_ports) {
 		/* Printing the message would cause a scan failure! */
-		debug("The request port(%u) is not configured\n", port);
+		debug("The request port(%u) exceeds maximum port number\n",
+		      port);
 		return NULL;
 	}
 
@@ -205,6 +208,7 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
 {
 	int i, ret = 0;
 	uint32_t cmd, reg;
+	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 
 	if (!ctrl || !ctrl->hcor)
 		return -EINVAL;
@@ -219,7 +223,7 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
 		100 * 1000);
 
 	if (!ret) {
-		for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
+		for (i = 0; i < max_ports; i++) {
 			reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
 			reg |= EHCI_PS_SUSP;
 			ehci_writel(&ctrl->hcor->or_portsc[i], reg);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 734d7f0..4a6d5b7 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -11,9 +11,8 @@
 
 #include <usb.h>
 
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-#endif
+/* Section 2.2.3 - N_PORTS */
+#define MAX_HC_PORTS		15
 
 /*
  * Register Space.
@@ -62,7 +61,7 @@ struct ehci_hcor {
 	uint32_t _reserved_1_[6];
 	uint32_t or_configflag;
 #define FLAG_CF		(1 << 0)	/* true:  we'll support "high speed" */
-	uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
+	uint32_t or_portsc[MAX_HC_PORTS];
 #define PORTSC_PSPD(x)		(((x) >> 26) & 0x3)
 #define PORTSC_PSPD_FS			0x0
 #define PORTSC_PSPD_LS			0x1
-- 
2.9.2

[U-Boot] [PATCH 14/20] configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards

[Bin Meng]

Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/arm/include/asm/ehci-omap.h    | 4 ----
 include/configs/MPC8572DS.h         | 1 -
 include/configs/cm_t54.h            | 1 -
 include/configs/corvus.h            | 3 ---
 include/configs/duovero.h           | 2 --
 include/configs/exynos5-common.h    | 2 --
 include/configs/ma5d4evk.h          | 1 -
 include/configs/mcx.h               | 1 -
 include/configs/mvebu_armada-37xx.h | 7 +------
 include/configs/mvebu_armada-8k.h   | 7 +------
 include/configs/mx35pdk.h           | 1 -
 include/configs/odroid.h            | 1 -
 include/configs/omap3_beagle.h      | 1 -
 include/configs/omap3_overo.h       | 1 -
 include/configs/omap4_panda.h       | 2 --
 include/configs/omap5_uevm.h        | 1 -
 include/configs/picosam9g45.h       | 3 ---
 include/configs/sama5d2_ptc.h       | 4 ----
 include/configs/snapper9g45.h       | 3 ---
 include/configs/sunxi-common.h      | 1 -
 include/configs/tam3517-common.h    | 1 -
 include/configs/tao3530.h           | 1 -
 include/configs/tegra114-common.h   | 1 -
 include/configs/tegra124-common.h   | 1 -
 include/configs/tegra20-common.h    | 1 -
 include/configs/tegra210-common.h   | 1 -
 include/configs/tegra30-common.h    | 1 -
 include/configs/vinco.h             | 6 ------
 include/configs/x86-common.h        | 1 -
 scripts/config_whitelist.txt        | 1 -
 30 files changed, 2 insertions(+), 60 deletions(-)

diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index 5a53e40..9dbb2c4 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -19,11 +19,7 @@ enum usbhs_omap_port_mode {
 	OMAP_EHCI_PORT_MODE_HSIC,
 };
 
-#ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#define OMAP_HS_USB_PORTS	CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#else
 #define OMAP_HS_USB_PORTS	3
-#endif
 
 #define is_ehci_phy_mode(x)	((x) == OMAP_EHCI_PORT_MODE_PHY)
 #define is_ehci_tll_mode(x)	((x) == OMAP_EHCI_PORT_MODE_TLL)
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 79e11bb..889bd64 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -562,7 +562,6 @@
 #define CONFIG_USB_EHCI_PCI
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_PCI_EHCI_DEVICE			0
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
 #endif
 
 #undef CONFIG_WATCHDOG			/* watchdog disabled */
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 14042ad..45b3f91 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -58,7 +58,6 @@
 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 						CONFIG_SYS_SCSI_MAX_LUN)
 /* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO	76 /* HSIC2 HUB #RESET */
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 3847a19..15b6927 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -95,9 +95,6 @@
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_AT91_WANTS_COMMON_PHY
 
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-
 /* USB DFU support */
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_MTD_DEVICE
diff --git a/include/configs/duovero.h b/include/configs/duovero.h
index f142231..49875ff 100644
--- a/include/configs/duovero.h
+++ b/include/configs/duovero.h
@@ -25,8 +25,6 @@
 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
 
 /* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
 
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 7cb3278..3b73bbc 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -134,8 +134,6 @@
 /* Enable Time Command */
 
 /* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
-
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_USB_ETHER_SMSC95XX
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index bb66140..f695997 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -97,7 +97,6 @@
  * USB
  */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 
 /* USB device */
 #define CONFIG_USB_ETHER
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 0c237a5..0c5becd 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -74,7 +74,6 @@
 
 /* EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	57
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 #define	CONFIG_USB_HOST_ETHER
 #define	CONFIG_USB_ETHER_ASIX
 #define CONFIG_USB_ETHER_MCS7830
diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
index 7a255a1..a9a2437 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -94,12 +94,7 @@
 #define CONFIG_NET_RETRY_COUNT	50
 #define CONFIG_PHY_MARVELL
 
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
-					 3)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
 
 /* USB ethernet */
 #define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index c29d7f9..2610460 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -100,12 +100,7 @@
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50
 
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
-					 3)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
 
 /* USB ethernet */
 #define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index e60b96f..615080c 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -199,7 +199,6 @@
 #define CONFIG_SYS_NAND_LARGEPAGE
 
 /* EHCI driver */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	1
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_MXC
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index afc7c5e..de9b5f5 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -190,7 +190,6 @@
 /* USB */
 #define CONFIG_USB_EHCI_EXYNOS
 
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_SMSC95XX
 
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 0d48d4e..019c1b0 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -58,7 +58,6 @@
 
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147
 
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_USB_ETHER_MCS7830
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 111aec5..2bd8f55 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -41,7 +41,6 @@
 
 /* USB EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	183
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
 
 /* commands to include */
 
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index e1263b6..32c1e67 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -17,8 +17,6 @@
  */
 
 /* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
 
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index e7fac6d..d2b6c5d 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -52,7 +52,6 @@
 #define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
 
 /* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index c83e559..a687e40 100644
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -97,9 +97,6 @@
 #define CONFIG_RESET_PHY_R
 #define CONFIG_AT91_WANTS_COMMON_PHY
 
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index 7607f94..203c3bc 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -65,10 +65,6 @@
 /* USB */
 #define CONFIG_CMD_USB
 
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
-#endif
-
 /* USB device */
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_DUALSPEED
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index 4e0b9b1..8cbd44e 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -60,9 +60,6 @@
 #define CONFIG_TFTP_PORT
 #define CONFIG_TFTP_TSIZE
 
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-
 /* MMC */
 #define CONFIG_GENERIC_ATMEL_MCI
 
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 9b514ff..ee669cb 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -311,7 +311,6 @@ extern int soft_i2c_gpio_scl;
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_USB_OHCI_SUNXI
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 #endif
 
 #ifdef CONFIG_USB_MUSB_SUNXI
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 0b87c9c..9d23754 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -67,7 +67,6 @@
 					115200}
 /* EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	25
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 
 /* commands to include */
 #define CONFIG_CMD_NAND		/* NAND support			*/
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index f994d2d..a60cddd 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -230,7 +230,6 @@
 /* USB EHCI */
 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	162
 
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_SMSC95XX
 
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 107a0f8..75d2065 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -63,6 +63,5 @@
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 #endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 8cf9bac..0d61753 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -65,7 +65,6 @@
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 /* GPU needs setup */
 #define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index db1cc24..342ffbe 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -82,7 +82,6 @@
  */
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	10
 #define CONFIG_EHCI_IS_TDI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 #define CONFIG_SYS_NAND_SELF_INIT
 #define CONFIG_SYS_NAND_ONFI_DETECTION
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 874fe34d..4c05576 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -68,7 +68,6 @@
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 /* GPU needs setup */
 #define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 6083847..c2096fb 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -64,6 +64,5 @@
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 #endif /* _TEGRA30_COMMON_H_ */
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index dc35b28..adff1b6 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -63,12 +63,6 @@
 
 #endif
 
-/* USB */
-
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3
-#endif
-
 /* USB device */
 #define CONFIG_USB_ETHER
 #define CONFIG_USB_ETH_RNDIS
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index b5ef8b5..02be817 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -131,7 +131,6 @@
  * USB configuration
  */
 #define CONFIG_USB_EHCI_PCI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     12
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_SYS_USB_EVENT_POLL
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8c7b6e6..d783915 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5765,7 +5765,6 @@ CONFIG_SYS_USBD_BASE
 CONFIG_SYS_USB_BRGCLK
 CONFIG_SYS_USB_DEVICE
 CONFIG_SYS_USB_EHCI_CPU_INIT
-CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
 CONFIG_SYS_USB_EHCI_REGS_BASE
 CONFIG_SYS_USB_EVENT_POLL
 CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
-- 
2.9.2

[U-Boot] [PATCH 15/20] usb: cmd: Print actual packet size for super speed devices

[Bin Meng]

USB 3.0 defines bMaxPacketSize0 field in the device descriptor as
the exponent of 2, so let's print the calculated actual size.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 cmd/usb.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/cmd/usb.c b/cmd/usb.c
index 4fa456e..1bdd391 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -150,6 +150,8 @@ static void usb_display_string(struct usb_device *dev, int index)
 
 static void usb_display_desc(struct usb_device *dev)
 {
+	u16 bMaxPacketSize0 = dev->descriptor.bMaxPacketSize0;
+
 	if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) {
 		printf("%d: %s,  USB Revision %x.%x\n", dev->devnum,
 		usb_get_class_desc(dev->config.if_desc[0].desc.bInterfaceClass),
@@ -171,9 +173,10 @@ static void usb_display_desc(struct usb_device *dev)
 			       usb_get_class_desc(
 				dev->config.if_desc[0].desc.bInterfaceClass));
 		}
+		if (dev->descriptor.bcdUSB >= cpu_to_le16(0x0300))
+			bMaxPacketSize0 = 1 << bMaxPacketSize0;
 		printf(" - PacketSize: %d  Configurations: %d\n",
-			dev->descriptor.bMaxPacketSize0,
-			dev->descriptor.bNumConfigurations);
+			bMaxPacketSize0, dev->descriptor.bNumConfigurations);
 		printf(" - Vendor: 0x%04x  Product 0x%04x Version %d.%d\n",
 			dev->descriptor.idVendor, dev->descriptor.idProduct,
 			(dev->descriptor.bcdDevice>>8) & 0xff,
-- 
2.9.2

[U-Boot] [PATCH 16/20] usb: xhci: Convert CONFIG_USB_XHCI_PCI to Kconfig

[Bin Meng]

Add CONFIG_USB_XHCI_PCI as a Kconfig option.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 drivers/usb/host/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index b824eec..4222483 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -31,6 +31,12 @@ config USB_XHCI_MVEBU
 	  SoCs, which includes Armada8K, Armada3700 and other Armada
 	  family SoCs.
 
+config USB_XHCI_PCI
+	bool "Support for PCI based xHCI USB controller"
+	default y if X86
+	help
+	  Enables support for the PCI based xHCI controller.
+
 config USB_XHCI_ROCKCHIP
 	bool "Support for Rockchip on-chip xHCI USB controller"
 	depends on ARCH_ROCKCHIP
-- 
2.9.2

[U-Boot] [PATCH 17/20] x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS

[Bin Meng]

GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 board/intel/minnowmax/minnowmax.c | 53 +++++++++++++++++++++++++++++++++++++++
 include/configs/minnowmax.h       |  1 +
 2 files changed, 54 insertions(+)

diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index 94b22ed..99aed53 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,9 +5,62 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <asm/gpio.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+#define GPIO_BANKE_NAME		"gpioe"
 
 int arch_early_init_r(void)
 {
 	return 0;
 }
+
+int misc_init_r(void)
+{
+	struct udevice *dev;
+	struct gpio_desc desc;
+	int ret;
+
+	/*
+	 * Turn on USB VBUS for the two USB ports on the board.
+	 * Each port's VBUS is controlled by a GPIO pin.
+	 */
+
+	ret = uclass_find_device_by_name(UCLASS_GPIO, GPIO_BANKE_NAME, &dev);
+	if (ret) {
+		debug("%s: GPIO %s device cannot be not found (ret=%d)\n",
+		      __func__, GPIO_BANKE_NAME, ret);
+		return ret;
+	}
+
+	ret = device_probe(dev);
+	if (ret) {
+		debug("%s: GPIO %s device probe failed (ret=%d)\n",
+		      __func__, GPIO_BANKE_NAME, ret);
+		return ret;
+	}
+
+	desc.dev = dev;
+	desc.flags = GPIOD_IS_OUT;
+
+	/* GPIO E8 controls the bottom port */
+	desc.offset = 8;
+
+	ret = dm_gpio_request(&desc, "usb_host_en0");
+	if (ret)
+		return ret;
+	dm_gpio_set_value(&desc, 1);
+
+	/* GPIO E9 controls the upper port */
+	desc.offset = 9;
+
+	ret = dm_gpio_request(&desc, "usb_host_en1");
+	if (ret)
+		return ret;
+
+	dm_gpio_set_value(&desc, 1);
+
+	return 0;
+}
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 7b9f90c..3744811 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -16,6 +16,7 @@
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 
 #define CONFIG_SMSC_LPC47M
+#define CONFIG_MISC_INIT_R
 
 #define CONFIG_STD_DEVICES_SETTINGS	"stdin=usbkbd,serial\0" \
 					"stdout=vidconsole,serial\0" \
-- 
2.9.2

[U-Boot] [PATCH 18/20] x86: minnowmax: Add a environment variable for USB power-on delay

[Bin Meng]

Occasionally it was observed that on Intel MinnowMax board, with a
USB 2.0 device connected to the bottom port, when doing 'usb start'
on the xHCI controller:

  scanning bus 0 for devices... cannot reset port 3!?

But neither of the two USB ports is routed to xHCI root port 3.
Adding some debug information shows that xHCI port 3 PORTSC register
mysteriously reports both CCS = 1 and CSC = 1.

This is not seen every time. After increasing the timeout to wait
for power to become stable, the issue is gone. So this indicates
current default USB power-on delay (20ms) might be at a critical
region where power is stable/unstable. U-Boot provides a mechanism
to have a environment variable to override the default one. Add
one for MinnowMax.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 include/configs/minnowmax.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 3744811..57a62c2 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -20,7 +20,8 @@
 
 #define CONFIG_STD_DEVICES_SETTINGS	"stdin=usbkbd,serial\0" \
 					"stdout=vidconsole,serial\0" \
-					"stderr=vidconsole,serial\0"
+					"stderr=vidconsole,serial\0" \
+					"usb_pgood_delay=40\0"
 
 #define CONFIG_SCSI_DEV_LIST		\
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
-- 
2.9.2

[U-Boot] [PATCH 19/20] x86: minnowmax: Enable USB xHCI support

[Bin Meng]

BayTrail SoC supports both EHCI and xHCI controllers. However only
one host controller (either EHCI or xHCI) can be used. To enable
HSIC and SS ports, xHCI must be used. This turns on xHCI support on
Intel MinnowMax board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/dts/minnowmax.dts  | 3 +++
 configs/minnowmax_defconfig | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4c0a8fe..a0ad03c 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -272,6 +272,9 @@
 		fsp,enable-spi;
 		fsp,enable-sata;
 		fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+		fsp,enable-xhci;
+#endif
 		fsp,lpe-mode = <LPE_MODE_PCI>;
 		fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
 		fsp,enable-dma0;
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index aa50e88..289b4c8 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -68,6 +68,7 @@ CONFIG_ICH_SPI=y
 CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
-- 
2.9.2

[U-Boot] [PATCH 20/20] x86: Remove CONFIG_USB_MAX_CONTROLLER_COUNT

[Bin Meng]

As all x86 boards have been switched over to use DM USB, remove
CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 include/configs/conga-qeval20-qa3-e3845.h | 3 ---
 include/configs/dfi-bt700.h               | 3 ---
 include/configs/minnowmax.h               | 3 ---
 include/configs/x86-common.h              | 1 -
 4 files changed, 10 deletions(-)

diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h
index 231e599..b4ea184 100644
--- a/include/configs/conga-qeval20-qa3-e3845.h
+++ b/include/configs/conga-qeval20-qa3-e3845.h
@@ -23,9 +23,6 @@
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
 
-#undef CONFIG_USB_MAX_CONTROLLER_COUNT
-#define CONFIG_USB_MAX_CONTROLLER_COUNT		1
-
 #define VIDEO_IO_OFFSET				0
 #define CONFIG_X86EMU_RAW_IO
 
diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h
index 1cb4b5e..6748b9c 100644
--- a/include/configs/dfi-bt700.h
+++ b/include/configs/dfi-bt700.h
@@ -28,9 +28,6 @@
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
 
-#undef CONFIG_USB_MAX_CONTROLLER_COUNT
-#define CONFIG_USB_MAX_CONTROLLER_COUNT		1
-
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_USB_ETHER_SMSC95XX
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 57a62c2..6ea607d 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -27,9 +27,6 @@
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
 
-#undef CONFIG_USB_MAX_CONTROLLER_COUNT
-#define CONFIG_USB_MAX_CONTROLLER_COUNT		1
-
 #define VIDEO_IO_OFFSET				0
 #define CONFIG_X86EMU_RAW_IO
 
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 02be817..70a559b 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -131,7 +131,6 @@
  * USB configuration
  */
 #define CONFIG_USB_EHCI_PCI
-#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_SYS_USB_EVENT_POLL
 
 #define CONFIG_USB_HOST_ETHER
-- 
2.9.2

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Bin Meng]

Hi

On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
> the board. This series fixes a bunch of xHCI driver issues to make it
> work on Intel's platform.
>
> Issues identified in the U-Boot xHCI driver are really spec violations,
> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
> are quite tolerant with these spec violations, or IOW those IPs don't
> respect the xHCI spec. While it comes to Intel platform, it just breaks.
>
> Note xHCI interrupt transfer is still not supported in this series, as
> it has been there since the original commit of xHCI support for years.
>
> Tested on Intel MinnowMax board with the following USB devices:
> - Dell USB 1.1 keyboard
> - Dell USB 2.0 mouse
> - Netac USB 2.0 flash disk
> - JetFlash USB 3.0 flash disk
> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>   ethernet chipset connected to one of its downstream port
>
> Testing were performed on both ports (2.0 port and 3.0 port), and both
> ports are connected to xHCI (configure MinnowMax to enable xHCI).
>
> Testing results:
> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>   both ports
> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>   and the integrated Realtek USB ethernet chipset enumerated as well.
>   USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>   but DELL USB 1.1 keyboard and 2.0 mouse cannot.
> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>   but the integrated Realtek USB ethernet chipset cannot be enumerated.
>   None of devices connected via the hub can be enumerated. U-Boot xHCI
>   driver just throws BUG_ON() on the event TRB handling.
>
> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
> So far this series tries to fix some of the issues identified, but the
> USB 3.0 hub is still not working. This will be left as future work, or
> if someone else is interested it to pick up the work.
>
> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
> added "Set Hub Depth" request support, xHCI codes update to fill in
> hub description fields in the input slot context when issuing commands
> to xHC, etc.

Forget to mention, this series is available at u-boot-x86/xhci-working
for testing.

Regards,
Bin

[U-Boot] [PATCH 12/20] configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards

[Bin Meng]

Hi Stefan,

On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
> remove it in all boards' config files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  include/configs/am43xx_evm.h         | 1 -
>  include/configs/am57xx_evm.h         | 1 -
>  include/configs/cl-som-am57x.h       | 1 -
>  include/configs/cm_t43.h             | 1 -
>  include/configs/dra7xx_evm.h         | 1 -
>  include/configs/ds414.h              | 1 -
>  include/configs/exynos5-common.h     | 1 -
>  include/configs/ls1012afrdm.h        | 1 -
>  include/configs/ls1012aqds.h         | 1 -
>  include/configs/ls1012ardb.h         | 1 -
>  include/configs/ls1021aiot.h         | 1 -
>  include/configs/ls1021aqds.h         | 1 -
>  include/configs/ls1021atwr.h         | 1 -
>  include/configs/ls1043aqds.h         | 1 -
>  include/configs/ls1043ardb.h         | 1 -
>  include/configs/ls1046aqds.h         | 1 -
>  include/configs/ls1046ardb.h         | 1 -
>  include/configs/ls2080aqds.h         | 1 -
>  include/configs/ls2080ardb.h         | 1 -
>  include/configs/mvebu_armada-37xx.h  | 4 +---
>  include/configs/mvebu_armada-8k.h    | 4 +---
>  include/configs/rk3328_common.h      | 2 --
>  include/configs/rk3399_common.h      | 3 ---
>  include/configs/ti_armv7_keystone2.h | 1 -
>  include/configs/uniphier.h           | 3 ---
>  include/configs/xilinx_zynqmp.h      | 2 --
>  scripts/config_whitelist.txt         | 1 -
>  27 files changed, 2 insertions(+), 37 deletions(-)
>

[snip]

> diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
> index 2dab065..0a4c90c 100644
> --- a/include/configs/ls2080ardb.h
> +++ b/include/configs/ls2080ardb.h
> @@ -349,7 +349,6 @@ unsigned long get_board_sys_clk(void);
>  #define CONFIG_HAS_FSL_XHCI_USB
>  #define CONFIG_USB_XHCI_FSL
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT         2
> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
>
>  #undef CONFIG_CMDLINE_EDITING
>  #include <config_distro_defaults.h>
> diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
> index 5408490..7a255a1 100644
> --- a/include/configs/mvebu_armada-37xx.h
> +++ b/include/configs/mvebu_armada-37xx.h
> @@ -98,10 +98,8 @@
>  #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
>
>  /* USB 3.0 */
> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
> -
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
> -                                        CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
> +                                        3)

I strongly suspect here CONFIG_USB_MAX_CONTROLLER_COUNT is mistakenly
configured, unless each host controller only has 1 root port? Please
review.

>
>  /* USB ethernet */
>  #define CONFIG_USB_HOST_ETHER
> diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
> index 9d3aeef..c29d7f9 100644
> --- a/include/configs/mvebu_armada-8k.h
> +++ b/include/configs/mvebu_armada-8k.h
> @@ -104,10 +104,8 @@
>  #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
>
>  /* USB 3.0 */
> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
> -
>  #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
> -                                        CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
> +                                        3)

ditto.

>
>  /* USB ethernet */
>  #define CONFIG_USB_HOST_ETHER

[snip]

Regards,
Bin

[U-Boot] [PATCH 14/20] configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards

[Bin Meng]

Hi Stefan,

On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
> remove it in all boards' config files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/arm/include/asm/ehci-omap.h    | 4 ----
>  include/configs/MPC8572DS.h         | 1 -
>  include/configs/cm_t54.h            | 1 -
>  include/configs/corvus.h            | 3 ---
>  include/configs/duovero.h           | 2 --
>  include/configs/exynos5-common.h    | 2 --
>  include/configs/ma5d4evk.h          | 1 -
>  include/configs/mcx.h               | 1 -
>  include/configs/mvebu_armada-37xx.h | 7 +------
>  include/configs/mvebu_armada-8k.h   | 7 +------
>  include/configs/mx35pdk.h           | 1 -
>  include/configs/odroid.h            | 1 -
>  include/configs/omap3_beagle.h      | 1 -
>  include/configs/omap3_overo.h       | 1 -
>  include/configs/omap4_panda.h       | 2 --
>  include/configs/omap5_uevm.h        | 1 -
>  include/configs/picosam9g45.h       | 3 ---
>  include/configs/sama5d2_ptc.h       | 4 ----
>  include/configs/snapper9g45.h       | 3 ---
>  include/configs/sunxi-common.h      | 1 -
>  include/configs/tam3517-common.h    | 1 -
>  include/configs/tao3530.h           | 1 -
>  include/configs/tegra114-common.h   | 1 -
>  include/configs/tegra124-common.h   | 1 -
>  include/configs/tegra20-common.h    | 1 -
>  include/configs/tegra210-common.h   | 1 -
>  include/configs/tegra30-common.h    | 1 -
>  include/configs/vinco.h             | 6 ------
>  include/configs/x86-common.h        | 1 -
>  scripts/config_whitelist.txt        | 1 -
>  30 files changed, 2 insertions(+), 60 deletions(-)
>

[snip]

> diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
> index 7a255a1..a9a2437 100644
> --- a/include/configs/mvebu_armada-37xx.h
> +++ b/include/configs/mvebu_armada-37xx.h
> @@ -94,12 +94,7 @@
>  #define CONFIG_NET_RETRY_COUNT 50
>  #define CONFIG_PHY_MARVELL
>
> -/* USB 2.0 */
> -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
> -
> -/* USB 3.0 */
> -#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
> -                                        3)
> +#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)

I strongly suspect here CONFIG_USB_MAX_CONTROLLER_COUNT is mistakenly
configured, unless each host controller only has 1 root port? Please
review.

>
>  /* USB ethernet */
>  #define CONFIG_USB_HOST_ETHER
> diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
> index c29d7f9..2610460 100644
> --- a/include/configs/mvebu_armada-8k.h
> +++ b/include/configs/mvebu_armada-8k.h
> @@ -100,12 +100,7 @@
>  #define CONFIG_ARP_TIMEOUT     200
>  #define CONFIG_NET_RETRY_COUNT 50
>
> -/* USB 2.0 */
> -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
> -
> -/* USB 3.0 */
> -#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
> -                                        3)
> +#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
>

ditto.

>  /* USB ethernet */
>  #define CONFIG_USB_HOST_ETHER

[snip]

Regards,
Bin

[U-Boot] [PATCH 05/20] usb: hub: Update handling connect status/change in usb_scan_port()

[Marek Vasut]

On 06/16/2017 03:31 PM, Bin Meng wrote:
> It was observed that on Intel MinnowMax board, when xHCI is enabled
> in the BayTrail SoC, with a USB 3.0 device connected to the bottom
> USB 3.0 port (mapped to xHCI root port #7), its PORTSC register is
> always 0x201203 (CCS = 1, CSC = 0). The root cause of such behavior
> is unknown yet. Connect status change bit is set on the same port
> with a USB 2.0 device (mapped to xHCI port #1, which is a different
> port on the root hub).
> 
> With current logic in usb_scan_port(), the enumeration process will
> abort if it does not detect a connect status change on a hub port.
> However since a device connection status is correctly reported, the
> enumeration process can still continue.
> 
> With this change, USB device connected to the bottom blue port on
> MinnowMax board can be enumerated under either SS or HS mode.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

I'd be slightly concerned this can break some other controllers, like
the DWC2 . CCing Dinh, maybe he can test it on SoCFPGA.

> ---
> 
>  common/usb_hub.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/common/usb_hub.c b/common/usb_hub.c
> index ff9cd50..8279e5c 100644
> --- a/common/usb_hub.c
> +++ b/common/usb_hub.c
> @@ -408,8 +408,15 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
>  	portchange = le16_to_cpu(portsts->wPortChange);
>  	debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange);
>  
> -	/* No connection change happened, wait a bit more. */
> -	if (!(portchange & USB_PORT_STAT_C_CONNECTION)) {
> +	/*
> +	 * No connection change happened, wait a bit more.
> +	 *
> +	 * For some situation, the hub reports no connection change but a
> +	 * device is connected to the port (eg: CCS bit is set but CSC is not
> +	 * in the PORTSC register of a root hub), ignore such case.
> +	 */
> +	if (!(portchange & USB_PORT_STAT_C_CONNECTION) &&
> +	    !(portstatus & USB_PORT_STAT_CONNECTION)) {
>  		if (get_timer(0) >= hub->connect_timeout) {
>  			debug("devnum=%d port=%d: timeout\n",
>  			      dev->devnum, i + 1);
> @@ -421,10 +428,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
>  		return 0;
>  	}
>  
> -	/* Test if the connection came up, and if not exit */
> -	if (!(portstatus & USB_PORT_STAT_CONNECTION))
> -		return 0;
> -
>  	/* A new USB device is ready at this point */
>  	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
>  
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Marek Vasut]

On 06/16/2017 03:31 PM, Bin Meng wrote:
> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
> the board. This series fixes a bunch of xHCI driver issues to make it
> work on Intel's platform.
> 
> Issues identified in the U-Boot xHCI driver are really spec violations,
> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
> are quite tolerant with these spec violations, or IOW those IPs don't
> respect the xHCI spec. While it comes to Intel platform, it just breaks.
> 
> Note xHCI interrupt transfer is still not supported in this series, as
> it has been there since the original commit of xHCI support for years.
> 
> Tested on Intel MinnowMax board with the following USB devices:
> - Dell USB 1.1 keyboard
> - Dell USB 2.0 mouse
> - Netac USB 2.0 flash disk
> - JetFlash USB 3.0 flash disk
> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>   ethernet chipset connected to one of its downstream port
> 
> Testing were performed on both ports (2.0 port and 3.0 port), and both
> ports are connected to xHCI (configure MinnowMax to enable xHCI).
> 
> Testing results:
> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>   both ports
> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>   and the integrated Realtek USB ethernet chipset enumerated as well.
>   USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>   but DELL USB 1.1 keyboard and 2.0 mouse cannot.
> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>   but the integrated Realtek USB ethernet chipset cannot be enumerated.
>   None of devices connected via the hub can be enumerated. U-Boot xHCI
>   driver just throws BUG_ON() on the event TRB handling.
> 
> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
> So far this series tries to fix some of the issues identified, but the
> USB 3.0 hub is still not working. This will be left as future work, or
> if someone else is interested it to pick up the work.
> 
> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
> added "Set Hub Depth" request support, xHCI codes update to fill in
> hub description fields in the input slot context when issuing commands
> to xHC, etc.
> 

I'd like Stefan to review this series as he worked on the intel stuff
recently too.

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Stefan Roese]

On 16.06.2017 16:21, Marek Vasut wrote:
> On 06/16/2017 03:31 PM, Bin Meng wrote:
>> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
>> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
>> the board. This series fixes a bunch of xHCI driver issues to make it
>> work on Intel's platform.
>>
>> Issues identified in the U-Boot xHCI driver are really spec violations,
>> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
>> are quite tolerant with these spec violations, or IOW those IPs don't
>> respect the xHCI spec. While it comes to Intel platform, it just breaks.
>>
>> Note xHCI interrupt transfer is still not supported in this series, as
>> it has been there since the original commit of xHCI support for years.
>>
>> Tested on Intel MinnowMax board with the following USB devices:
>> - Dell USB 1.1 keyboard
>> - Dell USB 2.0 mouse
>> - Netac USB 2.0 flash disk
>> - JetFlash USB 3.0 flash disk
>> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>>    ethernet chipset connected to one of its downstream port
>>
>> Testing were performed on both ports (2.0 port and 3.0 port), and both
>> ports are connected to xHCI (configure MinnowMax to enable xHCI).
>>
>> Testing results:
>> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
>> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>>    both ports
>> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>>    and the integrated Realtek USB ethernet chipset enumerated as well.
>>    USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>>    but DELL USB 1.1 keyboard and 2.0 mouse cannot.
>> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>>    but the integrated Realtek USB ethernet chipset cannot be enumerated.
>>    None of devices connected via the hub can be enumerated. U-Boot xHCI
>>    driver just throws BUG_ON() on the event TRB handling.
>>
>> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
>> So far this series tries to fix some of the issues identified, but the
>> USB 3.0 hub is still not working. This will be left as future work, or
>> if someone else is interested it to pick up the work.
>>
>> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
>> added "Set Hub Depth" request support, xHCI codes update to fill in
>> hub description fields in the input slot context when issuing commands
>> to xHC, etc.
>>

Bin, thanks for working on this.

> I'd like Stefan to review this series as he worked on the intel stuff
> recently too.

Yes, I'll review and test this series most likely beginning of next
week.

Thanks,
Stefan

[U-Boot] [PATCH 01/20] usb: xhci: Remove incorrect comments for struct xhci_container_ctx

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> There is no member called 'dma' in struct xhci_container_ctx. Remove
> the comments that mentions it.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci.h | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 02/20] usb: xhci: Correct command TRB 4th dword initialization

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> In xhci_queue_command(), when the command is not 'reset endpoint',
> 'stop endpoint' or 'set TR dequeue pointer', endpoint ID should not
> be encoded in the TRB.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci-ring.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 03/20] usb: xhci: Initialize scratchpad buffer array and scratchpad buffers

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> The scratchpad buffer array is used to define the locations of
> statically allocated memory pages that are available for the
> private use of the xHC. The xHCI spec explicitly mentions that
> system software shall allocate the scratchpad buffers before
> placing the xHC in to Run mode (Run/Stop (R/S) = ‘1’), however
> U-Boot is missing this part.
>
> This causes xHC on Intel platform does not respond the very first
> 'enable slot' command that is given to xHC and the 'enable slot'
> command completion event TRB is never generated and xHC seems to
> hang forever.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci-mem.c | 87 +++++++++++++++++++++++++++++++++++++++++++++
>  drivers/usb/host/xhci.h     | 10 ++++--
>  2 files changed, 95 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 04/20] usb: xhci: Add input slot context in xhci_set_configuration()

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> A valid input slot context for a 'configure endpoint' command requires
> the 'Context Entries' field to be initialized to the index of the last
> valid endpoint context that is defined by the target configuration. We
> set up the 'Context Entries' field, but we forget to include the input
> slot context in the input control context 'Add Context flags' bitmap.
> So xHC will simply ignore input slot context and continue using its own
> which contains old information of the device.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 06/20] usb: hub: Send correct wValue to get hub descriptor of a USB 3.0 hub

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> Testing a USB 3.0 hub by connecting it to the xHCI port on Intel
> MinnowMax, when issuing 'get hub descriptor' to the hub, xHCI
> reports a transfer event TRB with a completion code 6 which means
> 'Stall Error'.
>
> In fact super speed USB hub descriptor type is 0x2a, not 0x29.
> Sending correct SETUP packet to the hub makes it not stall anymore.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  common/usb_hub.c        | 12 +++++++++++-
>  drivers/usb/host/xhci.c |  1 +
>  include/usb_defs.h      |  1 +
>  3 files changed, 13 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 07/20] usb: hub: Revise wLength for 'get port status' request

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> For accuracy, we should use 'sizeof(struct usb_port_status)' as the
> wLength for 'get port status' request, although it happens to be
> equal to 'sizeof(struct usb_hub_status)'.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  common/usb_hub.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 08/20] usb: hub: Change USB hub descriptor to match USB 3.0 hubs

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> USB 3.0 hubs have a slightly different hub descriptor than USB 2.0
> hubs, with a fixed (rather than variable length) size. Change the
> host controller drivers that access those last two fields
> (DeviceRemovable and PortPowerCtrlMask) to use the union.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  common/usb_hub.c               | 12 +++++++-----
>  drivers/usb/emul/sandbox_hub.c |  7 ++++++-
>  drivers/usb/host/ehci-hcd.c    |  4 ++--
>  drivers/usb/host/xhci.c        |  4 ++--
>  include/usb.h                  | 18 ++++++++++++++----
>  5 files changed, 31 insertions(+), 14 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 09/20] usb: hub: Add 3.0 hub port status mask of 2.0 hub

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> USB 3.0 hub port status has different bit position regarding to
> port power, port speed, etc. But others are the same as 2.0 hubs.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  include/usb_defs.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 10/20] usb: xhci: Change MAX_HC_PORTS to 255

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> HCSPARAMS1:MaxPorts field specifies the maximum port number value,
> and its valid values are in the range of 1 to 255.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 11/20] usb: xhci: Get rid of CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> xHC reports supported maximum number of ports in the HCSPARAMS1
> register, so it's unnecessary to use a hardcoded config option
> CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/xhci.c | 8 +++++---
>  drivers/usb/host/xhci.h | 4 +---
>  2 files changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 12/20] configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
> remove it in all boards' config files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  include/configs/am43xx_evm.h         | 1 -
>  include/configs/am57xx_evm.h         | 1 -
>  include/configs/cl-som-am57x.h       | 1 -
>  include/configs/cm_t43.h             | 1 -
>  include/configs/dra7xx_evm.h         | 1 -
>  include/configs/ds414.h              | 1 -
>  include/configs/exynos5-common.h     | 1 -
>  include/configs/ls1012afrdm.h        | 1 -
>  include/configs/ls1012aqds.h         | 1 -
>  include/configs/ls1012ardb.h         | 1 -
>  include/configs/ls1021aiot.h         | 1 -
>  include/configs/ls1021aqds.h         | 1 -
>  include/configs/ls1021atwr.h         | 1 -
>  include/configs/ls1043aqds.h         | 1 -
>  include/configs/ls1043ardb.h         | 1 -
>  include/configs/ls1046aqds.h         | 1 -
>  include/configs/ls1046ardb.h         | 1 -
>  include/configs/ls2080aqds.h         | 1 -
>  include/configs/ls2080ardb.h         | 1 -
>  include/configs/mvebu_armada-37xx.h  | 4 +---
>  include/configs/mvebu_armada-8k.h    | 4 +---
>  include/configs/rk3328_common.h      | 2 --
>  include/configs/rk3399_common.h      | 3 ---
>  include/configs/ti_armv7_keystone2.h | 1 -
>  include/configs/uniphier.h           | 3 ---
>  include/configs/xilinx_zynqmp.h      | 2 --
>  scripts/config_whitelist.txt         | 1 -
>  27 files changed, 2 insertions(+), 37 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 13/20] usb: ehci: Get rid of CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> EHC reports supported maximum number of ports in the HCSPARAMS
> register, so it's unnecessary to use a hardcoded config option
> CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/ehci-hcd.c | 10 +++++++---
>  drivers/usb/host/ehci.h     |  7 +++----
>  2 files changed, 10 insertions(+), 7 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 14/20] configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
> remove it in all boards' config files.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/arm/include/asm/ehci-omap.h    | 4 ----
>  include/configs/MPC8572DS.h         | 1 -
>  include/configs/cm_t54.h            | 1 -
>  include/configs/corvus.h            | 3 ---
>  include/configs/duovero.h           | 2 --
>  include/configs/exynos5-common.h    | 2 --
>  include/configs/ma5d4evk.h          | 1 -
>  include/configs/mcx.h               | 1 -
>  include/configs/mvebu_armada-37xx.h | 7 +------
>  include/configs/mvebu_armada-8k.h   | 7 +------
>  include/configs/mx35pdk.h           | 1 -
>  include/configs/odroid.h            | 1 -
>  include/configs/omap3_beagle.h      | 1 -
>  include/configs/omap3_overo.h       | 1 -
>  include/configs/omap4_panda.h       | 2 --
>  include/configs/omap5_uevm.h        | 1 -
>  include/configs/picosam9g45.h       | 3 ---
>  include/configs/sama5d2_ptc.h       | 4 ----
>  include/configs/snapper9g45.h       | 3 ---
>  include/configs/sunxi-common.h      | 1 -
>  include/configs/tam3517-common.h    | 1 -
>  include/configs/tao3530.h           | 1 -
>  include/configs/tegra114-common.h   | 1 -
>  include/configs/tegra124-common.h   | 1 -
>  include/configs/tegra20-common.h    | 1 -
>  include/configs/tegra210-common.h   | 1 -
>  include/configs/tegra30-common.h    | 1 -
>  include/configs/vinco.h             | 6 ------
>  include/configs/x86-common.h        | 1 -
>  scripts/config_whitelist.txt        | 1 -
>  30 files changed, 2 insertions(+), 60 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 15/20] usb: cmd: Print actual packet size for super speed devices

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> USB 3.0 defines bMaxPacketSize0 field in the device descriptor as
> the exponent of 2, so let's print the calculated actual size.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  cmd/usb.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

Please see below.

>
> diff --git a/cmd/usb.c b/cmd/usb.c
> index 4fa456e..1bdd391 100644
> --- a/cmd/usb.c
> +++ b/cmd/usb.c
> @@ -150,6 +150,8 @@ static void usb_display_string(struct usb_device *dev, int index)
>
>  static void usb_display_desc(struct usb_device *dev)
>  {
> +       u16 bMaxPacketSize0 = dev->descriptor.bMaxPacketSize0;

I suggest uint and also 'normal' variable name like packet_size.

> +
>         if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) {
>                 printf("%d: %s,  USB Revision %x.%x\n", dev->devnum,
>                 usb_get_class_desc(dev->config.if_desc[0].desc.bInterfaceClass),
> @@ -171,9 +173,10 @@ static void usb_display_desc(struct usb_device *dev)
>                                usb_get_class_desc(
>                                 dev->config.if_desc[0].desc.bInterfaceClass));
>                 }
> +               if (dev->descriptor.bcdUSB >= cpu_to_le16(0x0300))
> +                       bMaxPacketSize0 = 1 << bMaxPacketSize0;
>                 printf(" - PacketSize: %d  Configurations: %d\n",
> -                       dev->descriptor.bMaxPacketSize0,
> -                       dev->descriptor.bNumConfigurations);
> +                       bMaxPacketSize0, dev->descriptor.bNumConfigurations);
>                 printf(" - Vendor: 0x%04x  Product 0x%04x Version %d.%d\n",
>                         dev->descriptor.idVendor, dev->descriptor.idProduct,
>                         (dev->descriptor.bcdDevice>>8) & 0xff,
> --
> 2.9.2
>

Regards,
Simon

[U-Boot] [PATCH 16/20] usb: xhci: Convert CONFIG_USB_XHCI_PCI to Kconfig

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> Add CONFIG_USB_XHCI_PCI as a Kconfig option.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  drivers/usb/host/Kconfig | 6 ++++++
>  1 file changed, 6 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

>
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index b824eec..4222483 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -31,6 +31,12 @@ config USB_XHCI_MVEBU
>           SoCs, which includes Armada8K, Armada3700 and other Armada
>           family SoCs.
>
> +config USB_XHCI_PCI
> +       bool "Support for PCI based xHCI USB controller"
> +       default y if X86
> +       help
> +         Enables support for the PCI based xHCI controller.

PCI-based

> +
>  config USB_XHCI_ROCKCHIP
>         bool "Support for Rockchip on-chip xHCI USB controller"
>         depends on ARCH_ROCKCHIP
> --
> 2.9.2
>

[U-Boot] [PATCH 17/20] x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
> VBUS on/off. Let's configure them in the misc_init_r().
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  board/intel/minnowmax/minnowmax.c | 53 +++++++++++++++++++++++++++++++++++++++
>  include/configs/minnowmax.h       |  1 +
>  2 files changed, 54 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

I wonder if this GPIO information could/should be in the device tree?

[U-Boot] [PATCH 18/20] x86: minnowmax: Add a environment variable for USB power-on delay

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> Occasionally it was observed that on Intel MinnowMax board, with a
> USB 2.0 device connected to the bottom port, when doing 'usb start'
> on the xHCI controller:
>
>   scanning bus 0 for devices... cannot reset port 3!?
>
> But neither of the two USB ports is routed to xHCI root port 3.
> Adding some debug information shows that xHCI port 3 PORTSC register
> mysteriously reports both CCS = 1 and CSC = 1.
>
> This is not seen every time. After increasing the timeout to wait
> for power to become stable, the issue is gone. So this indicates
> current default USB power-on delay (20ms) might be at a critical
> region where power is stable/unstable. U-Boot provides a mechanism
> to have a environment variable to override the default one. Add
> one for MinnowMax.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  include/configs/minnowmax.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 19/20] x86: minnowmax: Enable USB xHCI support

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> BayTrail SoC supports both EHCI and xHCI controllers. However only
> one host controller (either EHCI or xHCI) can be used. To enable
> HSIC and SS ports, xHCI must be used. This turns on xHCI support on
> Intel MinnowMax board.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/dts/minnowmax.dts  | 3 +++
>  configs/minnowmax_defconfig | 1 +
>  2 files changed, 4 insertions(+)

Reviewed-by: Simon Glass <sjg@chromium.org>

Arguably there is no point in the #ifdef in the .dts file, since this
file should be in sync with the defconfig.

>
> diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
> index 4c0a8fe..a0ad03c 100644
> --- a/arch/x86/dts/minnowmax.dts
> +++ b/arch/x86/dts/minnowmax.dts
> @@ -272,6 +272,9 @@
>                 fsp,enable-spi;
>                 fsp,enable-sata;
>                 fsp,sata-mode = <SATA_MODE_AHCI>;
> +#ifdef CONFIG_USB_XHCI_HCD
> +               fsp,enable-xhci;
> +#endif
>                 fsp,lpe-mode = <LPE_MODE_PCI>;
>                 fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
>                 fsp,enable-dma0;
> diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
> index aa50e88..289b4c8 100644
> --- a/configs/minnowmax_defconfig
> +++ b/configs/minnowmax_defconfig
> @@ -68,6 +68,7 @@ CONFIG_ICH_SPI=y
>  CONFIG_TIMER=y
>  CONFIG_USB=y
>  CONFIG_DM_USB=y
> +CONFIG_USB_XHCI_HCD=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_USB_KEYBOARD=y
>  CONFIG_DM_VIDEO=y
> --
> 2.9.2
>

[U-Boot] [PATCH 20/20] x86: Remove CONFIG_USB_MAX_CONTROLLER_COUNT

[Simon Glass]

On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
> As all x86 boards have been switched over to use DM USB, remove
> CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  include/configs/conga-qeval20-qa3-e3845.h | 3 ---
>  include/configs/dfi-bt700.h               | 3 ---
>  include/configs/minnowmax.h               | 3 ---
>  include/configs/x86-common.h              | 1 -
>  4 files changed, 10 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH 17/20] x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS

[Bin Meng]

Hi Simon,

On Sat, Jun 17, 2017 at 11:44 AM, Simon Glass <sjg@chromium.org> wrote:
> On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
>> GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
>> VBUS on/off. Let's configure them in the misc_init_r().
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  board/intel/minnowmax/minnowmax.c | 53 +++++++++++++++++++++++++++++++++++++++
>>  include/configs/minnowmax.h       |  1 +
>>  2 files changed, 54 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> I wonder if this GPIO information could/should be in the device tree?

The GPIO pin info is currently under the pinctlr node in the device
tree, but the GPIO programming codes in the pinctlr driver are not
working on BayTrail due to GPIO "use-lvl-write-cache" behavior.

Regards,
Bin

[U-Boot] [PATCH 19/20] x86: minnowmax: Enable USB xHCI support

[Bin Meng]

Hi Simon,

On Sat, Jun 17, 2017 at 11:44 AM, Simon Glass <sjg@chromium.org> wrote:
> On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
>> BayTrail SoC supports both EHCI and xHCI controllers. However only
>> one host controller (either EHCI or xHCI) can be used. To enable
>> HSIC and SS ports, xHCI must be used. This turns on xHCI support on
>> Intel MinnowMax board.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/dts/minnowmax.dts  | 3 +++
>>  configs/minnowmax_defconfig | 1 +
>>  2 files changed, 4 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> Arguably there is no point in the #ifdef in the .dts file, since this
> file should be in sync with the defconfig.
>

Yep, but I wanted to do 'make minnowmax_defconfig', 'make menuconfig'
to remove CONFIG_USB_XHCI_HCD and 'make'. This way I can get an EHCI
enabled U-Boot without manually editing the device tree.

Regards,
Bin

[U-Boot] [PATCH 05/20] usb: hub: Update handling connect status/change in usb_scan_port()

[Dinh Nguyen]

On 06/16/2017 09:19 AM, Marek Vasut wrote:
> On 06/16/2017 03:31 PM, Bin Meng wrote:
>> It was observed that on Intel MinnowMax board, when xHCI is enabled
>> in the BayTrail SoC, with a USB 3.0 device connected to the bottom
>> USB 3.0 port (mapped to xHCI root port #7), its PORTSC register is
>> always 0x201203 (CCS = 1, CSC = 0). The root cause of such behavior
>> is unknown yet. Connect status change bit is set on the same port
>> with a USB 2.0 device (mapped to xHCI port #1, which is a different
>> port on the root hub).
>>
>> With current logic in usb_scan_port(), the enumeration process will
>> abort if it does not detect a connect status change on a hub port.
>> However since a device connection status is correctly reported, the
>> enumeration process can still continue.
>>
>> With this change, USB device connected to the bottom blue port on
>> MinnowMax board can be enumerated under either SS or HS mode.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> 
> I'd be slightly concerned this can break some other controllers, like
> the DWC2 . CCing Dinh, maybe he can test it on SoCFPGA.
> 

I tested this patch on a SoCFPGA Atlas/DE0-Nano board, and USB is still
working fine.

Feel free to add:

Tested-by: Dinh Nguyen <dinguyen@kernel.org>

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Stefan Roese]

Hi Bin,

On 16.06.2017 15:31, Bin Meng wrote:
> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
> the board. This series fixes a bunch of xHCI driver issues to make it
> work on Intel's platform.
> 
> Issues identified in the U-Boot xHCI driver are really spec violations,
> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
> are quite tolerant with these spec violations, or IOW those IPs don't
> respect the xHCI spec. While it comes to Intel platform, it just breaks.
> 
> Note xHCI interrupt transfer is still not supported in this series, as
> it has been there since the original commit of xHCI support for years.
> 
> Tested on Intel MinnowMax board with the following USB devices:
> - Dell USB 1.1 keyboard
> - Dell USB 2.0 mouse
> - Netac USB 2.0 flash disk
> - JetFlash USB 3.0 flash disk
> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>    ethernet chipset connected to one of its downstream port
> 
> Testing were performed on both ports (2.0 port and 3.0 port), and both
> ports are connected to xHCI (configure MinnowMax to enable xHCI).
> 
> Testing results:
> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>    both ports
> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>    and the integrated Realtek USB ethernet chipset enumerated as well.
>    USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>    but DELL USB 1.1 keyboard and 2.0 mouse cannot.
> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>    but the integrated Realtek USB ethernet chipset cannot be enumerated.
>    None of devices connected via the hub can be enumerated. U-Boot xHCI
>    driver just throws BUG_ON() on the event TRB handling.
> 
> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
> So far this series tries to fix some of the issues identified, but the
> USB 3.0 hub is still not working. This will be left as future work, or
> if someone else is interested it to pick up the work.
> 
> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
> added "Set Hub Depth" request support, xHCI codes update to fill in
> hub description fields in the input slot context when issuing commands
> to xHC, etc.

I've now installed this version on one of my BayTrail targets (DFI SoM
based). And yes, I'm now able to detect USB devices connected to
the HSIC ports of the BayTrail only connected to xHCI and not eHCI.
But I have a problem detecting these USB devices after a reset
has occured. Here the log after a power-up:

U-Boot 2017.07-rc1-00297-gbedd877d5d-dirty (Jun 20 2017 - 16:41:19 +0200)

CPU: x86_64, vendor Intel, device 30679h
DRAM:  4 GiB
MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
SF: Detected w25q64cv with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Model: theadorable-x86-DFI-BT700
SCSI:  Target spinup took 0 ms.
SATA link 1 timeout.
AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: 64bit ncq stag pm led clo pio slum part sxs 
scanning bus for devices...
  Device 0: (0:0) Vendor: ATA Prod.: SanDisk Ultra II Rev: X411
            Type: Hard Disk
            Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
Found 1 device(s).
Net:   No ethernet found.
960138 bytes read in 73 ms (12.5 MiB/s)
Video: 800x600x16
Hit any key to stop autoboot:  0 
=> usb reset
resetting USB...
USB0:   Register 7000820 NbrPorts 7
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 5 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller 
  |
  +-2  Vendor specific (480 Mb/s, 180mA)
  |    Realtek USB 10/100/1000 LAN 000002000000
  |  
  +-3  Hub (480 Mb/s, 2mA)
    |
    +-4  Mass Storage (480 Mb/s, 200mA)
    |    JetFlash Mass Storage Device 3281440601
    |  
    +-5  Mass Storage (480 Mb/s, 300mA)
         Kingston DataTraveler 2.0 C860008863CCBFC07A0668FC
       
=> reset
resetting ...
=>

U-Boot 2017.07-rc1-00297-gbedd877d5d-dirty (Jun 20 2017 - 16:41:19 +0200)

CPU: x86_64, vendor Intel, device 30679h
DRAM:  4 GiB
MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
SF: Detected w25q64cv with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Model: theadorable-x86-DFI-BT700
SCSI:  Target spinup took 0 ms.
SATA link 1 timeout.
AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: 64bit ncq stag pm led clo pio slum part sxs 
scanning bus for devices...
  Device 0: (0:0) Vendor: ATA Prod.: SanDisk Ultra II Rev: X411
            Type: Hard Disk
            Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
Found 1 device(s).
Net:   No ethernet found.
960138 bytes read in 73 ms (12.5 MiB/s)
Video: 800x600x16
Hit any key to stop autoboot:  0 
=> usb reset
resetting USB...
USB0:   Register 7000820 NbrPorts 7
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller 
  |
  +-2  Vendor specific (480 Mb/s, 180mA)
       Realtek USB 10/100/1000 LAN 000002000000


As you can see, the 2 USB mass storage devices which are connected
to the xHCI HSIC port are only detected after a power-up and not
after a system reset.

Is this something that you can reproduce on your setup? Could you
please check and let me know if this works for you or if you have
an idea on this issue?

Thanks,
Stefan

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Bin Meng]

Hi Stefan,

On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese <sr@denx.de> wrote:
> Hi Bin,
>
> On 16.06.2017 15:31, Bin Meng wrote:
>> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
>> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
>> the board. This series fixes a bunch of xHCI driver issues to make it
>> work on Intel's platform.
>>
>> Issues identified in the U-Boot xHCI driver are really spec violations,
>> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
>> are quite tolerant with these spec violations, or IOW those IPs don't
>> respect the xHCI spec. While it comes to Intel platform, it just breaks.
>>
>> Note xHCI interrupt transfer is still not supported in this series, as
>> it has been there since the original commit of xHCI support for years.
>>
>> Tested on Intel MinnowMax board with the following USB devices:
>> - Dell USB 1.1 keyboard
>> - Dell USB 2.0 mouse
>> - Netac USB 2.0 flash disk
>> - JetFlash USB 3.0 flash disk
>> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>>    ethernet chipset connected to one of its downstream port
>>
>> Testing were performed on both ports (2.0 port and 3.0 port), and both
>> ports are connected to xHCI (configure MinnowMax to enable xHCI).
>>
>> Testing results:
>> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
>> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>>    both ports
>> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>>    and the integrated Realtek USB ethernet chipset enumerated as well.
>>    USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>>    but DELL USB 1.1 keyboard and 2.0 mouse cannot.
>> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>>    but the integrated Realtek USB ethernet chipset cannot be enumerated.
>>    None of devices connected via the hub can be enumerated. U-Boot xHCI
>>    driver just throws BUG_ON() on the event TRB handling.
>>
>> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
>> So far this series tries to fix some of the issues identified, but the
>> USB 3.0 hub is still not working. This will be left as future work, or
>> if someone else is interested it to pick up the work.
>>
>> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
>> added "Set Hub Depth" request support, xHCI codes update to fill in
>> hub description fields in the input slot context when issuing commands
>> to xHC, etc.
>
> I've now installed this version on one of my BayTrail targets (DFI SoM
> based). And yes, I'm now able to detect USB devices connected to
> the HSIC ports of the BayTrail only connected to xHCI and not eHCI.
> But I have a problem detecting these USB devices after a reset
> has occured. Here the log after a power-up:
>
> U-Boot 2017.07-rc1-00297-gbedd877d5d-dirty (Jun 20 2017 - 16:41:19 +0200)
>
> CPU: x86_64, vendor Intel, device 30679h
> DRAM:  4 GiB
> MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
> SF: Detected w25q64cv with page size 256 Bytes, erase size 4 KiB, total 8 MiB
> Model: theadorable-x86-DFI-BT700
> SCSI:  Target spinup took 0 ms.
> SATA link 1 timeout.
> AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
> flags: 64bit ncq stag pm led clo pio slum part sxs
> scanning bus for devices...
>   Device 0: (0:0) Vendor: ATA Prod.: SanDisk Ultra II Rev: X411
>             Type: Hard Disk
>             Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
> Found 1 device(s).
> Net:   No ethernet found.
> 960138 bytes read in 73 ms (12.5 MiB/s)
> Video: 800x600x16
> Hit any key to stop autoboot:  0
> => usb reset
> resetting USB...
> USB0:   Register 7000820 NbrPorts 7
> Starting the controller
> USB XHCI 1.00
> scanning bus 0 for devices... 5 USB Device(s) found
>        scanning usb for storage devices... 2 Storage Device(s) found
> => usb tree
> USB device tree:
>   1  Hub (5 Gb/s, 0mA)
>   |  U-Boot XHCI Host Controller
>   |
>   +-2  Vendor specific (480 Mb/s, 180mA)
>   |    Realtek USB 10/100/1000 LAN 000002000000
>   |
>   +-3  Hub (480 Mb/s, 2mA)
>     |
>     +-4  Mass Storage (480 Mb/s, 200mA)
>     |    JetFlash Mass Storage Device 3281440601
>     |
>     +-5  Mass Storage (480 Mb/s, 300mA)
>          Kingston DataTraveler 2.0 C860008863CCBFC07A0668FC
>
> => reset
> resetting ...
> =>
>
> U-Boot 2017.07-rc1-00297-gbedd877d5d-dirty (Jun 20 2017 - 16:41:19 +0200)
>
> CPU: x86_64, vendor Intel, device 30679h
> DRAM:  4 GiB
> MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
> SF: Detected w25q64cv with page size 256 Bytes, erase size 4 KiB, total 8 MiB
> Model: theadorable-x86-DFI-BT700
> SCSI:  Target spinup took 0 ms.
> SATA link 1 timeout.
> AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
> flags: 64bit ncq stag pm led clo pio slum part sxs
> scanning bus for devices...
>   Device 0: (0:0) Vendor: ATA Prod.: SanDisk Ultra II Rev: X411
>             Type: Hard Disk
>             Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
> Found 1 device(s).
> Net:   No ethernet found.
> 960138 bytes read in 73 ms (12.5 MiB/s)
> Video: 800x600x16
> Hit any key to stop autoboot:  0
> => usb reset
> resetting USB...
> USB0:   Register 7000820 NbrPorts 7
> Starting the controller
> USB XHCI 1.00
> scanning bus 0 for devices... 2 USB Device(s) found
>        scanning usb for storage devices... 0 Storage Device(s) found
> => usb tree
> USB device tree:
>   1  Hub (5 Gb/s, 0mA)
>   |  U-Boot XHCI Host Controller
>   |
>   +-2  Vendor specific (480 Mb/s, 180mA)
>        Realtek USB 10/100/1000 LAN 000002000000
>
>
> As you can see, the 2 USB mass storage devices which are connected
> to the xHCI HSIC port are only detected after a power-up and not
> after a system reset.
>
> Is this something that you can reproduce on your setup? Could you
> please check and let me know if this works for you or if you have
> an idea on this issue?

I cannot reproduce this on MinnowMax board. My testing env is one USB
2.0 flash disk connected to the upper port and another USB 3.0 flash
disk connected to the bottom port. Please check log below.

U-Boot 2017.07-rc1-00251-gfecf03a (Jun 21 2017 - 18:21:13 +0800)

CPU: x86_64, vendor Intel, device 30679h
DRAM:  2 GiB
MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
SF: Detected n25q64a with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Video: 1280x1024x16
Model: Intel Minnowboard Max
SCSI:  SATA link 0 timeout.
SATA link 1 timeout.
AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: 64bit ncq stag pm led clo pio slum part sxs
scanning bus for devices...
Found 0 device(s).
Net:   eth0: eth_rtl8169
Hit any key to stop autoboot:  0
=>
=>
=>
=> usb start
starting USB...
USB0:   Register 7000820 NbrPorts 7
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 3 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (5 Gb/s, 76mA)
  |    JetFlash Mass Storage Device 16Q6ZPH20GF3E8UQ
  |
  +-3  Mass Storage (480 Mb/s, 200mA)
       Netac OnlyDisk FF00ECB60800FFFF1526

=> reset
resetting ...


U-Boot 2017.07-rc1-00251-gfecf03a (Jun 21 2017 - 18:21:13 +0800)

CPU: x86_64, vendor Intel, device 30679h
DRAM:  2 GiB
MMC:   ValleyView SDHCI: 0, ValleyView SDHCI: 1, ValleyView SDHCI: 2
SF: Detected n25q64a with page size 256 Bytes, erase size 4 KiB, total 8 MiB
Video: 1280x1024x16
Model: Intel Minnowboard Max
SCSI:  SATA link 0 timeout.
SATA link 1 timeout.
AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode
flags: 64bit ncq stag pm led clo pio slum part sxs
scanning bus for devices...
Found 0 device(s).
Net:   eth0: eth_rtl8169
Hit any key to stop autoboot:  0
=>
=> usb start
starting USB...
USB0:   Register 7000820 NbrPorts 7
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 3 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (5 Gb/s, 0mA)
  |  U-Boot XHCI Host Controller
  |
  +-2  Mass Storage (480 Mb/s, 200mA)
  |    Netac OnlyDisk FF00ECB60800FFFF1526
  |
  +-3  Mass Storage (5 Gb/s, 76mA)
       JetFlash Mass Storage Device 16Q6ZPH20GF3E8UQ

Regards,
Bin

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Stefan Roese]

Hi Bin,

On 21.06.2017 12:24, Bin Meng wrote:
> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese <sr@denx.de> wrote:

<snip>

>> As you can see, the 2 USB mass storage devices which are connected
>> to the xHCI HSIC port are only detected after a power-up and not
>> after a system reset.
>>
>> Is this something that you can reproduce on your setup? Could you
>> please check and let me know if this works for you or if you have
>> an idea on this issue?
> 
> I cannot reproduce this on MinnowMax board. My testing env is one USB
> 2.0 flash disk connected to the upper port and another USB 3.0 flash
> disk connected to the bottom port. Please check log below.

Thanks for testing. This issue seems to be related to the HSIC ports
only connected to the xHCI and not the EHCI. I did the same test with
USB memory devices connected to the "normal" USB ports that are also
connected to the EHCI and they "survive" the reset the same way
as your test on MinnowMax shows. I assume that those HSIC ports are
not available / connected on MinnowMax, right?

Do you by any chance have some ideas on why this might be handled
differently on these HSIC ports?

Thanks,
Stefan

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Stefan Roese]

Hi Bin,

On 16.06.2017 15:31, Bin Meng wrote:
> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
> the board. This series fixes a bunch of xHCI driver issues to make it
> work on Intel's platform.
> 
> Issues identified in the U-Boot xHCI driver are really spec violations,
> but apparently other xHCI IPs found on ARM SoCs (mainly Synopsis IP?)
> are quite tolerant with these spec violations, or IOW those IPs don't
> respect the xHCI spec. While it comes to Intel platform, it just breaks.
> 
> Note xHCI interrupt transfer is still not supported in this series, as
> it has been there since the original commit of xHCI support for years.
> 
> Tested on Intel MinnowMax board with the following USB devices:
> - Dell USB 1.1 keyboard
> - Dell USB 2.0 mouse
> - Netac USB 2.0 flash disk
> - JetFlash USB 3.0 flash disk
> - GenesysLogic 4-port USB 3.0 hub, with an integrated Realtek USB
>    ethernet chipset connected to one of its downstream port
> 
> Testing were performed on both ports (2.0 port and 3.0 port), and both
> ports are connected to xHCI (configure MinnowMax to enable xHCI).
> 
> Testing results:
> - DELL USB 1.1 keyboard and 2.0 mouse can be enumerated on both ports
> - USB 2.0 and 3.0 flash disks work fine (enumerated, read/write) on
>    both ports
> - GenesysLogic USB 3.0 hub can be enumerated on 2.0 port as a 2.0 hub,
>    and the integrated Realtek USB ethernet chipset enumerated as well.
>    USB 2.0 and 3.0 flash disks connected via the hub can be enumerated,
>    but DELL USB 1.1 keyboard and 2.0 mouse cannot.
> - GenesysLogic USB 3.0 hub can be enumerated on 3.0 port as a 3.0 hub,
>    but the integrated Realtek USB ethernet chipset cannot be enumerated.
>    None of devices connected via the hub can be enumerated. U-Boot xHCI
>    driver just throws BUG_ON() on the event TRB handling.
> 
> This indicates that USB 3.0 hub support in U-Boot is seriously broken.
> So far this series tries to fix some of the issues identified, but the
> USB 3.0 hub is still not working. This will be left as future work, or
> if someone else is interested it to pick up the work.
> 
> The USB 3.0 hub work includes: port status translation, USB 3.0 newly
> added "Set Hub Depth" request support, xHCI codes update to fill in
> hub description fields in the input slot context when issuing commands
> to xHC, etc.

Apart from the comments already sent by Simon, you can add my:

Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] [PATCH 12/20] configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards

[Stefan Roese]

Hi Bin,

On 16.06.2017 16:06, Bin Meng wrote:
> Hi Stefan,
> 
> On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
>> remove it in all boards' config files.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>   include/configs/am43xx_evm.h         | 1 -
>>   include/configs/am57xx_evm.h         | 1 -
>>   include/configs/cl-som-am57x.h       | 1 -
>>   include/configs/cm_t43.h             | 1 -
>>   include/configs/dra7xx_evm.h         | 1 -
>>   include/configs/ds414.h              | 1 -
>>   include/configs/exynos5-common.h     | 1 -
>>   include/configs/ls1012afrdm.h        | 1 -
>>   include/configs/ls1012aqds.h         | 1 -
>>   include/configs/ls1012ardb.h         | 1 -
>>   include/configs/ls1021aiot.h         | 1 -
>>   include/configs/ls1021aqds.h         | 1 -
>>   include/configs/ls1021atwr.h         | 1 -
>>   include/configs/ls1043aqds.h         | 1 -
>>   include/configs/ls1043ardb.h         | 1 -
>>   include/configs/ls1046aqds.h         | 1 -
>>   include/configs/ls1046ardb.h         | 1 -
>>   include/configs/ls2080aqds.h         | 1 -
>>   include/configs/ls2080ardb.h         | 1 -
>>   include/configs/mvebu_armada-37xx.h  | 4 +---
>>   include/configs/mvebu_armada-8k.h    | 4 +---
>>   include/configs/rk3328_common.h      | 2 --
>>   include/configs/rk3399_common.h      | 3 ---
>>   include/configs/ti_armv7_keystone2.h | 1 -
>>   include/configs/uniphier.h           | 3 ---
>>   include/configs/xilinx_zynqmp.h      | 2 --
>>   scripts/config_whitelist.txt         | 1 -
>>   27 files changed, 2 insertions(+), 37 deletions(-)
>>
> 
> [snip]
> 
>> diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
>> index 2dab065..0a4c90c 100644
>> --- a/include/configs/ls2080ardb.h
>> +++ b/include/configs/ls2080ardb.h
>> @@ -349,7 +349,6 @@ unsigned long get_board_sys_clk(void);
>>   #define CONFIG_HAS_FSL_XHCI_USB
>>   #define CONFIG_USB_XHCI_FSL
>>   #define CONFIG_USB_MAX_CONTROLLER_COUNT         2
>> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
>>
>>   #undef CONFIG_CMDLINE_EDITING
>>   #include <config_distro_defaults.h>
>> diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
>> index 5408490..7a255a1 100644
>> --- a/include/configs/mvebu_armada-37xx.h
>> +++ b/include/configs/mvebu_armada-37xx.h
>> @@ -98,10 +98,8 @@
>>   #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
>>
>>   /* USB 3.0 */
>> -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
>> -
>>   #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
>> -                                        CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
>> +                                        3)
> 
> I strongly suspect here CONFIG_USB_MAX_CONTROLLER_COUNT is mistakenly
> configured, unless each host controller only has 1 root port? Please
> review.

Yes, you seem to be correct, thanks.

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] [PATCH 14/20] configs: Remove CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS in all boards

[Stefan Roese]

Hi Bin,

On 16.06.2017 16:09, Bin Meng wrote:
> Hi Stefan,
> 
> On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
>> remove it in all boards' config files.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>   arch/arm/include/asm/ehci-omap.h    | 4 ----
>>   include/configs/MPC8572DS.h         | 1 -
>>   include/configs/cm_t54.h            | 1 -
>>   include/configs/corvus.h            | 3 ---
>>   include/configs/duovero.h           | 2 --
>>   include/configs/exynos5-common.h    | 2 --
>>   include/configs/ma5d4evk.h          | 1 -
>>   include/configs/mcx.h               | 1 -
>>   include/configs/mvebu_armada-37xx.h | 7 +------
>>   include/configs/mvebu_armada-8k.h   | 7 +------
>>   include/configs/mx35pdk.h           | 1 -
>>   include/configs/odroid.h            | 1 -
>>   include/configs/omap3_beagle.h      | 1 -
>>   include/configs/omap3_overo.h       | 1 -
>>   include/configs/omap4_panda.h       | 2 --
>>   include/configs/omap5_uevm.h        | 1 -
>>   include/configs/picosam9g45.h       | 3 ---
>>   include/configs/sama5d2_ptc.h       | 4 ----
>>   include/configs/snapper9g45.h       | 3 ---
>>   include/configs/sunxi-common.h      | 1 -
>>   include/configs/tam3517-common.h    | 1 -
>>   include/configs/tao3530.h           | 1 -
>>   include/configs/tegra114-common.h   | 1 -
>>   include/configs/tegra124-common.h   | 1 -
>>   include/configs/tegra20-common.h    | 1 -
>>   include/configs/tegra210-common.h   | 1 -
>>   include/configs/tegra30-common.h    | 1 -
>>   include/configs/vinco.h             | 6 ------
>>   include/configs/x86-common.h        | 1 -
>>   scripts/config_whitelist.txt        | 1 -
>>   30 files changed, 2 insertions(+), 60 deletions(-)
>>
> 
> [snip]
> 
>> diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
>> index 7a255a1..a9a2437 100644
>> --- a/include/configs/mvebu_armada-37xx.h
>> +++ b/include/configs/mvebu_armada-37xx.h
>> @@ -94,12 +94,7 @@
>>   #define CONFIG_NET_RETRY_COUNT 50
>>   #define CONFIG_PHY_MARVELL
>>
>> -/* USB 2.0 */
>> -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
>> -
>> -/* USB 3.0 */
>> -#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
>> -                                        3)
>> +#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
> 
> I strongly suspect here CONFIG_USB_MAX_CONTROLLER_COUNT is mistakenly
> configured, unless each host controller only has 1 root port? Please
> review.

Yes, you seem to be correct, thanks.

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Bin Meng]

Hi Stefan,

On Wed, Jun 21, 2017 at 8:07 PM, Stefan Roese <sr@denx.de> wrote:
> Hi Bin,
>
> On 21.06.2017 12:24, Bin Meng wrote:
>> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese <sr@denx.de> wrote:
>
> <snip>
>
>>> As you can see, the 2 USB mass storage devices which are connected
>>> to the xHCI HSIC port are only detected after a power-up and not
>>> after a system reset.
>>>
>>> Is this something that you can reproduce on your setup? Could you
>>> please check and let me know if this works for you or if you have
>>> an idea on this issue?
>>
>> I cannot reproduce this on MinnowMax board. My testing env is one USB
>> 2.0 flash disk connected to the upper port and another USB 3.0 flash
>> disk connected to the bottom port. Please check log below.
>
> Thanks for testing. This issue seems to be related to the HSIC ports
> only connected to the xHCI and not the EHCI. I did the same test with
> USB memory devices connected to the "normal" USB ports that are also
> connected to the EHCI and they "survive" the reset the same way
> as your test on MinnowMax shows. I assume that those HSIC ports are
> not available / connected on MinnowMax, right?
>

Correct. There are no HSIC ports available on MinnowMax.

> Do you by any chance have some ideas on why this might be handled
> differently on these HSIC ports?
>

Maybe there are some quirks that the HSIC ports are having issues
after a reset. Like the issue I observed on the SS port as mentioned
in this patch [1] that SS port does not report CSC.

Can you enable -DDEBUG and send me the log?

[1] http://patchwork.ozlabs.org/patch/776728/

Regards,
Bin

[U-Boot] [PATCH 00/20] usb: xhci: Fix USB xHCI support on Intel platform

[Bin Meng]

Hi,

On Wed, Jun 21, 2017 at 8:44 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Stefan,
>
> On Wed, Jun 21, 2017 at 8:07 PM, Stefan Roese <sr@denx.de> wrote:
>> Hi Bin,
>>
>> On 21.06.2017 12:24, Bin Meng wrote:
>>> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese <sr@denx.de> wrote:
>>
>> <snip>
>>
>>>> As you can see, the 2 USB mass storage devices which are connected
>>>> to the xHCI HSIC port are only detected after a power-up and not
>>>> after a system reset.
>>>>
>>>> Is this something that you can reproduce on your setup? Could you
>>>> please check and let me know if this works for you or if you have
>>>> an idea on this issue?
>>>
>>> I cannot reproduce this on MinnowMax board. My testing env is one USB
>>> 2.0 flash disk connected to the upper port and another USB 3.0 flash
>>> disk connected to the bottom port. Please check log below.
>>
>> Thanks for testing. This issue seems to be related to the HSIC ports
>> only connected to the xHCI and not the EHCI. I did the same test with
>> USB memory devices connected to the "normal" USB ports that are also
>> connected to the EHCI and they "survive" the reset the same way
>> as your test on MinnowMax shows. I assume that those HSIC ports are
>> not available / connected on MinnowMax, right?
>>
>
> Correct. There are no HSIC ports available on MinnowMax.
>
>> Do you by any chance have some ideas on why this might be handled
>> differently on these HSIC ports?
>>
>
> Maybe there are some quirks that the HSIC ports are having issues
> after a reset. Like the issue I observed on the SS port as mentioned
> in this patch [1] that SS port does not report CSC.
>
> Can you enable -DDEBUG and send me the log?
>

Just in case others on the ML are interested, Stefan sent me the log offline.

> [1] http://patchwork.ozlabs.org/patch/776728/

And to close this thread, the issue is related to the device connected
to HSIC port was not properly reset after a 'reset' command.

Regards,
Bin

[U-Boot] [PATCH 17/20] x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS

[Bin Meng]

On Sat, Jun 17, 2017 at 11:44 AM, Simon Glass <sjg@chromium.org> wrote:
> On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
>> GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
>> VBUS on/off. Let's configure them in the misc_init_r().
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  board/intel/minnowmax/minnowmax.c | 53 +++++++++++++++++++++++++++++++++++++++
>>  include/configs/minnowmax.h       |  1 +
>>  2 files changed, 54 insertions(+)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> I wonder if this GPIO information could/should be in the device tree?

applied to u-boot-x86, thanks!

[U-Boot] [PATCH 20/20] x86: Remove CONFIG_USB_MAX_CONTROLLER_COUNT

[Bin Meng]

On Sat, Jun 17, 2017 at 11:45 AM, Simon Glass <sjg@chromium.org> wrote:
> On 16 June 2017 at 07:31, Bin Meng <bmeng.cn@gmail.com> wrote:
>> As all x86 boards have been switched over to use DM USB, remove
>> CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>>  include/configs/conga-qeval20-qa3-e3845.h | 3 ---
>>  include/configs/dfi-bt700.h               | 3 ---
>>  include/configs/minnowmax.h               | 3 ---
>>  include/configs/x86-common.h              | 1 -
>>  4 files changed, 10 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86, thanks!