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From: Jing Zhang <renyu.zj@linux.alibaba.com>
To: Xing Zhengjun <zhengjun.xing@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	John Garry <john.garry@huawei.com>, Will Deacon <will@kernel.org>,
	James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Andrew Kilroy <andrew.kilroy@arm.com>,
	Shuai Xue <xueshuai@linux.alibaba.com>,
	Zhuo Song <zhuo.song@linux.alibaba.com>
Subject: Re: [RFC PATCH v2 3/6] perf vendor events arm64: Add cache metrics for neoverse-n2
Date: Tue, 15 Nov 2022 14:28:27 +0800	[thread overview]
Message-ID: <f832ac1f-5874-50f4-334f-5c4fb68cea7d@linux.alibaba.com> (raw)
In-Reply-To: <b39171e6-4af3-6102-2207-aad57dc92226@linux.intel.com>



在 2022/11/14 下午4:35, Xing Zhengjun 写道:
> 
> 
> On 11/14/2022 3:41 PM, Jing Zhang wrote:
>> Add cache related metrics.
>>
>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
>> ---
>>   .../arch/arm64/arm/neoverse-n2/metrics.json        | 77 ++++++++++++++++++++++
>>   1 file changed, 77 insertions(+)
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> index 324ca12..1690ef6 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -54,5 +54,82 @@
>>           "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
>>           "MetricGroup": "TLB",
>>           "MetricName": "dtlb_walk_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1i_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
>> +        "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> +        "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1i_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
>> +        "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> +        "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l2d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
>> +        "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> +        "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l2d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l3d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
>> +        "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> +        "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l3d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
>> +        "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
>> +        "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> +        "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
>> +        "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> +        "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_hit_rate"
>>       }
>>   ]
>> \ No newline at end of file
> 
> It is better to fix this by adding a newline at the end of the file.
> 
OK, thanks for pointing it out.


WARNING: multiple messages have this Message-ID (diff)
From: Jing Zhang <renyu.zj@linux.alibaba.com>
To: Xing Zhengjun <zhengjun.xing@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	John Garry <john.garry@huawei.com>, Will Deacon <will@kernel.org>,
	James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Andrew Kilroy <andrew.kilroy@arm.com>,
	Shuai Xue <xueshuai@linux.alibaba.com>,
	Zhuo Song <zhuo.song@linux.alibaba.com>
Subject: Re: [RFC PATCH v2 3/6] perf vendor events arm64: Add cache metrics for neoverse-n2
Date: Tue, 15 Nov 2022 14:28:27 +0800	[thread overview]
Message-ID: <f832ac1f-5874-50f4-334f-5c4fb68cea7d@linux.alibaba.com> (raw)
In-Reply-To: <b39171e6-4af3-6102-2207-aad57dc92226@linux.intel.com>



在 2022/11/14 下午4:35, Xing Zhengjun 写道:
> 
> 
> On 11/14/2022 3:41 PM, Jing Zhang wrote:
>> Add cache related metrics.
>>
>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
>> ---
>>   .../arch/arm64/arm/neoverse-n2/metrics.json        | 77 ++++++++++++++++++++++
>>   1 file changed, 77 insertions(+)
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> index 324ca12..1690ef6 100644
>> --- a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2/metrics.json
>> @@ -54,5 +54,82 @@
>>           "BriefDescription": "The rate of DTLB Walks to the overall TLB lookups",
>>           "MetricGroup": "TLB",
>>           "MetricName": "dtlb_walk_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L1I_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L1 I-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1i_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L1I_CACHE_REFILL / L1I_CACHE",
>> +        "PublicDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> +        "BriefDescription": "The rate of L1 I-Cache misses to the overall L1 I-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1i_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L1D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L1 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L1D_CACHE_REFILL / L1D_CACHE",
>> +        "PublicDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> +        "BriefDescription": "The rate of L1 D-Cache misses to the overall L1 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l1d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L2D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L2 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l2d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L2D_CACHE_REFILL / L2D_CACHE",
>> +        "PublicDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> +        "BriefDescription": "The rate of L2 D-Cache misses to the overall L2 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l2d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "L3D_CACHE_REFILL / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> +        "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l3d_cache_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "L3D_CACHE_REFILL / L3D_CACHE",
>> +        "PublicDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> +        "BriefDescription": "The rate of L3 D-Cache misses to the overall L3 D-Cache",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "l3d_cache_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "LL_CACHE_MISS_RD / INST_RETIRED * 1000",
>> +        "PublicDescription": "The rate of LL Cache read misses per kilo instructions",
>> +        "BriefDescription": "The rate of LL Cache read misses per kilo instructions",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_mpki"
>> +    },
>> +    {
>> +        "MetricExpr": "LL_CACHE_MISS_RD / LL_CACHE_RD",
>> +        "PublicDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> +        "BriefDescription": "The rate of LL Cache read misses to the overall LL Cache read",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_miss_rate"
>> +    },
>> +    {
>> +        "MetricExpr": "(LL_CACHE_RD - LL_CACHE_MISS_RD) / LL_CACHE_RD",
>> +        "PublicDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> +        "BriefDescription": "The rate of LL Cache read hit to the overall LL Cache read",
>> +        "MetricGroup": "Cache",
>> +        "MetricName": "ll_cache_read_hit_rate"
>>       }
>>   ]
>> \ No newline at end of file
> 
> It is better to fix this by adding a newline at the end of the file.
> 
OK, thanks for pointing it out.


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  reply	other threads:[~2022-11-15  6:28 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-31 11:11 [PATCH RFC 0/6] Add metrics for neoverse-n2 Jing Zhang
2022-10-31 11:11 ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-10-31 11:11 ` [PATCH RFC 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-10-31 11:11   ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 0/6] Add " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-30 18:58     ` Ian Rogers
2022-11-30 18:58       ` Ian Rogers
2022-12-01 11:08       ` Jing Zhang
2022-12-01 11:08         ` Jing Zhang
2022-12-02 20:05         ` Ian Rogers
2022-12-02 20:05           ` Ian Rogers
2022-12-04  7:10           ` Jing Zhang
2022-12-04  7:10             ` Jing Zhang
2022-11-24 17:14   ` [PATCH v3 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-11-24 17:14     ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 1/6] perf vendor events arm64: Add topdown L1 " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-14 12:59   ` [External] : " John Garry
2022-11-14 12:59     ` John Garry
2022-11-15  8:43     ` Jing Zhang
2022-11-15  8:43       ` Jing Zhang
2022-11-15 11:19       ` John Garry
2022-11-15 11:19         ` John Garry
2022-11-21  9:53         ` Jing Zhang
2022-11-21  9:53           ` Jing Zhang
2022-11-21 10:22           ` John Garry
2022-11-21 10:22             ` John Garry
2022-11-21 15:17             ` Jing Zhang
2022-11-21 15:17               ` Jing Zhang
2022-11-21 17:55               ` John Garry
2022-11-21 17:55                 ` John Garry
2022-11-22  9:24                 ` Jing Zhang
2022-11-22  9:24                   ` Jing Zhang
2022-11-22 14:00                 ` James Clark
2022-11-22 14:00                   ` James Clark
2022-11-22 15:41                   ` Jing Zhang
2022-11-22 15:41                     ` Jing Zhang
2022-11-23 14:26                     ` James Clark
2022-11-23 14:26                       ` James Clark
2022-11-24 16:32                       ` Jing Zhang
2022-11-24 16:32                         ` Jing Zhang
2022-11-24 16:51                         ` James Clark
2022-11-24 16:51                           ` James Clark
2022-11-14  7:41 ` [RFC PATCH v2 2/6] perf vendor events arm64: Add TLB " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 3/6] perf vendor events arm64: Add cache " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-14  8:35   ` Xing Zhengjun
2022-11-14  8:35     ` Xing Zhengjun
2022-11-15  6:28     ` Jing Zhang [this message]
2022-11-15  6:28       ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 4/6] perf vendor events arm64: Add branch " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-14  7:41 ` [RFC PATCH v2 5/6] perf vendor events arm64: Add PE utilization " Jing Zhang
2022-11-14  7:41   ` Jing Zhang
2022-11-14  7:42 ` [RFC PATCH v2 6/6] perf vendor events arm64: Add instruction mix " Jing Zhang
2022-11-14  7:42   ` Jing Zhang
2022-11-16 11:19 ` [PATCH RFC 0/6] Add " James Clark
2022-11-16 11:19   ` James Clark
2022-11-16 15:26   ` Jing Zhang
2022-11-16 15:26     ` Jing Zhang
2022-11-21 11:51     ` James Clark
2022-11-21 11:51       ` James Clark
2022-11-22  7:11       ` Jing Zhang
2022-11-22  7:11         ` Jing Zhang
2022-11-22 11:53         ` James Clark
2022-11-22 11:53           ` James Clark
2022-11-19  3:30   ` Jing Zhang
2022-11-19  3:30     ` Jing Zhang
     [not found]     ` <CAP-5=fW+Z_Tc3BfK1bRKUeKWfxtPfoZXL9D2BhcU1SzNOruSsg@mail.gmail.com>
2022-11-20  3:49       ` Jing Zhang
2022-11-20  3:49         ` Jing Zhang
2022-11-21 11:55       ` James Clark
2022-11-21 11:55         ` James Clark

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