From: Jeff Moyer <jmoyer@redhat.com> To: Dan Williams <dan.j.williams@intel.com> Cc: "Zwisler, Ross" <ross.zwisler@intel.com>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, linux-nvdimm@lists.01.org Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices Date: Tue, 13 Feb 2018 08:17:38 -0500 [thread overview] Message-ID: <x49bmgtqb9p.fsf@segfault.boston.devel.redhat.com> (raw) In-Reply-To: <CAPcyv4gt88pEivOyEGdYbTx9H2LV7+mQQ9H1ESWhzM+gpbtW0g@mail.gmail.com> (Dan Williams's message of "Mon, 12 Feb 2018 15:05:10 -0800") Dan Williams <dan.j.williams@intel.com> writes: > On Mon, Feb 12, 2018 at 2:53 PM, Jeff Moyer <jmoyer@redhat.com> wrote: >> Dave Jiang <dave.jiang@intel.com> writes: >> >>> Re-enable deep flush so that users always have a way to be sure that a write >>> does make it all the way out to the NVDIMM. The PMEM driver writes always >>> make it "all the way to the NVDIMM", and it relies on the ADR mechanism to >>> flush the write buffers on power failure. Deep flush is there to explicitly >>> flush those write buffers to protect against (rare) ADR failure. >>> This change prevents a regression in deep flush behavior so that applications >>> can continue to depend on fsync() as a mechanism to trigger deep flush in the >>> filesystem-dax case. >> >> That's still very confusing text. Specifically, the part where you say >> that pmem driver writes always make it to the DIMM. I think the >> changelog could start with "Deep flush is there to explicitly flush >> write buffers...." Anyway, the fix looks right to me. > > I ended up changing the commit message to this, let me know if it reads better: Thanks. It's still unclear to me what the text, "The PMEM driver writes always arrive at the NVDIMM" means. However, it's good enough. Thanks! Jeff > > libnvdimm: re-enable deep flush for pmem devices via fsync() > > Re-enable deep flush so that users always have a way to be sure that a > write makes it all the way out to media. The PMEM driver writes always > arrive at the NVDIMM, and it relies on the ADR (Asynchronous DRAM > Refresh) mechanism to flush the write buffers on power failure. Deep > flush is there to explicitly flush those write buffers to protect > against (rare) ADR failure. This change prevents a regression in deep > flush behavior so that applications can continue to depend on fsync() as > a mechanism to trigger deep flush in the filesystem-DAX case. > > Fixes: 06e8ccdab15f4 ("acpi: nfit: Add support for detect platform > CPU cache...") > Signed-off-by: Dave Jiang <dave.jiang@intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> _______________________________________________ Linux-nvdimm mailing list Linux-nvdimm@lists.01.org https://lists.01.org/mailman/listinfo/linux-nvdimm
WARNING: multiple messages have this Message-ID (diff)
From: Jeff Moyer <jmoyer@redhat.com> To: Dan Williams <dan.j.williams@intel.com> Cc: Dave Jiang <dave.jiang@intel.com>, "Zwisler\, Ross" <ross.zwisler@intel.com>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, linux-nvdimm@lists.01.org Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices Date: Tue, 13 Feb 2018 08:17:38 -0500 [thread overview] Message-ID: <x49bmgtqb9p.fsf@segfault.boston.devel.redhat.com> (raw) In-Reply-To: <CAPcyv4gt88pEivOyEGdYbTx9H2LV7+mQQ9H1ESWhzM+gpbtW0g@mail.gmail.com> (Dan Williams's message of "Mon, 12 Feb 2018 15:05:10 -0800") Dan Williams <dan.j.williams@intel.com> writes: > On Mon, Feb 12, 2018 at 2:53 PM, Jeff Moyer <jmoyer@redhat.com> wrote: >> Dave Jiang <dave.jiang@intel.com> writes: >> >>> Re-enable deep flush so that users always have a way to be sure that a write >>> does make it all the way out to the NVDIMM. The PMEM driver writes always >>> make it "all the way to the NVDIMM", and it relies on the ADR mechanism to >>> flush the write buffers on power failure. Deep flush is there to explicitly >>> flush those write buffers to protect against (rare) ADR failure. >>> This change prevents a regression in deep flush behavior so that applications >>> can continue to depend on fsync() as a mechanism to trigger deep flush in the >>> filesystem-dax case. >> >> That's still very confusing text. Specifically, the part where you say >> that pmem driver writes always make it to the DIMM. I think the >> changelog could start with "Deep flush is there to explicitly flush >> write buffers...." Anyway, the fix looks right to me. > > I ended up changing the commit message to this, let me know if it reads better: Thanks. It's still unclear to me what the text, "The PMEM driver writes always arrive at the NVDIMM" means. However, it's good enough. Thanks! Jeff > > libnvdimm: re-enable deep flush for pmem devices via fsync() > > Re-enable deep flush so that users always have a way to be sure that a > write makes it all the way out to media. The PMEM driver writes always > arrive at the NVDIMM, and it relies on the ADR (Asynchronous DRAM > Refresh) mechanism to flush the write buffers on power failure. Deep > flush is there to explicitly flush those write buffers to protect > against (rare) ADR failure. This change prevents a regression in deep > flush behavior so that applications can continue to depend on fsync() as > a mechanism to trigger deep flush in the filesystem-DAX case. > > Fixes: 06e8ccdab15f4 ("acpi: nfit: Add support for detect platform > CPU cache...") > Signed-off-by: Dave Jiang <dave.jiang@intel.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
next prev parent reply other threads:[~2018-02-13 13:11 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-02-12 21:46 [PATCH v2] libnvdimm: re-enable deep flush for pmem devices Dave Jiang 2018-02-12 21:46 ` Dave Jiang 2018-02-12 22:49 ` Dan Williams 2018-02-12 22:49 ` Dan Williams 2018-02-12 22:53 ` Jeff Moyer 2018-02-12 22:53 ` Jeff Moyer 2018-02-12 23:05 ` Dan Williams 2018-02-12 23:05 ` Dan Williams 2018-02-12 23:08 ` Ross Zwisler 2018-02-12 23:08 ` Ross Zwisler 2018-02-13 13:17 ` Jeff Moyer [this message] 2018-02-13 13:17 ` Jeff Moyer 2018-02-13 15:57 ` Dan Williams 2018-02-13 15:57 ` Dan Williams
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