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From: Jeff Moyer <jmoyer@redhat.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: ross.zwisler@intel.com, linux-kernel@vger.kernel.org,
	linux-nvdimm@lists.01.org
Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices
Date: Mon, 12 Feb 2018 17:53:40 -0500	[thread overview]
Message-ID: <x49inb1n7kb.fsf@segfault.boston.devel.redhat.com> (raw)
In-Reply-To: <151847194459.58291.11339638808076622981.stgit@djiang5-desk3.ch.intel.com> (Dave Jiang's message of "Mon, 12 Feb 2018 14:46:13 -0700")

Dave Jiang <dave.jiang@intel.com> writes:

> Re-enable deep flush so that users always have a way to be sure that a write
> does make it all the way out to the NVDIMM. The PMEM driver writes always
> make it "all the way to the NVDIMM", and it relies on the ADR mechanism to
> flush the write buffers on power failure. Deep flush is there to explicitly
> flush those write buffers to protect against (rare) ADR failure.
> This change prevents a regression in deep flush behavior so that applications
> can continue to depend on fsync() as a mechanism to trigger deep flush in the
> filesystem-dax case.

That's still very confusing text.  Specifically, the part where you say
that pmem driver writes always make it to the DIMM.  I think the
changelog could start with "Deep flush is there to explicitly flush
write buffers...."  Anyway, the fix looks right to me.

Reviewed-by: Jeff Moyer <jmoyer@redhat.com>
_______________________________________________
Linux-nvdimm mailing list
Linux-nvdimm@lists.01.org
https://lists.01.org/mailman/listinfo/linux-nvdimm

WARNING: multiple messages have this Message-ID (diff)
From: Jeff Moyer <jmoyer@redhat.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: dan.j.williams@intel.com, ross.zwisler@intel.com,
	linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org
Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices
Date: Mon, 12 Feb 2018 17:53:40 -0500	[thread overview]
Message-ID: <x49inb1n7kb.fsf@segfault.boston.devel.redhat.com> (raw)
In-Reply-To: <151847194459.58291.11339638808076622981.stgit@djiang5-desk3.ch.intel.com> (Dave Jiang's message of "Mon, 12 Feb 2018 14:46:13 -0700")

Dave Jiang <dave.jiang@intel.com> writes:

> Re-enable deep flush so that users always have a way to be sure that a write
> does make it all the way out to the NVDIMM. The PMEM driver writes always
> make it "all the way to the NVDIMM", and it relies on the ADR mechanism to
> flush the write buffers on power failure. Deep flush is there to explicitly
> flush those write buffers to protect against (rare) ADR failure.
> This change prevents a regression in deep flush behavior so that applications
> can continue to depend on fsync() as a mechanism to trigger deep flush in the
> filesystem-dax case.

That's still very confusing text.  Specifically, the part where you say
that pmem driver writes always make it to the DIMM.  I think the
changelog could start with "Deep flush is there to explicitly flush
write buffers...."  Anyway, the fix looks right to me.

Reviewed-by: Jeff Moyer <jmoyer@redhat.com>

  parent reply	other threads:[~2018-02-12 22:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-12 21:46 [PATCH v2] libnvdimm: re-enable deep flush for pmem devices Dave Jiang
2018-02-12 21:46 ` Dave Jiang
2018-02-12 22:49 ` Dan Williams
2018-02-12 22:49   ` Dan Williams
2018-02-12 22:53 ` Jeff Moyer [this message]
2018-02-12 22:53   ` Jeff Moyer
2018-02-12 23:05   ` Dan Williams
2018-02-12 23:05     ` Dan Williams
2018-02-12 23:08     ` Ross Zwisler
2018-02-12 23:08       ` Ross Zwisler
2018-02-13 13:17     ` Jeff Moyer
2018-02-13 13:17       ` Jeff Moyer
2018-02-13 15:57       ` Dan Williams
2018-02-13 15:57         ` Dan Williams

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