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From: Paul Walmsley <paul@pwsan.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: linux-omap@vger.kernel.org, nm@ti.com, khilman@ti.com,
	rnayak@ti.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv7 08/12] ARM: OMAP4430: PM: Work-around for ROM code BUG of PER pwrst ctrl
Date: Thu, 19 Jul 2012 17:21:54 -0600 (MDT)	[thread overview]
Message-ID: <alpine.DEB.2.00.1207191717220.14390@utopia.booyaka.com> (raw)
In-Reply-To: <1342704392-23657-9-git-send-email-t-kristo@ti.com>

Hi

On Thu, 19 Jul 2012, Tero Kristo wrote:

> On OMAP4430 HS / EMU chips, ROM code appears to re-configure L4PER domain
> next powerstate during wakeup from OSWR / OFF, programming it to ON.
> This will prevent successive entries to cpuidle retention / off, until
> kernel decices to change the L4PER target state, which can be delayed
> for a very long time as kernel is lazy programming the target state.
> 
> This patch fixes the issue within the low power OSWR / OFF mode code, so
> that this register is saved / restored across MPU OSWR / OFF state.
> 
> This problem seems to only occur with OMAP4430 HS/EMU, it does not impact
> OMAP4460+ or GP devices.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  arch/arm/mach-omap2/omap-mpuss-lowpower.c |   39 ++++++++++++++++++++++++++++-
>  arch/arm/mach-omap2/pm.h                  |    1 +
>  arch/arm/mach-omap2/pm44xx.c              |   10 +++++++
>  3 files changed, 49 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> index 0e5f81b..963a61b 100644
> --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c

...

> @@ -215,6 +225,28 @@ static void save_l2x0_context(void)
>  {}
>  #endif
>  
> +static inline void save_l4per_regs(void)
> +{
> +	int i;
> +
> +	if (!IS_PM44XX_ERRATUM(PM_OMAP4_ROM_L4PER_ERRATUM_PWSTCT))
> +		return;
> +
> +	for (i = 0; i < ARRAY_SIZE(l4per_reg); i++)
> +		l4per_reg[i].val = __raw_readl(l4per_reg[i].addr);

This is accessing the system PRM registers directly.  We're trying to 
remove these raw register accesses from non-PRM code because a PRM driver 
is in the works.  Please move this to prm44xx.c or prminst44xx.c and 
implement a higher-level interface that omap-mpuss-lowpower.c can call.


- Paul

WARNING: multiple messages have this Message-ID (diff)
From: paul@pwsan.com (Paul Walmsley)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv7 08/12] ARM: OMAP4430: PM: Work-around for ROM code BUG of PER pwrst ctrl
Date: Thu, 19 Jul 2012 17:21:54 -0600 (MDT)	[thread overview]
Message-ID: <alpine.DEB.2.00.1207191717220.14390@utopia.booyaka.com> (raw)
In-Reply-To: <1342704392-23657-9-git-send-email-t-kristo@ti.com>

Hi

On Thu, 19 Jul 2012, Tero Kristo wrote:

> On OMAP4430 HS / EMU chips, ROM code appears to re-configure L4PER domain
> next powerstate during wakeup from OSWR / OFF, programming it to ON.
> This will prevent successive entries to cpuidle retention / off, until
> kernel decices to change the L4PER target state, which can be delayed
> for a very long time as kernel is lazy programming the target state.
> 
> This patch fixes the issue within the low power OSWR / OFF mode code, so
> that this register is saved / restored across MPU OSWR / OFF state.
> 
> This problem seems to only occur with OMAP4430 HS/EMU, it does not impact
> OMAP4460+ or GP devices.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  arch/arm/mach-omap2/omap-mpuss-lowpower.c |   39 ++++++++++++++++++++++++++++-
>  arch/arm/mach-omap2/pm.h                  |    1 +
>  arch/arm/mach-omap2/pm44xx.c              |   10 +++++++
>  3 files changed, 49 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> index 0e5f81b..963a61b 100644
> --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
> +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c

...

> @@ -215,6 +225,28 @@ static void save_l2x0_context(void)
>  {}
>  #endif
>  
> +static inline void save_l4per_regs(void)
> +{
> +	int i;
> +
> +	if (!IS_PM44XX_ERRATUM(PM_OMAP4_ROM_L4PER_ERRATUM_PWSTCT))
> +		return;
> +
> +	for (i = 0; i < ARRAY_SIZE(l4per_reg); i++)
> +		l4per_reg[i].val = __raw_readl(l4per_reg[i].addr);

This is accessing the system PRM registers directly.  We're trying to 
remove these raw register accesses from non-PRM code because a PRM driver 
is in the works.  Please move this to prm44xx.c or prminst44xx.c and 
implement a higher-level interface that omap-mpuss-lowpower.c can call.


- Paul

  reply	other threads:[~2012-07-19 23:21 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-19 13:26 [PATCHv7 00/12] ARM: OMAP4: core retention support Tero Kristo
2012-07-19 13:26 ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 01/12] ARM: OMAP4: PM: add errata support Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 02/12] ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC control register change Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 03/12] ARM: OMAP4: hwmod: flag hwmods/modules not supporting module level context status Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-09-12 19:46   ` Paul Walmsley
2012-09-12 19:46     ` Paul Walmsley
2012-07-19 13:26 ` [PATCHv7 04/12] ARM: OMAP: hwmod: Add support for per hwmod/module context lost count Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-09-12 19:48   ` Paul Walmsley
2012-09-12 19:48     ` Paul Walmsley
2012-09-12 21:29     ` Paul Walmsley
2012-09-12 21:29       ` Paul Walmsley
2012-09-21  0:38     ` Paul Walmsley
2012-09-21  0:38       ` Paul Walmsley
2012-07-19 13:26 ` [PATCHv7 05/12] ARM: OMAP4: pwrdm: add support for reading prev logic and mem states Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-09-12 19:50   ` Paul Walmsley
2012-09-12 19:50     ` Paul Walmsley
2012-07-19 13:26 ` [PATCHv7 06/12] ARM: OMAP4: suspend: Program all domains to retention Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 14:16   ` Sergei Shtylyov
2012-07-19 14:16     ` Sergei Shtylyov
2012-08-06 13:29     ` Jean Pihet
2012-08-06 13:29       ` Jean Pihet
2012-09-12 21:36   ` Kevin Hilman
2012-09-12 21:36     ` Kevin Hilman
2012-07-19 13:26 ` [PATCHv7 07/12] ARM: OMAP4: PM: put all domains to OSWR during suspend Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 14:44   ` Paul Walmsley
2012-07-19 14:44     ` Paul Walmsley
2012-07-19 15:31     ` Tero Kristo
2012-07-19 15:31       ` Tero Kristo
2012-07-19 23:30       ` Paul Walmsley
2012-07-19 23:30         ` Paul Walmsley
2012-07-20  8:37         ` Tero Kristo
2012-07-20  8:37           ` Tero Kristo
2012-09-12 23:11         ` Kevin Hilman
2012-09-12 23:11           ` Kevin Hilman
2012-09-13  7:40           ` Tero Kristo
2012-09-13  7:40             ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 08/12] ARM: OMAP4430: PM: Work-around for ROM code BUG of PER pwrst ctrl Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 23:21   ` Paul Walmsley [this message]
2012-07-19 23:21     ` Paul Walmsley
2012-07-20  9:20     ` Tero Kristo
2012-07-20  9:20       ` Tero Kristo
2012-07-20 13:25     ` Tero Kristo
2012-07-20 13:25       ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 09/12] ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-23 18:38   ` Paul Walmsley
2012-07-23 18:38     ` Paul Walmsley
2012-07-19 13:26 ` [PATCHv7 10/12] ARM: OMAP4: HWMOD: add support for lostcontext_mask Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-09-12 19:52   ` Paul Walmsley
2012-09-12 19:52     ` Paul Walmsley
2012-07-19 13:26 ` [PATCHv7 11/12] ARM: OMAP4: hwmod_data: add context lose information for l4_abe hwmod Tero Kristo
2012-07-19 13:26   ` Tero Kristo
2012-07-19 13:26 ` [PATCHv7 12/12] ARM: OMAP4: hwmod: update context lost counter logic for hwmods without context reg Tero Kristo
2012-07-19 13:26   ` Tero Kristo

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