From: Mikulas Patocka <mpatocka@redhat.com> To: Dan Williams <dan.j.williams@intel.com> Cc: device-mapper development <dm-devel@redhat.com>, Mike Snitzer <snitzer@redhat.com>, linux-nvdimm <linux-nvdimm@lists.01.org> Subject: Re: [patch 4/4] dm-writecache: use new API for flushing Date: Thu, 31 May 2018 11:31:08 -0400 (EDT) [thread overview] Message-ID: <alpine.LRH.2.02.1805311127001.31059@file01.intranet.prod.int.rdu2.redhat.com> (raw) In-Reply-To: <CAPcyv4gzFbdBbUhPJ6W4mTJWAkvqVw_4FVhVdePEJzc28Sg-Sg@mail.gmail.com> On Thu, 31 May 2018, Dan Williams wrote: > On Thu, May 31, 2018 at 1:19 AM, Mikulas Patocka <mpatocka@redhat.com> wrote: > > > > > > On Wed, 30 May 2018, Dan Williams wrote: > > > >> > Great find! Thanks for the due diligence. Feel free to add: > >> > > >> > Acked-by: Dan Williams <dan.j.williams@intel.com> > >> > > >> > ...on the reworks to unify ARM and x86. > >> > >> One more note. The side effect of not using dax_flush() is that you > >> may end up flushing caches on systems where the platform has asserted > >> it will take responsibility for flushing caches at power loss. If / > >> when those systems become more prevalent we may want to think of a way > >> to combine the non-temporal optimization and the cache-flush-bypass > >> optimizations. However that is something that can wait for a later > >> change beyond 4.18. > > > > We could define memcpy_flushpmem, that falls back to memcpy or > > memcpy_flushcache, depending on whether the platform flushes the caches at > > power loss or not. > > The problem is that some platforms only power fail protect a subset of > the physical address range, How can this be? A psysical address may be cached on any CPU, so either there is enough power to flush all the CPUs' caches or there isn't. How does the CPU design that protects only a part of physical addresses look like? > but yes, if the platform makes a global > assertion we can globally replace memcpy_flushpmem() with plain > memcpy. Mikulas _______________________________________________ Linux-nvdimm mailing list Linux-nvdimm@lists.01.org https://lists.01.org/mailman/listinfo/linux-nvdimm
WARNING: multiple messages have this Message-ID (diff)
From: Mikulas Patocka <mpatocka-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> To: Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> Cc: device-mapper development <dm-devel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>, Mike Snitzer <snitzer-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>, linux-nvdimm <linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw@public.gmane.org> Subject: Re: [patch 4/4] dm-writecache: use new API for flushing Date: Thu, 31 May 2018 11:31:08 -0400 (EDT) [thread overview] Message-ID: <alpine.LRH.2.02.1805311127001.31059@file01.intranet.prod.int.rdu2.redhat.com> (raw) In-Reply-To: <CAPcyv4gzFbdBbUhPJ6W4mTJWAkvqVw_4FVhVdePEJzc28Sg-Sg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> On Thu, 31 May 2018, Dan Williams wrote: > On Thu, May 31, 2018 at 1:19 AM, Mikulas Patocka <mpatocka-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> wrote: > > > > > > On Wed, 30 May 2018, Dan Williams wrote: > > > >> > Great find! Thanks for the due diligence. Feel free to add: > >> > > >> > Acked-by: Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> > >> > > >> > ...on the reworks to unify ARM and x86. > >> > >> One more note. The side effect of not using dax_flush() is that you > >> may end up flushing caches on systems where the platform has asserted > >> it will take responsibility for flushing caches at power loss. If / > >> when those systems become more prevalent we may want to think of a way > >> to combine the non-temporal optimization and the cache-flush-bypass > >> optimizations. However that is something that can wait for a later > >> change beyond 4.18. > > > > We could define memcpy_flushpmem, that falls back to memcpy or > > memcpy_flushcache, depending on whether the platform flushes the caches at > > power loss or not. > > The problem is that some platforms only power fail protect a subset of > the physical address range, How can this be? A psysical address may be cached on any CPU, so either there is enough power to flush all the CPUs' caches or there isn't. How does the CPU design that protects only a part of physical addresses look like? > but yes, if the platform makes a global > assertion we can globally replace memcpy_flushpmem() with plain > memcpy. Mikulas
next prev parent reply other threads:[~2018-05-31 15:31 UTC|newest] Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-05-19 5:25 [patch 0/4] dm-writecache patches Mikulas Patocka 2018-05-19 5:25 ` [patch 1/4] x86: optimize memcpy_flushcache Mikulas Patocka 2018-05-19 14:21 ` Dan Williams 2018-05-24 18:20 ` [PATCH v2] " Mike Snitzer 2018-06-18 13:23 ` [PATCH v2 RESEND] " Mike Snitzer 2018-06-18 13:23 ` Mike Snitzer 2018-06-21 14:31 ` Ingo Molnar 2018-06-22 1:19 ` Mikulas Patocka 2018-06-22 1:19 ` Mikulas Patocka 2018-06-22 1:30 ` Ingo Molnar 2018-08-08 21:22 ` [PATCH v3 " Mikulas Patocka 2018-09-10 13:18 ` Ingo Molnar 2018-09-11 6:22 ` [tip:x86/asm] x86/asm: Optimize memcpy_flushcache() tip-bot for Mikulas Patocka 2018-05-19 5:25 ` [patch 2/4] swait: export the symbols __prepare_to_swait and __finish_swait Mikulas Patocka 2018-05-22 6:34 ` Christoph Hellwig 2018-05-22 18:52 ` Mike Snitzer 2018-05-23 9:21 ` Peter Zijlstra 2018-05-23 15:10 ` Mike Snitzer 2018-05-23 18:10 ` [PATCH v2] swait: export " Mike Snitzer 2018-05-23 20:38 ` Mikulas Patocka 2018-05-23 21:51 ` Mike Snitzer 2018-05-24 14:10 ` Peter Zijlstra 2018-05-24 15:09 ` Mike Snitzer 2018-05-19 5:25 ` [patch 3/4] dm-writecache Mikulas Patocka 2018-05-22 6:37 ` Christoph Hellwig 2018-05-19 5:25 ` [patch 4/4] dm-writecache: use new API for flushing Mikulas Patocka 2018-05-22 6:39 ` [dm-devel] " Christoph Hellwig 2018-05-22 6:39 ` Christoph Hellwig 2018-05-22 18:41 ` Mike Snitzer 2018-05-22 18:41 ` Mike Snitzer 2018-05-22 19:00 ` Dan Williams 2018-05-22 19:00 ` Dan Williams 2018-05-22 19:19 ` Mike Snitzer 2018-05-22 19:19 ` Mike Snitzer 2018-05-22 19:27 ` Dan Williams 2018-05-22 19:27 ` Dan Williams 2018-05-22 20:52 ` Mike Snitzer 2018-05-22 20:52 ` Mike Snitzer 2018-05-22 22:53 ` [dm-devel] " Jeff Moyer 2018-05-22 22:53 ` Jeff Moyer 2018-05-23 20:57 ` Mikulas Patocka 2018-05-23 20:57 ` Mikulas Patocka 2018-05-28 13:52 ` Mikulas Patocka 2018-05-28 13:52 ` Mikulas Patocka 2018-05-28 17:41 ` Dan Williams 2018-05-28 17:41 ` Dan Williams 2018-05-30 13:42 ` [dm-devel] " Jeff Moyer 2018-05-30 13:42 ` Jeff Moyer 2018-05-30 13:51 ` Mikulas Patocka 2018-05-30 13:51 ` Mikulas Patocka 2018-05-30 13:52 ` Jeff Moyer 2018-05-30 13:52 ` Jeff Moyer 2018-05-24 8:15 ` Mikulas Patocka 2018-05-24 8:15 ` Mikulas Patocka 2018-05-25 3:12 ` Dan Williams 2018-05-25 6:17 ` Mikulas Patocka 2018-05-25 12:51 ` Mike Snitzer 2018-05-25 12:51 ` Mike Snitzer 2018-05-25 15:57 ` Dan Williams 2018-05-25 15:57 ` Dan Williams 2018-05-26 7:02 ` Mikulas Patocka 2018-05-26 7:02 ` Mikulas Patocka 2018-05-26 15:26 ` Dan Williams 2018-05-26 15:26 ` Dan Williams 2018-05-28 13:32 ` Mikulas Patocka 2018-05-28 13:32 ` Mikulas Patocka 2018-05-28 18:14 ` Dan Williams 2018-05-28 18:14 ` Dan Williams 2018-05-30 13:07 ` Mikulas Patocka 2018-05-30 13:07 ` Mikulas Patocka 2018-05-30 13:16 ` Mike Snitzer 2018-05-30 13:16 ` Mike Snitzer 2018-05-30 13:21 ` Mikulas Patocka 2018-05-30 13:21 ` Mikulas Patocka 2018-05-30 13:26 ` Mike Snitzer 2018-05-30 13:26 ` Mike Snitzer 2018-05-30 13:33 ` Mikulas Patocka 2018-05-30 13:33 ` Mikulas Patocka 2018-05-30 13:54 ` Mike Snitzer 2018-05-30 13:54 ` Mike Snitzer 2018-05-30 14:09 ` Mikulas Patocka 2018-05-30 14:09 ` Mikulas Patocka 2018-05-30 14:21 ` Mike Snitzer 2018-05-30 14:21 ` Mike Snitzer 2018-05-30 14:46 ` Mikulas Patocka 2018-05-30 14:46 ` Mikulas Patocka 2018-05-31 3:42 ` Mike Snitzer 2018-05-31 3:42 ` Mike Snitzer 2018-06-03 15:03 ` Mikulas Patocka 2018-06-03 15:03 ` Mikulas Patocka 2018-05-31 3:39 ` Mike Snitzer 2018-05-31 3:39 ` Mike Snitzer 2018-05-31 8:16 ` Mikulas Patocka 2018-05-31 8:16 ` Mikulas Patocka 2018-05-31 12:09 ` Mike Snitzer 2018-05-31 12:09 ` Mike Snitzer 2018-05-30 15:58 ` Dan Williams 2018-05-30 15:58 ` Dan Williams 2018-05-30 22:39 ` Dan Williams 2018-05-30 22:39 ` Dan Williams 2018-05-31 8:19 ` Mikulas Patocka 2018-05-31 8:19 ` Mikulas Patocka 2018-05-31 14:51 ` Dan Williams 2018-05-31 14:51 ` Dan Williams 2018-05-31 15:31 ` Mikulas Patocka [this message] 2018-05-31 15:31 ` Mikulas Patocka 2018-05-31 16:39 ` Dan Williams 2018-05-31 16:39 ` Dan Williams
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