From: "André Almeida" <andrealmeid@igalia.com>
To: "Maíra Canal" <mairacanal@riseup.net>
Cc: magalilemes00@gmail.com, David Airlie <airlied@linux.ie>,
tales.aparecida@gmail.com, Xinhui.Pan@amd.com,
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org,
christian.koenig@amd.com, mwen@igalia.com,
Leo Li <sunpeng.li@amd.com>,
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Daniel Vetter <daniel@ffwll.ch>,
Alex Deucher <alexander.deucher@amd.com>,
Isabella Basso <isabbasso@riseup.net>,
andrealmeid@riseup.net, Harry Wentland <harry.wentland@amd.com>,
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Subject: Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
Date: Thu, 14 Jul 2022 16:04:35 -0300 [thread overview]
Message-ID: <92eebfd3-4234-b3fa-87cc-c48b3deec33f@igalia.com> (raw)
In-Reply-To: <20220714164507.561751-1-mairacanal@riseup.net>
Hi Maíra,
Thank you for your patch,
Às 13:44 de 14/07/22, Maíra Canal escreveu:
> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> should be written into the control register instead of 0.
>
Why? I do see that tmp was unused before your patch, but why should we
write it into this register? Did you manage to test this somehow?
> Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
Checking both commits, I can see that 0 is written at `mmDC_HPD1_CONTROL
+ N` register in _hpd_fini() in them, so if you are trying to fix the
commit that inserted that behavior, I think aren't those ones. For instance:
$ git show 2285b91c
[...]
@@ -479,28 +372,11 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device
*adev)
list_for_each_entry(connector, &dev->mode_config.connector_list,
head) {
struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);
- switch (amdgpu_connector->hpd.hpd) {
- case AMDGPU_HPD_1:
- WREG32(mmDC_HPD1_CONTROL, 0);
- break;
- case AMDGPU_HPD_2:
- WREG32(mmDC_HPD2_CONTROL, 0);
- break;
- case AMDGPU_HPD_3:
- WREG32(mmDC_HPD3_CONTROL, 0);
- break;
- case AMDGPU_HPD_4:
- WREG32(mmDC_HPD4_CONTROL, 0);
- break;
- case AMDGPU_HPD_5:
- WREG32(mmDC_HPD5_CONTROL, 0);
- break;
- case AMDGPU_HPD_6:
- WREG32(mmDC_HPD6_CONTROL, 0);
- break;
- default:
- break;
- }
+ if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd)
+ continue;
+
+ WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+
0 was the valued written here before this commit. The commit basically
replaces the switch case with a sum in this snippet.
thanks,
andré
next prev parent reply other threads:[~2022-07-14 19:05 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
2022-07-18 18:52 ` Alex Deucher
2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
2022-07-18 18:53 ` Alex Deucher
2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
2022-07-18 18:54 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
2022-07-18 18:55 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
2022-07-18 18:56 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
2022-07-18 18:58 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
2022-07-18 18:59 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
2022-07-18 19:00 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
2022-07-18 19:02 ` Alex Deucher
2022-07-19 10:49 ` Maíra Canal
2022-07-19 13:03 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK Maíra Canal
2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
2022-07-15 1:53 ` André Almeida
2022-07-14 19:04 ` André Almeida [this message]
2022-07-14 19:14 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register Alex Deucher
2022-07-14 19:20 ` André Almeida
2022-07-15 1:56 ` André Almeida
2022-07-18 19:07 ` Alex Deucher
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