From: "André Almeida" <andrealmeid@riseup.net>
To: "Alex Deucher" <alexdeucher@gmail.com>,
"Maíra Canal" <mairacanal@riseup.net>
Cc: "André Almeida" <andrealmeid@igalia.com>,
"Magali Lemes" <magalilemes00@gmail.com>,
"David Airlie" <airlied@linux.ie>,
"Tales Lelo da Aparecida" <tales.aparecida@gmail.com>,
"xinhui pan" <Xinhui.Pan@amd.com>,
"Rodrigo Siqueira" <Rodrigo.Siqueira@amd.com>,
LKML <linux-kernel@vger.kernel.org>,
"amd-gfx list" <amd-gfx@lists.freedesktop.org>,
"Nicholas Kazlauskas" <nicholas.kazlauskas@amd.com>,
"Melissa Wen" <mwen@igalia.com>, "Leo Li" <sunpeng.li@amd.com>,
"Dmytro Laktyushkin" <Dmytro.Laktyushkin@amd.com>,
"Aurabindo Pillai" <aurabindo.pillai@amd.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Isabella Basso" <isabbasso@riseup.net>,
"Harry Wentland" <harry.wentland@amd.com>,
"Christian Koenig" <christian.koenig@amd.com>
Subject: Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
Date: Thu, 14 Jul 2022 16:20:06 -0300 [thread overview]
Message-ID: <94dad704-d81a-7dc2-423d-1f728bcb5548@riseup.net> (raw)
In-Reply-To: <CADnq5_OGGMTDhacr+x5jO=DttEmTvsMWPLZGxcQ=_GJS4B-r+Q@mail.gmail.com>
Às 16:14 de 14/07/22, Alex Deucher escreveu:
> On Thu, Jul 14, 2022 at 3:05 PM André Almeida <andrealmeid@igalia.com> wrote:
>>
>> Hi Maíra,
>>
>> Thank you for your patch,
>>
>> Às 13:44 de 14/07/22, Maíra Canal escreveu:
>>> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
>>> should be written into the control register instead of 0.
>>>
>>
>> Why? I do see that tmp was unused before your patch, but why should we
>> write it into this register? Did you manage to test this somehow?
>
> The patch is correct. We should only be clearing the enable bit in
> this case, not the entire register. Clearing the other fields could
> cause spurious hotplug events as it affects the short and long pulse
> times for the HPD pin.
>
Got it, nice catch Maíra :) Next time, please add this kind of
information in the commit message.
next prev parent reply other threads:[~2022-07-14 19:21 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
2022-07-18 18:52 ` Alex Deucher
2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
2022-07-18 18:53 ` Alex Deucher
2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
2022-07-18 18:54 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
2022-07-18 18:55 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
2022-07-18 18:56 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
2022-07-18 18:58 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
2022-07-18 18:59 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
2022-07-18 19:00 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
2022-07-18 19:02 ` Alex Deucher
2022-07-19 10:49 ` Maíra Canal
2022-07-19 13:03 ` Alex Deucher
2022-07-14 16:45 ` [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK Maíra Canal
2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
2022-07-15 1:53 ` André Almeida
2022-07-14 19:04 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register André Almeida
2022-07-14 19:14 ` Alex Deucher
2022-07-14 19:20 ` André Almeida [this message]
2022-07-15 1:56 ` André Almeida
2022-07-18 19:07 ` Alex Deucher
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