From: Andrey Konovalov <andreyknvl@google.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Dmitry Vyukov <dvyukov@google.com>, Andrey Ryabinin <aryabinin@virtuozzo.com>, Alexander Potapenko <glider@google.com>, Marco Elver <elver@google.com>, Evgenii Stepanov <eugenis@google.com>, Branislav Rankov <Branislav.Rankov@arm.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Andrew Morton <akpm@linux-foundation.org>, kasan-dev@googlegroups.com, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Andrey Konovalov <andreyknvl@google.com> Subject: [PATCH v8 31/43] arm64: mte: Convert gcr_user into an exclude mask Date: Thu, 5 Nov 2020 00:18:46 +0100 [thread overview] Message-ID: <b0ad51df00dc72fc3ae1c392e1e66a4ffdbb35f7.1604531793.git.andreyknvl@google.com> (raw) In-Reply-To: <cover.1604531793.git.andreyknvl@google.com> From: Vincenzo Frascino <vincenzo.frascino@arm.com> The gcr_user mask is a per thread mask that represents the tags that are excluded from random generation when the Memory Tagging Extension is present and an 'irg' instruction is invoked. gcr_user affects the behavior on EL0 only. Currently that mask is an include mask and it is controlled by the user via prctl() while GCR_EL1 accepts an exclude mask. Convert the include mask into an exclude one to make it easier the register setting. Note: This change will affect gcr_kernel (for EL1) introduced with a future patch. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Andrey Konovalov <andreyknvl@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> --- Change-Id: Id15c0b47582fb51594bb26fb8353d78c7d0953c1 --- arch/arm64/include/asm/processor.h | 2 +- arch/arm64/kernel/mte.c | 29 +++++++++++++++-------------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index fce8cbecd6bc..e8cfc41a92d4 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -154,7 +154,7 @@ struct thread_struct { #endif #ifdef CONFIG_ARM64_MTE u64 sctlr_tcf0; - u64 gcr_user_incl; + u64 gcr_user_excl; #endif }; diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c index fcfbefcc3174..14b0c19a33e3 100644 --- a/arch/arm64/kernel/mte.c +++ b/arch/arm64/kernel/mte.c @@ -148,23 +148,22 @@ static void set_sctlr_el1_tcf0(u64 tcf0) preempt_enable(); } -static void update_gcr_el1_excl(u64 incl) +static void update_gcr_el1_excl(u64 excl) { - u64 excl = ~incl & SYS_GCR_EL1_EXCL_MASK; /* - * Note that 'incl' is an include mask (controlled by the user via - * prctl()) while GCR_EL1 accepts an exclude mask. + * Note that the mask controlled by the user via prctl() is an + * include while GCR_EL1 accepts an exclude mask. * No need for ISB since this only affects EL0 currently, implicit * with ERET. */ sysreg_clear_set_s(SYS_GCR_EL1, SYS_GCR_EL1_EXCL_MASK, excl); } -static void set_gcr_el1_excl(u64 incl) +static void set_gcr_el1_excl(u64 excl) { - current->thread.gcr_user_incl = incl; - update_gcr_el1_excl(incl); + current->thread.gcr_user_excl = excl; + update_gcr_el1_excl(excl); } void flush_mte_state(void) @@ -179,7 +178,7 @@ void flush_mte_state(void) /* disable tag checking */ set_sctlr_el1_tcf0(SCTLR_EL1_TCF0_NONE); /* reset tag generation mask */ - set_gcr_el1_excl(0); + set_gcr_el1_excl(SYS_GCR_EL1_EXCL_MASK); } void mte_thread_switch(struct task_struct *next) @@ -190,7 +189,7 @@ void mte_thread_switch(struct task_struct *next) /* avoid expensive SCTLR_EL1 accesses if no change */ if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0) update_sctlr_el1_tcf0(next->thread.sctlr_tcf0); - update_gcr_el1_excl(next->thread.gcr_user_incl); + update_gcr_el1_excl(next->thread.gcr_user_excl); } void mte_suspend_exit(void) @@ -198,13 +197,14 @@ void mte_suspend_exit(void) if (!system_supports_mte()) return; - update_gcr_el1_excl(current->thread.gcr_user_incl); + update_gcr_el1_excl(current->thread.gcr_user_excl); } long set_mte_ctrl(struct task_struct *task, unsigned long arg) { u64 tcf0; - u64 gcr_incl = (arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT; + u64 gcr_excl = ~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) & + SYS_GCR_EL1_EXCL_MASK; if (!system_supports_mte()) return 0; @@ -225,10 +225,10 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg) if (task != current) { task->thread.sctlr_tcf0 = tcf0; - task->thread.gcr_user_incl = gcr_incl; + task->thread.gcr_user_excl = gcr_excl; } else { set_sctlr_el1_tcf0(tcf0); - set_gcr_el1_excl(gcr_incl); + set_gcr_el1_excl(gcr_excl); } return 0; @@ -237,11 +237,12 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg) long get_mte_ctrl(struct task_struct *task) { unsigned long ret; + u64 incl = ~task->thread.gcr_user_excl & SYS_GCR_EL1_EXCL_MASK; if (!system_supports_mte()) return 0; - ret = task->thread.gcr_user_incl << PR_MTE_TAG_SHIFT; + ret = incl << PR_MTE_TAG_SHIFT; switch (task->thread.sctlr_tcf0) { case SCTLR_EL1_TCF0_NONE: -- 2.29.1.341.ge80a0c044ae-goog
WARNING: multiple messages have this Message-ID (diff)
From: Andrey Konovalov <andreyknvl@google.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org, Marco Elver <elver@google.com>, Andrey Konovalov <andreyknvl@google.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Will Deacon <will.deacon@arm.com>, Branislav Rankov <Branislav.Rankov@arm.com>, kasan-dev@googlegroups.com, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Alexander Potapenko <glider@google.com>, Evgenii Stepanov <eugenis@google.com>, Andrey Ryabinin <aryabinin@virtuozzo.com>, Andrew Morton <akpm@linux-foundation.org>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Dmitry Vyukov <dvyukov@google.com> Subject: [PATCH v8 31/43] arm64: mte: Convert gcr_user into an exclude mask Date: Thu, 5 Nov 2020 00:18:46 +0100 [thread overview] Message-ID: <b0ad51df00dc72fc3ae1c392e1e66a4ffdbb35f7.1604531793.git.andreyknvl@google.com> (raw) In-Reply-To: <cover.1604531793.git.andreyknvl@google.com> From: Vincenzo Frascino <vincenzo.frascino@arm.com> The gcr_user mask is a per thread mask that represents the tags that are excluded from random generation when the Memory Tagging Extension is present and an 'irg' instruction is invoked. gcr_user affects the behavior on EL0 only. Currently that mask is an include mask and it is controlled by the user via prctl() while GCR_EL1 accepts an exclude mask. Convert the include mask into an exclude one to make it easier the register setting. Note: This change will affect gcr_kernel (for EL1) introduced with a future patch. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Andrey Konovalov <andreyknvl@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> --- Change-Id: Id15c0b47582fb51594bb26fb8353d78c7d0953c1 --- arch/arm64/include/asm/processor.h | 2 +- arch/arm64/kernel/mte.c | 29 +++++++++++++++-------------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index fce8cbecd6bc..e8cfc41a92d4 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -154,7 +154,7 @@ struct thread_struct { #endif #ifdef CONFIG_ARM64_MTE u64 sctlr_tcf0; - u64 gcr_user_incl; + u64 gcr_user_excl; #endif }; diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c index fcfbefcc3174..14b0c19a33e3 100644 --- a/arch/arm64/kernel/mte.c +++ b/arch/arm64/kernel/mte.c @@ -148,23 +148,22 @@ static void set_sctlr_el1_tcf0(u64 tcf0) preempt_enable(); } -static void update_gcr_el1_excl(u64 incl) +static void update_gcr_el1_excl(u64 excl) { - u64 excl = ~incl & SYS_GCR_EL1_EXCL_MASK; /* - * Note that 'incl' is an include mask (controlled by the user via - * prctl()) while GCR_EL1 accepts an exclude mask. + * Note that the mask controlled by the user via prctl() is an + * include while GCR_EL1 accepts an exclude mask. * No need for ISB since this only affects EL0 currently, implicit * with ERET. */ sysreg_clear_set_s(SYS_GCR_EL1, SYS_GCR_EL1_EXCL_MASK, excl); } -static void set_gcr_el1_excl(u64 incl) +static void set_gcr_el1_excl(u64 excl) { - current->thread.gcr_user_incl = incl; - update_gcr_el1_excl(incl); + current->thread.gcr_user_excl = excl; + update_gcr_el1_excl(excl); } void flush_mte_state(void) @@ -179,7 +178,7 @@ void flush_mte_state(void) /* disable tag checking */ set_sctlr_el1_tcf0(SCTLR_EL1_TCF0_NONE); /* reset tag generation mask */ - set_gcr_el1_excl(0); + set_gcr_el1_excl(SYS_GCR_EL1_EXCL_MASK); } void mte_thread_switch(struct task_struct *next) @@ -190,7 +189,7 @@ void mte_thread_switch(struct task_struct *next) /* avoid expensive SCTLR_EL1 accesses if no change */ if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0) update_sctlr_el1_tcf0(next->thread.sctlr_tcf0); - update_gcr_el1_excl(next->thread.gcr_user_incl); + update_gcr_el1_excl(next->thread.gcr_user_excl); } void mte_suspend_exit(void) @@ -198,13 +197,14 @@ void mte_suspend_exit(void) if (!system_supports_mte()) return; - update_gcr_el1_excl(current->thread.gcr_user_incl); + update_gcr_el1_excl(current->thread.gcr_user_excl); } long set_mte_ctrl(struct task_struct *task, unsigned long arg) { u64 tcf0; - u64 gcr_incl = (arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT; + u64 gcr_excl = ~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) & + SYS_GCR_EL1_EXCL_MASK; if (!system_supports_mte()) return 0; @@ -225,10 +225,10 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg) if (task != current) { task->thread.sctlr_tcf0 = tcf0; - task->thread.gcr_user_incl = gcr_incl; + task->thread.gcr_user_excl = gcr_excl; } else { set_sctlr_el1_tcf0(tcf0); - set_gcr_el1_excl(gcr_incl); + set_gcr_el1_excl(gcr_excl); } return 0; @@ -237,11 +237,12 @@ long set_mte_ctrl(struct task_struct *task, unsigned long arg) long get_mte_ctrl(struct task_struct *task) { unsigned long ret; + u64 incl = ~task->thread.gcr_user_excl & SYS_GCR_EL1_EXCL_MASK; if (!system_supports_mte()) return 0; - ret = task->thread.gcr_user_incl << PR_MTE_TAG_SHIFT; + ret = incl << PR_MTE_TAG_SHIFT; switch (task->thread.sctlr_tcf0) { case SCTLR_EL1_TCF0_NONE: -- 2.29.1.341.ge80a0c044ae-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-04 23:21 UTC|newest] Thread overview: 136+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-04 23:18 [PATCH v8 00/43] kasan: add hardware tag-based mode for arm64 Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 01/43] kasan: drop unnecessary GPL text from comment headers Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 02/43] kasan: KASAN_VMALLOC depends on KASAN_GENERIC Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 03/43] kasan: group vmalloc code Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 04/43] s390/kasan: include asm/page.h from asm/kasan.h Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 05/43] kasan: shadow declarations only for software modes Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 06/43] kasan: rename (un)poison_shadow to (un)poison_memory Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 07/43] kasan: rename KASAN_SHADOW_* to KASAN_GRANULE_* Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 08/43] kasan: only build init.c for software modes Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 09/43] kasan: split out shadow.c from common.c Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 10/43] kasan: define KASAN_GRANULE_PAGE Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 11/43] kasan: rename report and tags files Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 12/43] kasan: don't duplicate config dependencies Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 13/43] kasan: hide invalid free check implementation Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 14/43] kasan: decode stack frame only with KASAN_STACK_ENABLE Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 15/43] kasan, arm64: only init shadow for software modes Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 16/43] kasan, arm64: only use kasan_depth " Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 17/43] kasan, arm64: move initialization message Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 15:59 ` Catalin Marinas 2020-11-05 15:59 ` Catalin Marinas 2020-11-04 23:18 ` [PATCH v8 18/43] kasan, arm64: rename kasan_init_tags and mark as __init Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 16:00 ` Catalin Marinas 2020-11-05 16:00 ` Catalin Marinas 2020-11-04 23:18 ` [PATCH v8 19/43] kasan: rename addr_has_shadow to addr_has_metadata Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 20/43] kasan: rename print_shadow_for_address to print_memory_metadata Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 21/43] kasan: kasan_non_canonical_hook only for software modes Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 22/43] kasan: rename SHADOW layout macros to META Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 23/43] kasan: separate metadata_fetch_row for each mode Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 24/43] kasan, arm64: don't allow SW_TAGS with ARM64_MTE Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 25/43] kasan: introduce CONFIG_KASAN_HW_TAGS Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 26/43] arm64: Enable armv8.5-a asm-arch option Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 27/43] arm64: mte: Add in-kernel MTE helpers Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 28/43] arm64: mte: Reset the page tag in page->flags Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 15:59 ` Catalin Marinas 2020-11-05 15:59 ` Catalin Marinas 2020-11-06 11:46 ` Vincenzo Frascino 2020-11-06 11:46 ` Vincenzo Frascino 2020-11-04 23:18 ` [PATCH v8 29/43] arm64: mte: Add in-kernel tag fault handler Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 16:57 ` Catalin Marinas 2020-11-05 16:57 ` Catalin Marinas 2020-11-04 23:18 ` [PATCH v8 30/43] arm64: kasan: Allow enabling in-kernel MTE Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 11:16 ` Vincenzo Frascino 2020-11-05 11:16 ` Vincenzo Frascino 2020-11-05 11:35 ` Andrey Konovalov 2020-11-05 11:35 ` Andrey Konovalov 2020-11-05 11:35 ` Andrey Konovalov 2020-11-05 11:42 ` Vincenzo Frascino 2020-11-05 11:42 ` Vincenzo Frascino 2020-11-05 12:14 ` Andrey Konovalov 2020-11-05 12:14 ` Andrey Konovalov 2020-11-05 12:14 ` Andrey Konovalov 2020-11-05 14:17 ` Vincenzo Frascino 2020-11-05 14:17 ` Vincenzo Frascino 2020-11-05 17:27 ` Andrey Konovalov 2020-11-05 17:27 ` Andrey Konovalov 2020-11-05 17:27 ` Andrey Konovalov 2020-11-05 17:25 ` Catalin Marinas 2020-11-05 17:25 ` Catalin Marinas 2020-11-05 17:29 ` Andrey Konovalov 2020-11-05 17:29 ` Andrey Konovalov 2020-11-05 17:29 ` Andrey Konovalov 2020-11-05 17:39 ` Catalin Marinas 2020-11-05 17:39 ` Catalin Marinas 2020-11-05 18:09 ` Andrey Konovalov 2020-11-05 18:09 ` Andrey Konovalov 2020-11-05 18:09 ` Andrey Konovalov 2020-11-06 11:11 ` Vincenzo Frascino 2020-11-06 11:11 ` Vincenzo Frascino 2020-11-04 23:18 ` Andrey Konovalov [this message] 2020-11-04 23:18 ` [PATCH v8 31/43] arm64: mte: Convert gcr_user into an exclude mask Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 32/43] arm64: mte: Switch GCR_EL1 in kernel entry and exit Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 17:30 ` Catalin Marinas 2020-11-05 17:30 ` Catalin Marinas 2020-11-05 17:33 ` Andrey Konovalov 2020-11-05 17:33 ` Andrey Konovalov 2020-11-05 17:33 ` Andrey Konovalov 2020-11-05 17:42 ` Catalin Marinas 2020-11-05 17:42 ` Catalin Marinas 2020-11-04 23:18 ` [PATCH v8 33/43] arm64: kasan: Align allocations for HW_TAGS Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 34/43] arm64: kasan: Add arch layer for memory tagging helpers Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 35/43] kasan: define KASAN_GRANULE_SIZE for HW_TAGS Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 36/43] kasan, x86, s390: update undef CONFIG_KASAN Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 37/43] kasan, arm64: expand CONFIG_KASAN checks Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-05 17:32 ` Catalin Marinas 2020-11-05 17:32 ` Catalin Marinas 2020-11-04 23:18 ` [PATCH v8 38/43] kasan, arm64: implement HW_TAGS runtime Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:48 ` Andrey Konovalov 2020-11-04 23:48 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 39/43] kasan, arm64: print report from tag fault handler Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 40/43] kasan, mm: reset tags when accessing metadata Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 41/43] kasan, arm64: enable CONFIG_KASAN_HW_TAGS Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 42/43] kasan: add documentation for hardware tag-based mode Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov 2020-11-04 23:18 ` [PATCH v8 43/43] kselftest/arm64: Check GCR_EL1 after context switch Andrey Konovalov 2020-11-04 23:18 ` Andrey Konovalov
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