Re: [PATCH RESEND v10 3/3] ARM: dts: Add PCIe support for Airoha EN7523

From: Matthias Brugger <matthias.bgg@gmail.com>
To: Felix Fietkau <nbd@nbd.name>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH RESEND v10 3/3] ARM: dts: Add PCIe support for Airoha EN7523
Date: Wed, 15 Jun 2022 18:54:51 +0200	[thread overview]
Message-ID: <bd788f00-0328-e57d-d56f-7e975996a9d0@gmail.com> (raw)
In-Reply-To: <20220615125335.96089-3-nbd@nbd.name>

On 15/06/2022 14:53, Felix Fietkau wrote:
> This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is nearly
> identical to the one in MT7622
> 
> Signed-off-by: Felix Fietkau <nbd@nbd.name>

applied to v5.19-next/dts32

Thanks!

> ---
>   arch/arm/boot/dts/en7523-evb.dts |  8 +++++
>   arch/arm/boot/dts/en7523.dtsi    | 58 ++++++++++++++++++++++++++++++++
>   2 files changed, 66 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts
> index a8d8bb0419a0..f23a25cce119 100644
> --- a/arch/arm/boot/dts/en7523-evb.dts
> +++ b/arch/arm/boot/dts/en7523-evb.dts
> @@ -33,3 +33,11 @@ &gpio0 {
>   &gpio1 {
>   	status = "okay";
>   };
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&pcie1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi
> index 2e705b87b6c1..7f839331a777 100644
> --- a/arch/arm/boot/dts/en7523.dtsi
> +++ b/arch/arm/boot/dts/en7523.dtsi
> @@ -143,4 +143,62 @@ gpio1: gpio@1fbf0270 {
>   		gpio-controller;
>   		#gpio-cells = <2>;
>   	};
> +
> +	pcie0: pcie@1fa91000 {
> +		compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
> +		device_type = "pci";
> +		reg = <0x1fa91000 0x1000>;
> +		reg-names = "port0";
> +		linux,pci-domain = <0>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "pcie_irq";
> +		clocks = <&scu EN7523_CLK_PCIE>;
> +		clock-names = "sys_ck0";
> +		bus-range = <0x00 0xff>;
> +		ranges = <0x82000000 0 0x20000000  0x20000000  0 0x8000000>;
> +		status = "disabled";
> +
> +		#interrupt-cells = <1>;
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pcie_intc0 0>,
> +				<0 0 0 2 &pcie_intc0 1>,
> +				<0 0 0 3 &pcie_intc0 2>,
> +				<0 0 0 4 &pcie_intc0 3>;
> +		pcie_intc0: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
> +
> +	pcie1: pcie@1fa92000 {
> +		compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
> +		device_type = "pci";
> +		reg = <0x1fa92000 0x1000>;
> +		reg-names = "port1";
> +		linux,pci-domain = <1>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "pcie_irq";
> +		clocks = <&scu EN7523_CLK_PCIE>;
> +		clock-names = "sys_ck1";
> +		bus-range = <0x00 0xff>;
> +		ranges = <0x82000000 0 0x28000000  0x28000000  0 0x8000000>;
> +		status = "disabled";
> +
> +		#interrupt-cells = <1>;
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &pcie_intc1 0>,
> +				<0 0 0 2 &pcie_intc1 1>,
> +				<0 0 0 3 &pcie_intc1 2>,
> +				<0 0 0 4 &pcie_intc1 3>;
> +		pcie_intc1: interrupt-controller {
> +			interrupt-controller;
> +			#address-cells = <0>;
> +			#interrupt-cells = <1>;
> +		};
> +	};
>   };