From: Richard Henderson <richard.henderson@linaro.org>
To: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>
Cc: James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
Peter Maydell <Peter.Maydell@arm.com>,
Haibo Xu <Haibo.Xu@arm.com>
Subject: Re: [PATCH v2 0/2] MTE support for KVM guest
Date: Thu, 10 Sep 2020 08:36:44 -0700 [thread overview]
Message-ID: <c6043c5c-4bf1-e42c-1337-a892e6fd7402@linaro.org> (raw)
In-Reply-To: <842807ac-562a-36ce-8061-aa323341b605@arm.com>
On 9/10/20 3:24 AM, Steven Price wrote:
> It is a shame, however I suspect this is because to use those instructions you
> need to know the block size held in GMID_EL1. And at least in theory that could
> vary between CPUs.
Which is no different from having to read DCZID_EL0 in order to implement
memset, in my opinion. But, whatever.
> When we have some real hardware it would be worth profiling this. At the moment
> I've no idea whether the kernel entry overhead would make such an interface
> useful from a performance perspective or not.
Yep.
r~
WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
Peter Maydell <Peter.Maydell@arm.com>,
Haibo Xu <Haibo.Xu@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/2] MTE support for KVM guest
Date: Thu, 10 Sep 2020 08:36:44 -0700 [thread overview]
Message-ID: <c6043c5c-4bf1-e42c-1337-a892e6fd7402@linaro.org> (raw)
In-Reply-To: <842807ac-562a-36ce-8061-aa323341b605@arm.com>
On 9/10/20 3:24 AM, Steven Price wrote:
> It is a shame, however I suspect this is because to use those instructions you
> need to know the block size held in GMID_EL1. And at least in theory that could
> vary between CPUs.
Which is no different from having to read DCZID_EL0 in order to implement
memset, in my opinion. But, whatever.
> When we have some real hardware it would be worth profiling this. At the moment
> I've no idea whether the kernel entry overhead would make such an interface
> useful from a performance perspective or not.
Yep.
r~
WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>,
Peter Maydell <Peter.Maydell@arm.com>,
qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/2] MTE support for KVM guest
Date: Thu, 10 Sep 2020 08:36:44 -0700 [thread overview]
Message-ID: <c6043c5c-4bf1-e42c-1337-a892e6fd7402@linaro.org> (raw)
In-Reply-To: <842807ac-562a-36ce-8061-aa323341b605@arm.com>
On 9/10/20 3:24 AM, Steven Price wrote:
> It is a shame, however I suspect this is because to use those instructions you
> need to know the block size held in GMID_EL1. And at least in theory that could
> vary between CPUs.
Which is no different from having to read DCZID_EL0 in order to implement
memset, in my opinion. But, whatever.
> When we have some real hardware it would be worth profiling this. At the moment
> I've no idea whether the kernel entry overhead would make such an interface
> useful from a performance perspective or not.
Yep.
r~
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: Steven Price <steven.price@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
Peter Maydell <Peter.Maydell@arm.com>,
Haibo Xu <Haibo.Xu@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/2] MTE support for KVM guest
Date: Thu, 10 Sep 2020 08:36:44 -0700 [thread overview]
Message-ID: <c6043c5c-4bf1-e42c-1337-a892e6fd7402@linaro.org> (raw)
In-Reply-To: <842807ac-562a-36ce-8061-aa323341b605@arm.com>
On 9/10/20 3:24 AM, Steven Price wrote:
> It is a shame, however I suspect this is because to use those instructions you
> need to know the block size held in GMID_EL1. And at least in theory that could
> vary between CPUs.
Which is no different from having to read DCZID_EL0 in order to implement
memset, in my opinion. But, whatever.
> When we have some real hardware it would be worth profiling this. At the moment
> I've no idea whether the kernel entry overhead would make such an interface
> useful from a performance perspective or not.
Yep.
r~
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-10 19:41 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 16:00 [PATCH v2 0/2] MTE support for KVM guest Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` [PATCH v2 1/2] arm64: kvm: Save/restore MTE registers Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` [PATCH v2 2/2] arm64: kvm: Introduce MTE VCPU feature Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-04 16:00 ` Steven Price
2020-09-09 15:48 ` Andrew Jones
2020-09-09 15:48 ` Andrew Jones
2020-09-09 15:48 ` Andrew Jones
2020-09-09 15:48 ` Andrew Jones
2020-09-09 15:53 ` Peter Maydell
2020-09-09 15:53 ` Peter Maydell
2020-09-09 15:53 ` Peter Maydell
2020-09-09 15:53 ` Peter Maydell
2020-09-10 6:38 ` Andrew Jones
2020-09-10 6:38 ` Andrew Jones
2020-09-10 6:38 ` Andrew Jones
2020-09-10 6:38 ` Andrew Jones
2020-09-10 10:01 ` Andrew Jones
2020-09-10 10:01 ` Andrew Jones
2020-09-10 10:01 ` Andrew Jones
2020-09-10 10:01 ` Andrew Jones
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 11:49 ` Andrew Jones
2020-09-10 11:49 ` Andrew Jones
2020-09-10 11:49 ` Andrew Jones
2020-09-10 11:49 ` Andrew Jones
2020-09-07 15:28 ` [PATCH v2 0/2] MTE support for KVM guest Dr. David Alan Gilbert
2020-09-07 15:28 ` Dr. David Alan Gilbert
2020-09-07 15:28 ` Dr. David Alan Gilbert
2020-09-07 15:28 ` Dr. David Alan Gilbert
2020-09-09 9:15 ` Steven Price
2020-09-09 9:15 ` Steven Price
2020-09-09 9:15 ` Steven Price
2020-09-09 9:15 ` Steven Price
2020-09-09 15:25 ` Andrew Jones
2020-09-09 15:25 ` Andrew Jones
2020-09-09 15:25 ` Andrew Jones
2020-09-09 15:25 ` Andrew Jones
2020-09-09 16:04 ` Steven Price
2020-09-09 16:04 ` Steven Price
2020-09-09 16:04 ` Steven Price
2020-09-09 16:04 ` Steven Price
2020-09-10 6:29 ` Andrew Jones
2020-09-10 6:29 ` Andrew Jones
2020-09-10 6:29 ` Andrew Jones
2020-09-10 6:29 ` Andrew Jones
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 9:21 ` Steven Price
2020-09-10 13:56 ` Andrew Jones
2020-09-10 13:56 ` Andrew Jones
2020-09-10 13:56 ` Andrew Jones
2020-09-10 13:56 ` Andrew Jones
2020-09-10 14:14 ` Steven Price
2020-09-10 14:14 ` Steven Price
2020-09-10 14:14 ` Steven Price
2020-09-10 14:14 ` Steven Price
2020-09-10 1:45 ` Richard Henderson
2020-09-10 1:45 ` Richard Henderson
2020-09-10 1:45 ` Richard Henderson
2020-09-10 1:45 ` Richard Henderson
2020-09-10 5:44 ` Andrew Jones
2020-09-10 5:44 ` Andrew Jones
2020-09-10 5:44 ` Andrew Jones
2020-09-10 5:44 ` Andrew Jones
2020-09-10 13:27 ` Dr. David Alan Gilbert
2020-09-10 13:27 ` Dr. David Alan Gilbert
2020-09-10 13:27 ` Dr. David Alan Gilbert
2020-09-10 13:27 ` Dr. David Alan Gilbert
2020-09-10 13:39 ` Andrew Jones
2020-09-10 13:39 ` Andrew Jones
2020-09-10 13:39 ` Andrew Jones
2020-09-10 13:39 ` Andrew Jones
2020-09-10 0:33 ` Richard Henderson
2020-09-10 0:33 ` Richard Henderson
2020-09-10 0:33 ` Richard Henderson
2020-09-10 0:33 ` Richard Henderson
2020-09-10 10:24 ` Steven Price
2020-09-10 10:24 ` Steven Price
2020-09-10 10:24 ` Steven Price
2020-09-10 10:24 ` Steven Price
2020-09-10 15:36 ` Richard Henderson [this message]
2020-09-10 15:36 ` Richard Henderson
2020-09-10 15:36 ` Richard Henderson
2020-09-10 15:36 ` Richard Henderson
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