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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	npiggin@gmail.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 22/43] powerpc/32: Refactor booke critical registers saving
Date: Tue,  9 Mar 2021 12:09:48 +0000 (UTC)	[thread overview]
Message-ID: <ca50c568c73091f5b9094043acab20b83e2eb7d8.1615291473.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1615291471.git.christophe.leroy@csgroup.eu>

Refactor booke critical registers saving into a few macros
and move it into the exception prolog directly.

Keep the dedicated transfert_to_handler entry point for the
moment allthough they are empty. They will be removed in a
later patch to reduce churn.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/entry_32.S   | 33 -------------------------
 arch/powerpc/kernel/head_booke.h | 41 ++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+), 33 deletions(-)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 01a064c8a96a..ad1fd33e1126 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -51,49 +51,16 @@
 #ifdef CONFIG_BOOKE
 	.globl	mcheck_transfer_to_handler
 mcheck_transfer_to_handler:
-	mfspr	r0,SPRN_DSRR0
-	stw	r0,_DSRR0(r11)
-	mfspr	r0,SPRN_DSRR1
-	stw	r0,_DSRR1(r11)
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(mcheck_transfer_to_handler)
 
 	.globl	debug_transfer_to_handler
 debug_transfer_to_handler:
-	mfspr	r0,SPRN_CSRR0
-	stw	r0,_CSRR0(r11)
-	mfspr	r0,SPRN_CSRR1
-	stw	r0,_CSRR1(r11)
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(debug_transfer_to_handler)
 
 	.globl	crit_transfer_to_handler
 crit_transfer_to_handler:
-#ifdef CONFIG_PPC_BOOK3E_MMU
-	mfspr	r0,SPRN_MAS0
-	stw	r0,MAS0(r11)
-	mfspr	r0,SPRN_MAS1
-	stw	r0,MAS1(r11)
-	mfspr	r0,SPRN_MAS2
-	stw	r0,MAS2(r11)
-	mfspr	r0,SPRN_MAS3
-	stw	r0,MAS3(r11)
-	mfspr	r0,SPRN_MAS6
-	stw	r0,MAS6(r11)
-#ifdef CONFIG_PHYS_64BIT
-	mfspr	r0,SPRN_MAS7
-	stw	r0,MAS7(r11)
-#endif /* CONFIG_PHYS_64BIT */
-#endif /* CONFIG_PPC_BOOK3E_MMU */
-#ifdef CONFIG_44x
-	mfspr	r0,SPRN_MMUCR
-	stw	r0,MMUCR(r11)
-#endif
-	mfspr	r0,SPRN_SRR0
-	stw	r0,_SRR0(r11)
-	mfspr	r0,SPRN_SRR1
-	stw	r0,_SRR1(r11)
-
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(crit_transfer_to_handler)
 #endif
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index f712b9bc6d62..a127d5e7efb4 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -229,6 +229,36 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	SAVE_4GPRS(3, r11);						     \
 	SAVE_2GPRS(7, r11)
 
+#define SAVE_xSRR(xSRR)			\
+	mfspr	r0,SPRN_##xSRR##0;	\
+	stw	r0,_##xSRR##0(r1);	\
+	mfspr	r0,SPRN_##xSRR##1;	\
+	stw	r0,_##xSRR##1(r1)
+
+
+.macro SAVE_MMU_REGS
+#ifdef CONFIG_PPC_BOOK3E_MMU
+	mfspr	r0,SPRN_MAS0
+	stw	r0,MAS0(r1)
+	mfspr	r0,SPRN_MAS1
+	stw	r0,MAS1(r1)
+	mfspr	r0,SPRN_MAS2
+	stw	r0,MAS2(r1)
+	mfspr	r0,SPRN_MAS3
+	stw	r0,MAS3(r1)
+	mfspr	r0,SPRN_MAS6
+	stw	r0,MAS6(r1)
+#ifdef CONFIG_PHYS_64BIT
+	mfspr	r0,SPRN_MAS7
+	stw	r0,MAS7(r1)
+#endif /* CONFIG_PHYS_64BIT */
+#endif /* CONFIG_PPC_BOOK3E_MMU */
+#ifdef CONFIG_44x
+	mfspr	r0,SPRN_MMUCR
+	stw	r0,MMUCR(r1)
+#endif
+.endm
+
 #define CRITICAL_EXCEPTION_PROLOG(intno) \
 		EXC_LEVEL_EXCEPTION_PROLOG(CRIT, intno, SPRN_CSRR0, SPRN_CSRR1)
 #define DEBUG_EXCEPTION_PROLOG \
@@ -271,6 +301,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	START_EXCEPTION(label);						\
 	CRITICAL_EXCEPTION_PROLOG(intno);				\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				\
+	SAVE_MMU_REGS;							\
+	SAVE_xSRR(SRR);							\
 	EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 			  crit_transfer_to_handler, ret_from_crit_exc)
 
@@ -280,6 +312,10 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	mfspr	r5,SPRN_ESR;					\
 	stw	r5,_ESR(r11);					\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
+	SAVE_xSRR(DSRR);					\
+	SAVE_xSRR(CSRR);					\
+	SAVE_MMU_REGS;						\
+	SAVE_xSRR(SRR);						\
 	EXC_XFER_TEMPLATE(hdlr, n+4, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 			  mcheck_transfer_to_handler, ret_from_mcheck_exc)
 
@@ -363,6 +399,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 2:	mfspr	r4,SPRN_DBSR;						      \
 	stw	r4,_ESR(r11);		/* DebugException takes DBSR in _ESR */\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \
+	SAVE_xSRR(CSRR);						      \
+	SAVE_MMU_REGS;							      \
+	SAVE_xSRR(SRR);							      \
 	EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), debug_transfer_to_handler, ret_from_debug_exc)
 
 #define DEBUG_CRIT_EXCEPTION						      \
@@ -417,6 +456,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 2:	mfspr	r4,SPRN_DBSR;						      \
 	stw	r4,_ESR(r11);		/* DebugException takes DBSR in _ESR */\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \
+	SAVE_MMU_REGS;							      \
+	SAVE_xSRR(SRR);							      \
 	EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), crit_transfer_to_handler, ret_from_crit_exc)
 
 #define DATA_STORAGE_EXCEPTION						      \
-- 
2.25.0


WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	 npiggin@gmail.com
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 22/43] powerpc/32: Refactor booke critical registers saving
Date: Tue,  9 Mar 2021 12:09:48 +0000 (UTC)	[thread overview]
Message-ID: <ca50c568c73091f5b9094043acab20b83e2eb7d8.1615291473.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1615291471.git.christophe.leroy@csgroup.eu>

Refactor booke critical registers saving into a few macros
and move it into the exception prolog directly.

Keep the dedicated transfert_to_handler entry point for the
moment allthough they are empty. They will be removed in a
later patch to reduce churn.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/entry_32.S   | 33 -------------------------
 arch/powerpc/kernel/head_booke.h | 41 ++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+), 33 deletions(-)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 01a064c8a96a..ad1fd33e1126 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -51,49 +51,16 @@
 #ifdef CONFIG_BOOKE
 	.globl	mcheck_transfer_to_handler
 mcheck_transfer_to_handler:
-	mfspr	r0,SPRN_DSRR0
-	stw	r0,_DSRR0(r11)
-	mfspr	r0,SPRN_DSRR1
-	stw	r0,_DSRR1(r11)
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(mcheck_transfer_to_handler)
 
 	.globl	debug_transfer_to_handler
 debug_transfer_to_handler:
-	mfspr	r0,SPRN_CSRR0
-	stw	r0,_CSRR0(r11)
-	mfspr	r0,SPRN_CSRR1
-	stw	r0,_CSRR1(r11)
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(debug_transfer_to_handler)
 
 	.globl	crit_transfer_to_handler
 crit_transfer_to_handler:
-#ifdef CONFIG_PPC_BOOK3E_MMU
-	mfspr	r0,SPRN_MAS0
-	stw	r0,MAS0(r11)
-	mfspr	r0,SPRN_MAS1
-	stw	r0,MAS1(r11)
-	mfspr	r0,SPRN_MAS2
-	stw	r0,MAS2(r11)
-	mfspr	r0,SPRN_MAS3
-	stw	r0,MAS3(r11)
-	mfspr	r0,SPRN_MAS6
-	stw	r0,MAS6(r11)
-#ifdef CONFIG_PHYS_64BIT
-	mfspr	r0,SPRN_MAS7
-	stw	r0,MAS7(r11)
-#endif /* CONFIG_PHYS_64BIT */
-#endif /* CONFIG_PPC_BOOK3E_MMU */
-#ifdef CONFIG_44x
-	mfspr	r0,SPRN_MMUCR
-	stw	r0,MMUCR(r11)
-#endif
-	mfspr	r0,SPRN_SRR0
-	stw	r0,_SRR0(r11)
-	mfspr	r0,SPRN_SRR1
-	stw	r0,_SRR1(r11)
-
 	/* fall through */
 _ASM_NOKPROBE_SYMBOL(crit_transfer_to_handler)
 #endif
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index f712b9bc6d62..a127d5e7efb4 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -229,6 +229,36 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	SAVE_4GPRS(3, r11);						     \
 	SAVE_2GPRS(7, r11)
 
+#define SAVE_xSRR(xSRR)			\
+	mfspr	r0,SPRN_##xSRR##0;	\
+	stw	r0,_##xSRR##0(r1);	\
+	mfspr	r0,SPRN_##xSRR##1;	\
+	stw	r0,_##xSRR##1(r1)
+
+
+.macro SAVE_MMU_REGS
+#ifdef CONFIG_PPC_BOOK3E_MMU
+	mfspr	r0,SPRN_MAS0
+	stw	r0,MAS0(r1)
+	mfspr	r0,SPRN_MAS1
+	stw	r0,MAS1(r1)
+	mfspr	r0,SPRN_MAS2
+	stw	r0,MAS2(r1)
+	mfspr	r0,SPRN_MAS3
+	stw	r0,MAS3(r1)
+	mfspr	r0,SPRN_MAS6
+	stw	r0,MAS6(r1)
+#ifdef CONFIG_PHYS_64BIT
+	mfspr	r0,SPRN_MAS7
+	stw	r0,MAS7(r1)
+#endif /* CONFIG_PHYS_64BIT */
+#endif /* CONFIG_PPC_BOOK3E_MMU */
+#ifdef CONFIG_44x
+	mfspr	r0,SPRN_MMUCR
+	stw	r0,MMUCR(r1)
+#endif
+.endm
+
 #define CRITICAL_EXCEPTION_PROLOG(intno) \
 		EXC_LEVEL_EXCEPTION_PROLOG(CRIT, intno, SPRN_CSRR0, SPRN_CSRR1)
 #define DEBUG_EXCEPTION_PROLOG \
@@ -271,6 +301,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	START_EXCEPTION(label);						\
 	CRITICAL_EXCEPTION_PROLOG(intno);				\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				\
+	SAVE_MMU_REGS;							\
+	SAVE_xSRR(SRR);							\
 	EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 			  crit_transfer_to_handler, ret_from_crit_exc)
 
@@ -280,6 +312,10 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 	mfspr	r5,SPRN_ESR;					\
 	stw	r5,_ESR(r11);					\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
+	SAVE_xSRR(DSRR);					\
+	SAVE_xSRR(CSRR);					\
+	SAVE_MMU_REGS;						\
+	SAVE_xSRR(SRR);						\
 	EXC_XFER_TEMPLATE(hdlr, n+4, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 			  mcheck_transfer_to_handler, ret_from_mcheck_exc)
 
@@ -363,6 +399,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 2:	mfspr	r4,SPRN_DBSR;						      \
 	stw	r4,_ESR(r11);		/* DebugException takes DBSR in _ESR */\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \
+	SAVE_xSRR(CSRR);						      \
+	SAVE_MMU_REGS;							      \
+	SAVE_xSRR(SRR);							      \
 	EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), debug_transfer_to_handler, ret_from_debug_exc)
 
 #define DEBUG_CRIT_EXCEPTION						      \
@@ -417,6 +456,8 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 2:	mfspr	r4,SPRN_DBSR;						      \
 	stw	r4,_ESR(r11);		/* DebugException takes DBSR in _ESR */\
 	addi	r3,r1,STACK_FRAME_OVERHEAD;				      \
+	SAVE_MMU_REGS;							      \
+	SAVE_xSRR(SRR);							      \
 	EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), crit_transfer_to_handler, ret_from_crit_exc)
 
 #define DATA_STORAGE_EXCEPTION						      \
-- 
2.25.0


  parent reply	other threads:[~2021-03-09 12:10 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09 12:09 [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit in C Christophe Leroy
2021-03-09 12:09 ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 01/43] powerpc/traps: unrecoverable_exception() is not an interrupt handler Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:16   ` Nicholas Piggin
2021-03-10  1:16     ` Nicholas Piggin
2021-03-09 12:09 ` [PATCH v2 02/43] powerpc/traps: Declare unrecoverable_exception() as __noreturn Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:22   ` Nicholas Piggin
2021-03-10  1:22     ` Nicholas Piggin
2021-03-12  8:40     ` Christophe Leroy
2021-03-12  8:40       ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 03/43] powerpc/40x: Don't use SPRN_SPRG_SCRATCH0/1 in TLB miss handlers Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 04/43] powerpc/40x: Change CRITICAL_EXCEPTION_PROLOG macro to a gas macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 05/43] powerpc/40x: Save SRR0/SRR1 and r10/r11 earlier in critical exception Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 06/43] powerpc/40x: Reorder a few instructions in critical exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 07/43] powerpc/40x: Prepare for enabling MMU " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 08/43] powerpc/40x: Prepare normal exception handler for enabling MMU early Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 09/43] powerpc/32: Reconcile interrupts in C Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 10/43] powerpc/32: Entry cpu time accounting " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 11/43] powerpc/32: Handle bookE debugging in C in exception entry Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 12/43] powerpc/32: Use fast instruction to set MSR RI in exception prolog on 8xx Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 13/43] powerpc/32: Remove ksp_limit Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 14/43] powerpc/32: Always enable data translation in exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 15/43] powerpc/32: Tag DAR in EXCEPTION_PROLOG_2 for the 8xx Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 16/43] powerpc/32: Enable instruction translation at the same time as data translation Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 17/43] powerpc/32: Statically initialise first emergency context Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 18/43] powerpc/32: Add vmap_stack_overflow label inside the macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 19/43] powerpc/32: Use START_EXCEPTION() as much as possible Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 20/43] powerpc/32: Move exception prolog code into .text once MMU is back on Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 21/43] powerpc/32: Provide a name to exception prolog continuation in virtual mode Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` Christophe Leroy [this message]
2021-03-09 12:09   ` [PATCH v2 22/43] powerpc/32: Refactor booke critical registers saving Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 23/43] powerpc/32: Perform normal function call in exception entry Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 24/43] powerpc/32: Always save non volatile registers on " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 25/43] powerpc/32: Replace ASM exception exit by C exception exit from ppc64 Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-11 13:46   ` Michael Ellerman
2021-03-11 13:46     ` Michael Ellerman
2021-03-11 19:39     ` Christophe Leroy
2021-03-11 19:39       ` Christophe Leroy
2021-03-11 23:26       ` Michael Ellerman
2021-03-11 23:26         ` Michael Ellerman
2021-03-12  8:28         ` Christophe Leroy
2021-03-12  8:28           ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 26/43] powerpc/32: Set regs parameter in r3 in transfer_to_handler Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 27/43] powerpc/32: Call bad_page_fault() from do_page_fault() Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 28/43] powerpc/64e: " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:29   ` Nicholas Piggin
2021-03-10  1:29     ` Nicholas Piggin
2021-03-12  8:39     ` Christophe Leroy
2021-03-12  8:39       ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 29/43] powerpc/32: Save trap number on stack in exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 30/43] powerpc/32: Add a prepare_transfer_to_handler macro for exception prologs Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 31/43] powerpc/32: Only restore non volatile registers when required Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 32/43] powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 33/43] powerpc/32: Remove the xfer parameter in EXCEPTION() macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 34/43] powerpc/32: Refactor saving of volatile registers in exception prologs Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 35/43] powerpc/32: Save remaining registers in exception prolog Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 36/43] powerpc/32: Set current->thread.regs in C interrupt entry Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-10  1:33   ` Nicholas Piggin
2021-03-10  1:33     ` Nicholas Piggin
2021-03-11 10:38     ` Christophe Leroy
2021-03-11 10:38       ` Christophe Leroy
2021-03-11 12:38       ` Christophe Leroy
2021-03-11 12:38         ` Christophe Leroy
2021-03-12  1:00         ` Nicholas Piggin
2021-03-12  1:00           ` Nicholas Piggin
2021-03-09 12:10 ` [PATCH v2 37/43] powerpc/32: Return directly from power_save_ppc32_restore() Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 38/43] powerpc/32: Only use prepare_transfer_to_handler function on book3s/32 and e500 Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 39/43] powerpc/32s: Move KUEP locking/unlocking in C Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 40/43] powerpc/64s: Make kuap_check_amr() and kuap_get_and_check_amr() generic Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-10  1:37   ` Nicholas Piggin
2021-03-10  1:37     ` Nicholas Piggin
2021-03-12  8:37     ` Christophe Leroy
2021-03-12  8:37       ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 41/43] powerpc/32s: Create C version of kuap save/restore/check helpers Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 42/43] powerpc/8xx: " Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 43/43] powerpc/32: Manage KUAP in C Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-14 10:01 ` [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit " Michael Ellerman
2021-03-14 10:01   ` Michael Ellerman

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