From: Dragan Simic <dsimic@manjaro.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Alexey Charkov <alchark@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Viresh Kumar <viresh.kumar@linaro.org>
Subject: Re: [PATCH 4/4] arm64: dts: rockchip: Add OPP data for CPU cores on RK3588
Date: Fri, 26 Jan 2024 07:32:55 +0100 [thread overview]
Message-ID: <ccc004cfae513195351ce0a79e12f6af@manjaro.org> (raw)
In-Reply-To: <731aac66-f698-4a1e-b9ee-46a7f24ecae5@linaro.org>
Hello Daniel,
On 2024-01-25 10:30, Daniel Lezcano wrote:
> On 24/01/2024 21:30, Alexey Charkov wrote:
>> By default the CPUs on RK3588 start up in a conservative performance
>> mode. Add frequency and voltage mappings to the device tree to enable
>> dynamic scaling via cpufreq
>>
>> Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> ---
>> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 209
>> ++++++++++++++++++++++++++++++
>> 1 file changed, 209 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> index 131b9eb21398..e605be531a0f 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> @@ -97,6 +97,7 @@ cpu_l0: cpu@0 {
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -116,6 +117,7 @@ cpu_l1: cpu@100 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -135,6 +137,7 @@ cpu_l2: cpu@200 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -154,6 +157,7 @@ cpu_l3: cpu@300 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -175,6 +179,7 @@ cpu_b0: cpu@400 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -194,6 +199,7 @@ cpu_b1: cpu@500 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -215,6 +221,7 @@ cpu_b2: cpu@600 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -234,6 +241,7 @@ cpu_b3: cpu@700 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -348,6 +356,207 @@ l3_cache: l3-cache {
>> };
>> };
>> + cluster0_opp_table: opp-table-cluster0 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> It is not useful to introduce OPP with the same voltage. There is no
> gain in terms of energy efficiency as the compute capacity is linearly
> tied with power consumption (P=CxFxV²) in this case.
>
> For example, opp-408 consumes 2 bogoWatts and opp-816 consumes 4
> bogoWatts (because of the same voltage).
>
> For a workload, opp-408 takes 10 sec and opp-816 takes 5 sec because
> it is twice faster.
>
> The energy consumption is:
>
> opp-408 = 10 x 2 = 20 BogoJoules
> opp-816 = 5 x 4 = 20 BogoJoules
I'd respectfully disagree that including multiple OPPs with the same
voltage
but different frequencies isn't useful. Please allow me to explain.
See, the total amount of consumed energy is, in general, the same for
such
OPPs and the same CPU task(s), if we ignore the static leakage current
and
such stuff, which isn't important here. Though, the emphasis here is on
"total", i.e. without taking into account the actual amount of time
required
for the exemplified CPU task(s) to complete. If the total amount of
time
is quite short, we aren't going to heat up the package and the board
enough
to hit the CPU thermal throttling; this approach is also sometimes
referred
to as "race to idle", which is actually quite effective for
battery-powered
mobile devices that tend to load their CPU cores in bursts, while
remaining
kind of inactive for the remaining time.
However, if the CPU task(s) last long enough to actually saturate the
thermal
capacities of the package and the board or the device, we're getting
into the
CPU throttling territory, in which running the CPU cores slower, but
still as
fast as possible, may actually be beneficial for the overall CPU
performance.
By running the CPU cores slower, we're lowering the power and
"spreading" the
total energy consumption over time, i.e. we're making some time to allow
the
generated heat to dissipate into the surroundings. As we know, having
more
energy consumed by the SoC means more heat generated by the SoC, but the
resulting temperature of the SoC depends on how fast the energy is
consumed,
which equals to how fast the CPUs run; of course, all that is valid
under
the reasonable assumption that the entire cooling setup, including the
board
surroundings, remains unchanged all the time.
Having all that in mind, having a few OPPs with the same voltage but
different
frequencies can actually help us achieve better CPU performance. That
way,
throttling won't have to slow the CPUs more than it's actually needed to
hit
and maintain the desired thermal trip temperatures.
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <712500 712500 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <762500 762500 950000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <850000 850000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <950000 950000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + };
>> +
>> + cluster1_opp_table: opp-table-cluster1 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> same comment
>
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> + cluster2_opp_table: opp-table-cluster2 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> firmware {
>> optee: optee {
>> compatible = "linaro,optee-tz";
>>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Dragan Simic <dsimic@manjaro.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Alexey Charkov <alchark@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Viresh Kumar <viresh.kumar@linaro.org>
Subject: Re: [PATCH 4/4] arm64: dts: rockchip: Add OPP data for CPU cores on RK3588
Date: Fri, 26 Jan 2024 07:32:55 +0100 [thread overview]
Message-ID: <ccc004cfae513195351ce0a79e12f6af@manjaro.org> (raw)
In-Reply-To: <731aac66-f698-4a1e-b9ee-46a7f24ecae5@linaro.org>
Hello Daniel,
On 2024-01-25 10:30, Daniel Lezcano wrote:
> On 24/01/2024 21:30, Alexey Charkov wrote:
>> By default the CPUs on RK3588 start up in a conservative performance
>> mode. Add frequency and voltage mappings to the device tree to enable
>> dynamic scaling via cpufreq
>>
>> Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> ---
>> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 209
>> ++++++++++++++++++++++++++++++
>> 1 file changed, 209 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> index 131b9eb21398..e605be531a0f 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> @@ -97,6 +97,7 @@ cpu_l0: cpu@0 {
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -116,6 +117,7 @@ cpu_l1: cpu@100 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -135,6 +137,7 @@ cpu_l2: cpu@200 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -154,6 +157,7 @@ cpu_l3: cpu@300 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -175,6 +179,7 @@ cpu_b0: cpu@400 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -194,6 +199,7 @@ cpu_b1: cpu@500 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -215,6 +221,7 @@ cpu_b2: cpu@600 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -234,6 +241,7 @@ cpu_b3: cpu@700 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -348,6 +356,207 @@ l3_cache: l3-cache {
>> };
>> };
>> + cluster0_opp_table: opp-table-cluster0 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> It is not useful to introduce OPP with the same voltage. There is no
> gain in terms of energy efficiency as the compute capacity is linearly
> tied with power consumption (P=CxFxV²) in this case.
>
> For example, opp-408 consumes 2 bogoWatts and opp-816 consumes 4
> bogoWatts (because of the same voltage).
>
> For a workload, opp-408 takes 10 sec and opp-816 takes 5 sec because
> it is twice faster.
>
> The energy consumption is:
>
> opp-408 = 10 x 2 = 20 BogoJoules
> opp-816 = 5 x 4 = 20 BogoJoules
I'd respectfully disagree that including multiple OPPs with the same
voltage
but different frequencies isn't useful. Please allow me to explain.
See, the total amount of consumed energy is, in general, the same for
such
OPPs and the same CPU task(s), if we ignore the static leakage current
and
such stuff, which isn't important here. Though, the emphasis here is on
"total", i.e. without taking into account the actual amount of time
required
for the exemplified CPU task(s) to complete. If the total amount of
time
is quite short, we aren't going to heat up the package and the board
enough
to hit the CPU thermal throttling; this approach is also sometimes
referred
to as "race to idle", which is actually quite effective for
battery-powered
mobile devices that tend to load their CPU cores in bursts, while
remaining
kind of inactive for the remaining time.
However, if the CPU task(s) last long enough to actually saturate the
thermal
capacities of the package and the board or the device, we're getting
into the
CPU throttling territory, in which running the CPU cores slower, but
still as
fast as possible, may actually be beneficial for the overall CPU
performance.
By running the CPU cores slower, we're lowering the power and
"spreading" the
total energy consumption over time, i.e. we're making some time to allow
the
generated heat to dissipate into the surroundings. As we know, having
more
energy consumed by the SoC means more heat generated by the SoC, but the
resulting temperature of the SoC depends on how fast the energy is
consumed,
which equals to how fast the CPUs run; of course, all that is valid
under
the reasonable assumption that the entire cooling setup, including the
board
surroundings, remains unchanged all the time.
Having all that in mind, having a few OPPs with the same voltage but
different
frequencies can actually help us achieve better CPU performance. That
way,
throttling won't have to slow the CPUs more than it's actually needed to
hit
and maintain the desired thermal trip temperatures.
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <712500 712500 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <762500 762500 950000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <850000 850000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <950000 950000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + };
>> +
>> + cluster1_opp_table: opp-table-cluster1 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> same comment
>
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> + cluster2_opp_table: opp-table-cluster2 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> firmware {
>> optee: optee {
>> compatible = "linaro,optee-tz";
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Dragan Simic <dsimic@manjaro.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Alexey Charkov <alchark@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Viresh Kumar <viresh.kumar@linaro.org>
Subject: Re: [PATCH 4/4] arm64: dts: rockchip: Add OPP data for CPU cores on RK3588
Date: Fri, 26 Jan 2024 07:32:55 +0100 [thread overview]
Message-ID: <ccc004cfae513195351ce0a79e12f6af@manjaro.org> (raw)
In-Reply-To: <731aac66-f698-4a1e-b9ee-46a7f24ecae5@linaro.org>
Hello Daniel,
On 2024-01-25 10:30, Daniel Lezcano wrote:
> On 24/01/2024 21:30, Alexey Charkov wrote:
>> By default the CPUs on RK3588 start up in a conservative performance
>> mode. Add frequency and voltage mappings to the device tree to enable
>> dynamic scaling via cpufreq
>>
>> Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> ---
>> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 209
>> ++++++++++++++++++++++++++++++
>> 1 file changed, 209 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> index 131b9eb21398..e605be531a0f 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> @@ -97,6 +97,7 @@ cpu_l0: cpu@0 {
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -116,6 +117,7 @@ cpu_l1: cpu@100 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -135,6 +137,7 @@ cpu_l2: cpu@200 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -154,6 +157,7 @@ cpu_l3: cpu@300 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <530>;
>> clocks = <&scmi_clk SCMI_CLK_CPUL>;
>> + operating-points-v2 = <&cluster0_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <32768>;
>> i-cache-line-size = <64>;
>> @@ -175,6 +179,7 @@ cpu_b0: cpu@400 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -194,6 +199,7 @@ cpu_b1: cpu@500 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB01>;
>> + operating-points-v2 = <&cluster1_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -215,6 +221,7 @@ cpu_b2: cpu@600 {
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> assigned-clock-rates = <816000000>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -234,6 +241,7 @@ cpu_b3: cpu@700 {
>> enable-method = "psci";
>> capacity-dmips-mhz = <1024>;
>> clocks = <&scmi_clk SCMI_CLK_CPUB23>;
>> + operating-points-v2 = <&cluster2_opp_table>;
>> cpu-idle-states = <&CPU_SLEEP>;
>> i-cache-size = <65536>;
>> i-cache-line-size = <64>;
>> @@ -348,6 +356,207 @@ l3_cache: l3-cache {
>> };
>> };
>> + cluster0_opp_table: opp-table-cluster0 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> It is not useful to introduce OPP with the same voltage. There is no
> gain in terms of energy efficiency as the compute capacity is linearly
> tied with power consumption (P=CxFxV²) in this case.
>
> For example, opp-408 consumes 2 bogoWatts and opp-816 consumes 4
> bogoWatts (because of the same voltage).
>
> For a workload, opp-408 takes 10 sec and opp-816 takes 5 sec because
> it is twice faster.
>
> The energy consumption is:
>
> opp-408 = 10 x 2 = 20 BogoJoules
> opp-816 = 5 x 4 = 20 BogoJoules
I'd respectfully disagree that including multiple OPPs with the same
voltage
but different frequencies isn't useful. Please allow me to explain.
See, the total amount of consumed energy is, in general, the same for
such
OPPs and the same CPU task(s), if we ignore the static leakage current
and
such stuff, which isn't important here. Though, the emphasis here is on
"total", i.e. without taking into account the actual amount of time
required
for the exemplified CPU task(s) to complete. If the total amount of
time
is quite short, we aren't going to heat up the package and the board
enough
to hit the CPU thermal throttling; this approach is also sometimes
referred
to as "race to idle", which is actually quite effective for
battery-powered
mobile devices that tend to load their CPU cores in bursts, while
remaining
kind of inactive for the remaining time.
However, if the CPU task(s) last long enough to actually saturate the
thermal
capacities of the package and the board or the device, we're getting
into the
CPU throttling territory, in which running the CPU cores slower, but
still as
fast as possible, may actually be beneficial for the overall CPU
performance.
By running the CPU cores slower, we're lowering the power and
"spreading" the
total energy consumption over time, i.e. we're making some time to allow
the
generated heat to dissipate into the surroundings. As we know, having
more
energy consumed by the SoC means more heat generated by the SoC, but the
resulting temperature of the SoC depends on how fast the energy is
consumed,
which equals to how fast the CPUs run; of course, all that is valid
under
the reasonable assumption that the entire cooling setup, including the
board
surroundings, remains unchanged all the time.
Having all that in mind, having a few OPPs with the same voltage but
different
frequencies can actually help us achieve better CPU performance. That
way,
throttling won't have to slow the CPUs more than it's actually needed to
hit
and maintain the desired thermal trip temperatures.
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <712500 712500 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <762500 762500 950000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <850000 850000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <950000 950000 950000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + };
>> +
>> + cluster1_opp_table: opp-table-cluster1 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> same comment
>
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> + cluster2_opp_table: opp-table-cluster2 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-408000000 {
>> + opp-hz = /bits/ 64 <408000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + opp-suspend;
>> + };
>> + opp-600000000 {
>> + opp-hz = /bits/ 64 <600000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-816000000 {
>> + opp-hz = /bits/ 64 <816000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1200000000 {
>> + opp-hz = /bits/ 64 <1200000000>;
>> + opp-microvolt = <675000 675000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1416000000 {
>> + opp-hz = /bits/ 64 <1416000000>;
>> + opp-microvolt = <725000 725000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1608000000 {
>> + opp-hz = /bits/ 64 <1608000000>;
>> + opp-microvolt = <762500 762500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-1800000000 {
>> + opp-hz = /bits/ 64 <1800000000>;
>> + opp-microvolt = <850000 850000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2016000000 {
>> + opp-hz = /bits/ 64 <2016000000>;
>> + opp-microvolt = <925000 925000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2208000000 {
>> + opp-hz = /bits/ 64 <2208000000>;
>> + opp-microvolt = <987500 987500 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2256000000 {
>> + opp-hz = /bits/ 64 <2256000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2304000000 {
>> + opp-hz = /bits/ 64 <2304000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2352000000 {
>> + opp-hz = /bits/ 64 <2352000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>> + opp-2400000000 {
>> + opp-hz = /bits/ 64 <2400000000>;
>> + opp-microvolt = <1000000 1000000 1000000>;
>> + clock-latency-ns = <40000>;
>> + };
>
> Same comment
>
>> + };
>> +
>> firmware {
>> optee: optee {
>> compatible = "linaro,optee-tz";
>>
next prev parent reply other threads:[~2024-01-26 6:33 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 20:30 [PATCH 0/4] RK3588 and Rock 5B dts additions: thermal, OPP, rfkill and fan Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` [PATCH 1/4] arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5b Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` [PATCH 2/4] arm64: dts: rockchip: enable built-in thermal monitoring on rk3588 Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 21:56 ` Daniel Lezcano
2024-01-24 21:56 ` Daniel Lezcano
2024-01-24 21:56 ` Daniel Lezcano
2024-01-25 8:26 ` Alexey Charkov
2024-01-25 8:26 ` Alexey Charkov
2024-01-25 8:26 ` Alexey Charkov
2024-01-25 10:02 ` Daniel Lezcano
2024-01-25 10:02 ` Daniel Lezcano
2024-01-25 10:02 ` Daniel Lezcano
2024-01-25 14:46 ` Alexey Charkov
2024-01-25 14:46 ` Alexey Charkov
2024-01-25 14:46 ` Alexey Charkov
2024-01-25 22:19 ` Dragan Simic
2024-01-25 22:19 ` Dragan Simic
2024-01-25 22:19 ` Dragan Simic
2024-01-25 13:34 ` Diederik de Haas
2024-01-25 13:34 ` Diederik de Haas
2024-01-25 13:34 ` Diederik de Haas
2024-01-24 20:30 ` [PATCH 3/4] arm64: dts: rockchip: enable temperature driven fan control on Rock 5B Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 21:59 ` Daniel Lezcano
2024-01-24 21:59 ` Daniel Lezcano
2024-01-24 21:59 ` Daniel Lezcano
2024-01-25 23:13 ` Dragan Simic
2024-01-25 23:13 ` Dragan Simic
2024-01-25 23:13 ` Dragan Simic
2024-01-27 20:27 ` Dragan Simic
2024-01-27 20:27 ` Dragan Simic
2024-01-27 20:27 ` Dragan Simic
2024-01-28 20:08 ` Alexey Charkov
2024-01-28 20:08 ` Alexey Charkov
2024-01-28 20:08 ` Alexey Charkov
2024-01-29 0:46 ` Dragan Simic
2024-01-29 0:46 ` Dragan Simic
2024-01-29 0:46 ` Dragan Simic
2024-01-24 20:30 ` [PATCH 4/4] arm64: dts: rockchip: Add OPP data for CPU cores on RK3588 Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-24 20:30 ` Alexey Charkov
2024-01-25 9:30 ` Daniel Lezcano
2024-01-25 9:30 ` Daniel Lezcano
2024-01-25 9:30 ` Daniel Lezcano
2024-01-25 10:17 ` Alexey Charkov
2024-01-25 10:17 ` Alexey Charkov
2024-01-25 10:17 ` Alexey Charkov
2024-01-26 6:32 ` Dragan Simic [this message]
2024-01-26 6:32 ` Dragan Simic
2024-01-26 6:32 ` Dragan Simic
2024-01-26 6:44 ` Alexey Charkov
2024-01-26 6:44 ` Alexey Charkov
2024-01-26 6:44 ` Alexey Charkov
2024-01-26 7:04 ` Dragan Simic
2024-01-26 7:04 ` Dragan Simic
2024-01-26 7:04 ` Dragan Simic
2024-01-26 7:30 ` Alexey Charkov
2024-01-26 7:30 ` Alexey Charkov
2024-01-26 7:30 ` Alexey Charkov
2024-01-26 7:49 ` Dragan Simic
2024-01-26 7:49 ` Dragan Simic
2024-01-26 7:49 ` Dragan Simic
2024-01-26 12:56 ` Daniel Lezcano
2024-01-26 12:56 ` Daniel Lezcano
2024-01-26 12:56 ` Daniel Lezcano
2024-01-26 13:44 ` Alexey Charkov
2024-01-26 13:44 ` Alexey Charkov
2024-01-26 13:44 ` Alexey Charkov
2024-01-26 20:33 ` Dragan Simic
2024-01-26 20:33 ` Dragan Simic
2024-01-26 20:33 ` Dragan Simic
2024-01-27 19:41 ` Alexey Charkov
2024-01-27 19:41 ` Alexey Charkov
2024-01-27 19:41 ` Alexey Charkov
2024-01-28 3:35 ` Dragan Simic
2024-01-28 3:35 ` Dragan Simic
2024-01-28 3:35 ` Dragan Simic
2024-01-28 19:14 ` Alexey Charkov
2024-01-28 19:14 ` Alexey Charkov
2024-01-28 19:14 ` Alexey Charkov
2024-01-29 0:09 ` Dragan Simic
2024-01-29 0:09 ` Dragan Simic
2024-01-29 0:09 ` Dragan Simic
2024-01-29 7:39 ` Dragan Simic
2024-01-29 7:39 ` Dragan Simic
2024-01-29 7:39 ` Dragan Simic
2024-01-28 15:06 ` Daniel Lezcano
2024-01-28 15:06 ` Daniel Lezcano
2024-01-28 15:06 ` Daniel Lezcano
2024-01-28 19:32 ` Alexey Charkov
2024-01-28 19:32 ` Alexey Charkov
2024-01-28 19:32 ` Alexey Charkov
2024-01-26 20:04 ` Dragan Simic
2024-01-26 20:04 ` Dragan Simic
2024-01-26 20:04 ` Dragan Simic
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ccc004cfae513195351ce0a79e12f6af@manjaro.org \
--to=dsimic@manjaro.org \
--cc=alchark@gmail.com \
--cc=conor+dt@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.