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From: Hans de Goede <hdegoede@redhat.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>,
	linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0
Date: Sat, 11 Jul 2020 15:58:02 +0200	[thread overview]
Message-ID: <d98c758b-711d-baae-e752-1b32040128a4@redhat.com> (raw)
In-Reply-To: <20200711061120.di53sk5utjerb72q@pengutronix.de>

Hi,

On 7/11/20 8:11 AM, Uwe Kleine-König wrote:
> On Thu, Jul 09, 2020 at 05:47:59PM +0200, Hans de Goede wrote:
>> Hi,
>>
>> On 7/9/20 4:50 PM, Andy Shevchenko wrote:
>>> On Wed, Jul 08, 2020 at 11:14:22PM +0200, Hans de Goede wrote:
>>>> The datasheet specifies that programming the base_unit part of the
>>>> ctrl register to 0 results in a contineous low signal.
>>>>
>>>> Adjust the get_state method to reflect this by setting pwm_state.period
>>>> to 1 and duty_cycle to 0.
>>>
>>> ...
>>>
>>>> +	if (freq == 0) {
>>>> +		/* In this case the PWM outputs a continous low signal */
>>>
>>>> +		state->period = 1;
>>>
>>> I guess this should be something like half of the range (so base unit calc
>>> will give 128). Because with period = 1 (too small) it will give too small
>>> base unit (if apply) and as a result we get high frequency pulses.
>>
>> You are right, that if after this the user only changes the duty-cycle
>> things will work very poorly, we will end up with a base_unit value of
>> e.g 65535 and then have almost no duty-cycle resolution at all.
> 
> Is this a problem of the consumer that we don't need to solve? Are there
> known consumers running into this problem?

AFAICT we never ever actually see freq == 0 here, this is just a code-path
to avoid a divide by 0 in case we somehow mysteriously do get freq == 0
here.

On boot the PWM controller is either not used and then the default freq =
input-clock / 256, or it is used and programmed to same sane value.

> pwm_lpss_prepare() is buggy here, a request for a too low period should be
> refused.

So instead of clamping as is done in an earlier patch, we should return
-EINVAL ?  Only for too low periods, or also for too high periods ?

I must say this does worry me a bit, the VBT may request 200Hz output
frequency and some revisions of the PWM controller can do 283Hz as
lowest output freq. ATM we just give the i915 code the 283 Hz if it
request 200, that seems more sane then to give it -EINVAL, since -EINVAL
would require the i915 driver to know the exact limits of each PWM
controller and then to clamp the VBT value before passing it to the
PWM driver, that means moving knowledge out of the PWM driver into
the i915 code.

I believe that without first amending the PWM API too allow a consumer
to query the period min/max values, returning -EINVAL is not the right
thing to do here.

Regards,

Hans


WARNING: multiple messages have this Message-ID (diff)
From: Hans de Goede <hdegoede@redhat.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	linux-acpi@vger.kernel.org,
	Thierry Reding <thierry.reding@gmail.com>,
	dri-devel@lists.freedesktop.org,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Len Brown <lenb@kernel.org>
Subject: Re: [PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0
Date: Sat, 11 Jul 2020 15:58:02 +0200	[thread overview]
Message-ID: <d98c758b-711d-baae-e752-1b32040128a4@redhat.com> (raw)
In-Reply-To: <20200711061120.di53sk5utjerb72q@pengutronix.de>

Hi,

On 7/11/20 8:11 AM, Uwe Kleine-König wrote:
> On Thu, Jul 09, 2020 at 05:47:59PM +0200, Hans de Goede wrote:
>> Hi,
>>
>> On 7/9/20 4:50 PM, Andy Shevchenko wrote:
>>> On Wed, Jul 08, 2020 at 11:14:22PM +0200, Hans de Goede wrote:
>>>> The datasheet specifies that programming the base_unit part of the
>>>> ctrl register to 0 results in a contineous low signal.
>>>>
>>>> Adjust the get_state method to reflect this by setting pwm_state.period
>>>> to 1 and duty_cycle to 0.
>>>
>>> ...
>>>
>>>> +	if (freq == 0) {
>>>> +		/* In this case the PWM outputs a continous low signal */
>>>
>>>> +		state->period = 1;
>>>
>>> I guess this should be something like half of the range (so base unit calc
>>> will give 128). Because with period = 1 (too small) it will give too small
>>> base unit (if apply) and as a result we get high frequency pulses.
>>
>> You are right, that if after this the user only changes the duty-cycle
>> things will work very poorly, we will end up with a base_unit value of
>> e.g 65535 and then have almost no duty-cycle resolution at all.
> 
> Is this a problem of the consumer that we don't need to solve? Are there
> known consumers running into this problem?

AFAICT we never ever actually see freq == 0 here, this is just a code-path
to avoid a divide by 0 in case we somehow mysteriously do get freq == 0
here.

On boot the PWM controller is either not used and then the default freq =
input-clock / 256, or it is used and programmed to same sane value.

> pwm_lpss_prepare() is buggy here, a request for a too low period should be
> refused.

So instead of clamping as is done in an earlier patch, we should return
-EINVAL ?  Only for too low periods, or also for too high periods ?

I must say this does worry me a bit, the VBT may request 200Hz output
frequency and some revisions of the PWM controller can do 283Hz as
lowest output freq. ATM we just give the i915 code the 283 Hz if it
request 200, that seems more sane then to give it -EINVAL, since -EINVAL
would require the i915 driver to know the exact limits of each PWM
controller and then to clamp the VBT value before passing it to the
PWM driver, that means moving knowledge out of the PWM driver into
the i915 code.

I believe that without first amending the PWM API too allow a consumer
to query the period min/max values, returning -EINVAL is not the right
thing to do here.

Regards,

Hans

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Hans de Goede <hdegoede@redhat.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Len Brown <lenb@kernel.org>
Subject: Re: [Intel-gfx] [PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0
Date: Sat, 11 Jul 2020 15:58:02 +0200	[thread overview]
Message-ID: <d98c758b-711d-baae-e752-1b32040128a4@redhat.com> (raw)
In-Reply-To: <20200711061120.di53sk5utjerb72q@pengutronix.de>

Hi,

On 7/11/20 8:11 AM, Uwe Kleine-König wrote:
> On Thu, Jul 09, 2020 at 05:47:59PM +0200, Hans de Goede wrote:
>> Hi,
>>
>> On 7/9/20 4:50 PM, Andy Shevchenko wrote:
>>> On Wed, Jul 08, 2020 at 11:14:22PM +0200, Hans de Goede wrote:
>>>> The datasheet specifies that programming the base_unit part of the
>>>> ctrl register to 0 results in a contineous low signal.
>>>>
>>>> Adjust the get_state method to reflect this by setting pwm_state.period
>>>> to 1 and duty_cycle to 0.
>>>
>>> ...
>>>
>>>> +	if (freq == 0) {
>>>> +		/* In this case the PWM outputs a continous low signal */
>>>
>>>> +		state->period = 1;
>>>
>>> I guess this should be something like half of the range (so base unit calc
>>> will give 128). Because with period = 1 (too small) it will give too small
>>> base unit (if apply) and as a result we get high frequency pulses.
>>
>> You are right, that if after this the user only changes the duty-cycle
>> things will work very poorly, we will end up with a base_unit value of
>> e.g 65535 and then have almost no duty-cycle resolution at all.
> 
> Is this a problem of the consumer that we don't need to solve? Are there
> known consumers running into this problem?

AFAICT we never ever actually see freq == 0 here, this is just a code-path
to avoid a divide by 0 in case we somehow mysteriously do get freq == 0
here.

On boot the PWM controller is either not used and then the default freq =
input-clock / 256, or it is used and programmed to same sane value.

> pwm_lpss_prepare() is buggy here, a request for a too low period should be
> refused.

So instead of clamping as is done in an earlier patch, we should return
-EINVAL ?  Only for too low periods, or also for too high periods ?

I must say this does worry me a bit, the VBT may request 200Hz output
frequency and some revisions of the PWM controller can do 283Hz as
lowest output freq. ATM we just give the i915 code the 283 Hz if it
request 200, that seems more sane then to give it -EINVAL, since -EINVAL
would require the i915 driver to know the exact limits of each PWM
controller and then to clamp the VBT value before passing it to the
PWM driver, that means moving knowledge out of the PWM driver into
the i915 code.

I believe that without first amending the PWM API too allow a consumer
to query the period min/max values, returning -EINVAL is not the right
thing to do here.

Regards,

Hans

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-07-11 13:58 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08 21:14 [PATCH v4 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-07-08 21:14 ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14 ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 01/16] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 02/16] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 03/16] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 04/16] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 12:53   ` Andy Shevchenko
2020-07-09 12:53     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 12:53     ` Andy Shevchenko
2020-07-09 13:23     ` Hans de Goede
2020-07-09 13:23       ` [Intel-gfx] " Hans de Goede
2020-07-09 13:23       ` Hans de Goede
2020-07-09 14:21       ` Andy Shevchenko
2020-07-09 14:21         ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:21         ` Andy Shevchenko
2020-07-09 14:33         ` Hans de Goede
2020-07-09 14:33           ` [Intel-gfx] " Hans de Goede
2020-07-09 14:33           ` Hans de Goede
2020-07-09 14:51           ` Andy Shevchenko
2020-07-09 14:51             ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:51             ` Andy Shevchenko
2020-07-08 21:14 ` [PATCH v4 05/16] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 13:36   ` Andy Shevchenko
2020-07-09 13:36     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 13:36     ` Andy Shevchenko
2020-07-09 13:48     ` Hans de Goede
2020-07-09 13:48       ` [Intel-gfx] " Hans de Goede
2020-07-09 13:48       ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0 Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-09 14:50   ` Andy Shevchenko
2020-07-09 14:50     ` [Intel-gfx] " Andy Shevchenko
2020-07-09 14:50     ` Andy Shevchenko
2020-07-09 15:47     ` Hans de Goede
2020-07-09 15:47       ` [Intel-gfx] " Hans de Goede
2020-07-09 15:47       ` Hans de Goede
2020-07-11  6:11       ` Uwe Kleine-König
2020-07-11  6:11         ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:11         ` Uwe Kleine-König
2020-07-11 13:58         ` Hans de Goede [this message]
2020-07-11 13:58           ` [Intel-gfx] " Hans de Goede
2020-07-11 13:58           ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 07/16] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 08/16] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 09/16] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 10/16] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 11/16] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 12/16] pwm: crc: Implement get_state() method Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 13/16] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 14/16] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 15/16] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-08 21:14 ` [PATCH v4 16/16] drm/i915: panel: Use atomic PWM API " Hans de Goede
2020-07-08 21:14   ` [Intel-gfx] " Hans de Goede
2020-07-08 21:14   ` Hans de Goede
2020-07-11  6:32   ` Uwe Kleine-König
2020-07-11  6:32     ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:32     ` Uwe Kleine-König
2020-07-11 13:51     ` Hans de Goede
2020-07-11 13:51       ` [Intel-gfx] " Hans de Goede
2020-07-11 13:51       ` Hans de Goede
2020-07-08 22:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API (rev2) Patchwork
2020-07-08 22:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-09  3:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-07-09  7:09   ` Hans de Goede
2020-07-09 14:14 ` [PATCH v4 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Sam Ravnborg
2020-07-09 14:14   ` [Intel-gfx] " Sam Ravnborg
2020-07-09 14:14   ` Sam Ravnborg
2020-07-09 14:40   ` Hans de Goede
2020-07-09 14:40     ` [Intel-gfx] " Hans de Goede
2020-07-09 14:40     ` Hans de Goede
2020-07-09 15:23     ` Sam Ravnborg
2020-07-09 15:23       ` [Intel-gfx] " Sam Ravnborg
2020-07-09 15:23       ` Sam Ravnborg
2020-07-11  6:19     ` Uwe Kleine-König
2020-07-11  6:19       ` [Intel-gfx] " Uwe Kleine-König
2020-07-11  6:19       ` Uwe Kleine-König
2020-07-11 13:46       ` Hans de Goede
2020-07-11 13:46         ` [Intel-gfx] " Hans de Goede
2020-07-11 13:46         ` Hans de Goede

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