From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Dan Williams <dan.j.williams@intel.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
<linux-mips@vger.kernel.org>, <devicetree@vger.kernel.org>,
<dmaengine@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v4 09/11] dmaengine: dw: Initialize min_burst capability
Date: Fri, 29 May 2020 01:23:59 +0300 [thread overview]
Message-ID: <20200528222401.26941-10-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200528222401.26941-1-Sergey.Semin@baikalelectronics.ru>
According to the DW APB DMAC data book the minimum burst transaction
length is 1 and it's true for any version of the controller since
isn't parametrised in the coreAssembler so can't be changed at the
IP-core synthesis stage. Let's initialise the min_burst member of the
DMA controller descriptor so the DMA clients could use it to properly
optimize the DMA requests.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
---
Changelog v4:
- This is a new patch suggested by Andy.
---
drivers/dma/dw/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index ceded21537e2..a8cebb1dbb68 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1229,6 +1229,7 @@ int do_dma_probe(struct dw_dma_chip *chip)
dw->dma.device_issue_pending = dwc_issue_pending;
/* DMA capabilities */
+ dw->dma.min_burst = 1;
dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
--
2.26.2
next prev parent reply other threads:[~2020-05-28 22:27 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-28 22:23 [PATCH v4 00/11] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Serge Semin
2020-05-28 22:23 ` [PATCH v4 01/11] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-28 22:23 ` [PATCH v4 02/11] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-28 22:23 ` [PATCH v4 03/11] dmaengine: Introduce min burst length capability Serge Semin
2020-05-29 12:07 ` Andy Shevchenko
2020-05-28 22:23 ` [PATCH v4 04/11] dmaengine: Introduce max SG list entries capability Serge Semin
2020-05-28 22:23 ` [PATCH v4 05/11] dmaengine: Introduce DMA-device device_caps callback Serge Semin
2020-05-29 12:12 ` Andy Shevchenko
2020-05-29 14:07 ` Serge Semin
2020-05-28 22:23 ` [PATCH v4 06/11] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-28 22:23 ` [PATCH v4 07/11] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-29 12:18 ` Andy Shevchenko
2020-05-28 22:23 ` [PATCH v4 08/11] dmaengine: dw: Add dummy device_caps callback Serge Semin
2020-05-29 12:19 ` Andy Shevchenko
2020-05-28 22:23 ` Serge Semin [this message]
2020-05-29 10:25 ` [PATCH v4 09/11] dmaengine: dw: Initialize min_burst capability Andy Shevchenko
2020-05-29 10:29 ` Andy Shevchenko
2020-05-29 10:41 ` Serge Semin
2020-05-29 10:50 ` Andy Shevchenko
2020-05-29 10:51 ` Serge Semin
2020-05-28 22:24 ` [PATCH v4 10/11] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-29 10:27 ` Andy Shevchenko
2020-05-28 22:24 ` [PATCH v4 11/11] dmaengine: dw: Initialize max_sg_nents capability Serge Semin
2020-05-29 10:27 ` Andy Shevchenko
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