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From: Lance Richardson <lance.richardson@broadcom.com>
To: dev@dpdk.org
Cc: ajit.khaparde@broadcom.com, ferruh.yigit@intel.com,
	maxime.coquelin@redhat.com,
	Lance Richardson <lance.richardson@broadcom.com>
Subject: [dpdk-dev] [PATCH v3 8/8] net/bnxt: update HWRM API to version 1.10.0.74
Date: Tue, 28 May 2019 15:23:39 -0400
Message-ID: <20190528192339.10903-9-lance.richardson@broadcom.com> (raw)
In-Reply-To: <20190528192339.10903-1-lance.richardson@broadcom.com>

From: Ajit Khaparde <ajit.khaparde@broadcom.com>

Update HWRM API to version 1.10.0.74

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
---
v3:
* Fixed headline in commit log.

 doc/guides/rel_notes/release_19_08.rst |    1 +
 drivers/net/bnxt/hsi_struct_def_dpdk.h | 1399 ++++++++++++++++++++----
 2 files changed, 1169 insertions(+), 231 deletions(-)

diff --git a/doc/guides/rel_notes/release_19_08.rst b/doc/guides/rel_notes/release_19_08.rst
index 7e5ca3c34..ea8fbcdfd 100644
--- a/doc/guides/rel_notes/release_19_08.rst
+++ b/doc/guides/rel_notes/release_19_08.rst
@@ -59,6 +59,7 @@ New Features
   Updated the bnxt PMD. The major enhancements include:
   * Performance optimizations in non-vector Tx path
   * Added support for SSE vector mode
+  * Updated HWRM API to version 1.10.0.74
 
 Removed Items
 -------------
diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h
index 00a8ff87e..305ee09bc 100644
--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h
+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright (c) 2014-2019 Broadcom Limited
+ * Copyright (c) 2014-2019 Broadcom Inc.
  * All rights reserved.
  *
  * DO NOT MODIFY!!! This file is automatically generated.
@@ -27,7 +27,8 @@ struct hwrm_cmd_hdr {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -221,8 +222,14 @@ struct hwrm_short_input {
 	#define HWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD UINT32_C(0x4321)
 	#define HWRM_SHORT_INPUT_SIGNATURE_LAST \
 		HWRM_SHORT_INPUT_SIGNATURE_SHORT_CMD
-	/* Reserved for future use. */
-	uint16_t	unused_0;
+	/* The target ID of the command */
+	uint16_t	target_id;
+	/* Default target_id (0x0) to maintain compatibility with old driver */
+	#define HWRM_SHORT_INPUT_TARGET_ID_DEFAULT UINT32_C(0x0)
+	/* Reserved for user-space HWRM interface */
+	#define HWRM_SHORT_INPUT_TARGET_ID_TOOLS   UINT32_C(0xfffd)
+	#define HWRM_SHORT_INPUT_TARGET_ID_LAST \
+		HWRM_SHORT_INPUT_TARGET_ID_TOOLS
 	/* This value indicates the length of the request. */
 	uint16_t	size;
 	/*
@@ -394,6 +401,8 @@ struct cmd_nums {
 	#define HWRM_FWD_RESP                             UINT32_C(0xd2)
 	#define HWRM_FWD_ASYNC_EVENT_CMPL                 UINT32_C(0xd3)
 	#define HWRM_OEM_CMD                              UINT32_C(0xd4)
+	/* Tells the fw to run PRBS test on a given port and lane. */
+	#define HWRM_PORT_PRBS_TEST                       UINT32_C(0xd5)
 	#define HWRM_TEMP_MONITOR_QUERY                   UINT32_C(0xe0)
 	#define HWRM_WOL_FILTER_ALLOC                     UINT32_C(0xf0)
 	#define HWRM_WOL_FILTER_FREE                      UINT32_C(0xf1)
@@ -486,6 +495,8 @@ struct cmd_nums {
 	#define HWRM_CFA_EEM_OP                           UINT32_C(0x123)
 	/* Experimental */
 	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS              UINT32_C(0x124)
+	/* Experimental */
+	#define HWRM_CFA_TFLIB                            UINT32_C(0x125)
 	/* Engine CKV - Ping the device and SRT firmware to get the public key. */
 	#define HWRM_ENGINE_CKV_HELLO                     UINT32_C(0x12d)
 	/* Engine CKV - Get the current allocation status of keys provisioned in the key vault. */
@@ -506,6 +517,8 @@ struct cmd_nums {
 	#define HWRM_ENGINE_CKV_KEY_GEN                   UINT32_C(0x135)
 	/* Engine CKV - Configure a label index with a label value. */
 	#define HWRM_ENGINE_CKV_KEY_LABEL_CFG             UINT32_C(0x136)
+	/* Engine CKV - Query a label */
+	#define HWRM_ENGINE_CKV_KEY_LABEL_QCFG            UINT32_C(0x137)
 	/* Engine - Query the available queue groups configuration. */
 	#define HWRM_ENGINE_QG_CONFIG_QUERY               UINT32_C(0x13c)
 	/* Engine - Query the queue groups assigned to a function. */
@@ -587,6 +600,19 @@ struct cmd_nums {
 	/* Experimental */
 	#define HWRM_PCIE_QSTATS                          UINT32_C(0x204)
 	/* Experimental */
+	#define HWRM_MFG_FRU_WRITE_CONTROL                UINT32_C(0x205)
+	/* Returns the current value of a free running counter from the device. */
+	#define HWRM_MFG_TIMERS_QUERY                     UINT32_C(0x206)
+	/* Experimental */
+	#define HWRM_MFG_OTP_CFG                          UINT32_C(0x207)
+	/* Experimental */
+	#define HWRM_MFG_OTP_QCFG                         UINT32_C(0x208)
+	/*
+	 * Tells the fw to run the DMA read from the host and DMA write
+	 * to the host test.
+	 */
+	#define HWRM_MFG_HDMA_TEST                        UINT32_C(0x209)
+	/* Experimental */
 	#define HWRM_DBG_READ_DIRECT                      UINT32_C(0xff10)
 	/* Experimental */
 	#define HWRM_DBG_READ_INDIRECT                    UINT32_C(0xff11)
@@ -643,67 +669,85 @@ struct cmd_nums {
 struct ret_codes {
 	uint16_t	error_code;
 	/* Request was successfully executed by the HWRM. */
-	#define HWRM_ERR_CODE_SUCCESS                   UINT32_C(0x0)
+	#define HWRM_ERR_CODE_SUCCESS                      UINT32_C(0x0)
 	/* The HWRM failed to execute the request. */
-	#define HWRM_ERR_CODE_FAIL                      UINT32_C(0x1)
+	#define HWRM_ERR_CODE_FAIL                         UINT32_C(0x1)
 	/*
 	 * The request contains invalid argument(s) or input
 	 * parameters.
 	 */
-	#define HWRM_ERR_CODE_INVALID_PARAMS            UINT32_C(0x2)
+	#define HWRM_ERR_CODE_INVALID_PARAMS               UINT32_C(0x2)
 	/*
 	 * The requester is not allowed to access the requested
 	 * resource. This error code shall be provided in a
 	 * response to a request to query or modify an existing
 	 * resource that is not accessible by the requester.
 	 */
-	#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED    UINT32_C(0x3)
+	#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED       UINT32_C(0x3)
 	/*
 	 * The HWRM is unable to allocate the requested resource.
 	 * This code only applies to requests for HWRM resource
 	 * allocations.
 	 */
-	#define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR      UINT32_C(0x4)
+	#define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR         UINT32_C(0x4)
 	/*
 	 * Invalid combination of flags is specified in the
 	 * request.
 	 */
-	#define HWRM_ERR_CODE_INVALID_FLAGS             UINT32_C(0x5)
+	#define HWRM_ERR_CODE_INVALID_FLAGS                UINT32_C(0x5)
 	/*
 	 * Invalid combination of enables fields is specified in
 	 * the request.
 	 */
-	#define HWRM_ERR_CODE_INVALID_ENABLES           UINT32_C(0x6)
+	#define HWRM_ERR_CODE_INVALID_ENABLES              UINT32_C(0x6)
 	/*
 	 * Request contains a required TLV that is not supported by
 	 * the installed version of firmware.
 	 */
-	#define HWRM_ERR_CODE_UNSUPPORTED_TLV           UINT32_C(0x7)
+	#define HWRM_ERR_CODE_UNSUPPORTED_TLV              UINT32_C(0x7)
 	/*
 	 * No firmware buffer available to accept the request. Driver
 	 * should retry the request.
 	 */
-	#define HWRM_ERR_CODE_NO_BUFFER                 UINT32_C(0x8)
+	#define HWRM_ERR_CODE_NO_BUFFER                    UINT32_C(0x8)
 	/*
 	 * This error code is only reported by firmware when some
 	 * sub-option of a supported HWRM command is unsupported.
 	 */
-	#define HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR    UINT32_C(0x9)
+	#define HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR       UINT32_C(0x9)
 	/*
 	 * This error code is only reported by firmware when the specific
 	 * request is not able to process when the HOT reset in progress.
 	 */
-	#define HWRM_ERR_CODE_HOT_RESET_PROGRESS        UINT32_C(0xa)
+	#define HWRM_ERR_CODE_HOT_RESET_PROGRESS           UINT32_C(0xa)
 	/*
 	 * This error code is only reported by firmware when the registered
 	 * driver instances are not capable of hot reset.
 	 */
-	#define HWRM_ERR_CODE_HOT_RESET_FAIL            UINT32_C(0xb)
+	#define HWRM_ERR_CODE_HOT_RESET_FAIL               UINT32_C(0xb)
+	/*
+	 * This error code is only reported by the firmware when during
+	 * flow allocation when a requeest for a flow counter fails because
+	 * the number of flow counters are exhausted.
+	 */
+	#define HWRM_ERR_CODE_NO_FLOW_COUNTER_DURING_ALLOC UINT32_C(0xc)
+	/*
+	 * This error code is only reported by firmware when the registered
+	 * driver instances requested to offloaded a flow but was unable to because
+	 * the requested key's hash collides with the installed keys.
+	 */
+	#define HWRM_ERR_CODE_KEY_HASH_COLLISION           UINT32_C(0xd)
+	/*
+	 * This error code is only reported by firmware when the registered
+	 * driver instances requested to offloaded a flow but was unable to because
+	 * the same key has already been installed.
+	 */
+	#define HWRM_ERR_CODE_KEY_ALREADY_EXISTS           UINT32_C(0xe)
 	/*
 	 * Generic HWRM execution error that represents an
 	 * internal error.
 	 */
-	#define HWRM_ERR_CODE_HWRM_ERROR                UINT32_C(0xf)
+	#define HWRM_ERR_CODE_HWRM_ERROR                   UINT32_C(0xf)
 	/*
 	 * This value indicates that the HWRM response is in TLV format and
 	 * should be interpreted as one or more TLVs starting with the
@@ -711,11 +755,11 @@ struct ret_codes {
 	 * by itself, just an indicatation that the response should be parsed
 	 * as TLV and the actual error code will be in the hwrm_resp_hdr TLV.
 	 */
-	#define HWRM_ERR_CODE_TLV_ENCAPSULATED_RESPONSE UINT32_C(0x8000)
+	#define HWRM_ERR_CODE_TLV_ENCAPSULATED_RESPONSE    UINT32_C(0x8000)
 	/* Unknown error */
-	#define HWRM_ERR_CODE_UNKNOWN_ERR               UINT32_C(0xfffe)
+	#define HWRM_ERR_CODE_UNKNOWN_ERR                  UINT32_C(0xfffe)
 	/* Unsupported or invalid command */
-	#define HWRM_ERR_CODE_CMD_NOT_SUPPORTED         UINT32_C(0xffff)
+	#define HWRM_ERR_CODE_CMD_NOT_SUPPORTED            UINT32_C(0xffff)
 	#define HWRM_ERR_CODE_LAST \
 		HWRM_ERR_CODE_CMD_NOT_SUPPORTED
 	uint16_t	unused_0[3];
@@ -774,12 +818,25 @@ struct hwrm_err_output {
 #define HW_HASH_KEY_SIZE 40
 /* valid key for HWRM response */
 #define HWRM_RESP_VALID_KEY 1
+/* Reserved for BONO processor */
+#define HWRM_TARGET_ID_BONO 0xFFF8
+/* Reserved for KONG processor */
+#define HWRM_TARGET_ID_KONG 0xFFF9
+/* Reserved for APE processor */
+#define HWRM_TARGET_ID_APE 0xFFFA
+/*
+ * This value will be used by tools for User-space HWRM Interface.
+ * When tool execute any HWRM command with this target_id, firmware
+ * will copy the response and/or data payload via register space instead
+ * of DMAing it.
+ */
+#define HWRM_TARGET_ID_TOOLS 0xFFFD
 #define HWRM_VERSION_MAJOR 1
 #define HWRM_VERSION_MINOR 10
 #define HWRM_VERSION_UPDATE 0
 /* non-zero means beta version */
-#define HWRM_VERSION_RSVD 48
-#define HWRM_VERSION_STR "1.10.0.48"
+#define HWRM_VERSION_RSVD 74
+#define HWRM_VERSION_STR "1.10.0.74"
 
 /****************
  * hwrm_ver_get *
@@ -804,7 +861,8 @@ struct hwrm_ver_get_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -1062,6 +1120,13 @@ struct hwrm_ver_get_output {
 	 */
 	#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED \
 		UINT32_C(0x1000)
+	/*
+	 * If set to 1, the firmware is able to support TFLIB features.
+	 * If set to 0, then the firmware doesn’t support TFLIB features.
+	 * By default, this flag should be 0 for older version of core firmware.
+	 */
+	#define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_TFLIB_SUPPORTED \
+		UINT32_C(0x2000)
 	/*
 	 * This field represents the major version of RoCE firmware.
 	 * A change in major version represents a major release.
@@ -1099,12 +1164,8 @@ struct hwrm_ver_get_output {
 	 * firmware (ASCII chars with NULL at the end).
 	 */
 	char	netctrl_fw_name[16];
-	/*
-	 * This field is reserved for future use.
-	 * The responder should set it to 0.
-	 * The requester should ignore this field.
-	 */
-	uint8_t	reserved2[16];
+	/* This field represents the active board package name. */
+	char	active_pkg_name[16];
 	/*
 	 * This field represents the name of RoCE FW (ASCII chars
 	 * with NULL at the end).
@@ -3845,6 +3906,12 @@ struct hwrm_async_event_cmpl {
 	 */
 	#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_EEM_CFG_CHANGE \
 		UINT32_C(0x3c)
+	/* TFLIB unique default VNIC Configuration Change */
+	#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_DEFAULT_VNIC_CHANGE \
+		UINT32_C(0x3d)
+	/* TFLIB unique link status changed */
+	#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_LINK_STATUS_CHANGE \
+		UINT32_C(0x3e)
 	/*
 	 * A trace log message. This contains firmware trace logs string
 	 * embedded in the asynchronous message. This is an experimental
@@ -5859,7 +5926,8 @@ struct hwrm_func_reset_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -5962,7 +6030,8 @@ struct hwrm_func_getfid_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -6038,7 +6107,8 @@ struct hwrm_func_vf_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -6110,7 +6180,8 @@ struct hwrm_func_vf_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -6183,7 +6254,8 @@ struct hwrm_func_vf_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -6446,7 +6518,8 @@ struct hwrm_func_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -6663,6 +6736,13 @@ struct hwrm_func_qcaps_output {
 	 */
 	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ERROR_RECOVERY_CAPABLE \
 		UINT32_C(0x800000)
+	/*
+	 * If the query is for a VF, then this flag shall be ignored.
+	 * If this query is for a PF and this flag is set to 1, then
+	 * the PF has the capability to support extended stats.
+	 */
+	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT_STATS_SUPPORTED \
+		UINT32_C(0x1000000)
 	/*
 	 * This value is current MAC address configured for this
 	 * function. A value of 00-00-00-00-00-00 indicates no
@@ -6807,7 +6887,8 @@ struct hwrm_func_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -7247,7 +7328,8 @@ struct hwrm_func_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -7889,7 +7971,8 @@ struct hwrm_func_qstats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8014,7 +8097,8 @@ struct hwrm_func_clr_stats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8078,7 +8162,8 @@ struct hwrm_func_vf_resc_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8141,7 +8226,8 @@ struct hwrm_func_drv_rgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8382,7 +8468,8 @@ struct hwrm_func_drv_unrgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8447,7 +8534,8 @@ struct hwrm_func_buf_rgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8581,7 +8669,8 @@ struct hwrm_func_buf_unrgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8650,7 +8739,8 @@ struct hwrm_func_drv_qver_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8757,7 +8847,8 @@ struct hwrm_func_resource_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8886,7 +8977,8 @@ struct hwrm_func_backing_store_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -8973,7 +9065,10 @@ struct hwrm_func_backing_store_qcaps_output {
 	 * the backing store.
 	 */
 	uint32_t	tqm_max_entries_per_ring;
-	/* Maximum number of MR/AV context entries supported for this function. */
+	/*
+	 * Maximum number of MR plus AV context entries supported for this
+	 * function.
+	 */
 	uint32_t	mrav_max_entries;
 	/* Number of bytes that must be allocated for each context entry. */
 	uint16_t	mrav_entry_size;
@@ -8981,7 +9076,22 @@ struct hwrm_func_backing_store_qcaps_output {
 	uint16_t	tim_entry_size;
 	/* Maximum number of Timer context entries supported for this function. */
 	uint32_t	tim_max_entries;
-	uint8_t	unused_0[2];
+	/*
+	 * When this field is zero, the 32b `mrav_num_entries` field in the
+	 * `backing_store_cfg` and `backing_store_qcfg` commands represents
+	 * the total number of MR plus AV entries allowed in the MR/AV backing
+	 * store PBL.
+	 *
+	 * When this field is non-zero, the 32b `mrav_num_entries` field in
+	 * the `backing_store_cfg` and `backing_store_qcfg` commands is
+	 * logically divided into two 16b fields. Bits `[31:16]` represents
+	 * the `mr_num_entries` and bits `[15:0]` represents `av_num_entries`.
+	 * Both of these values are represented in a unit granularity
+	 * specified by this field. For example, if this field is 16 and
+	 * `mrav_num_entries` is `0x02000100`, then the number of MR entries
+	 * is 8192 and the number of AV entries is 4096.
+	 */
+	uint16_t	mrav_num_entries_units;
 	/*
 	 * The number of entries specified for any TQM ring must be a
 	 * multiple of this value to prevent any resource allocation
@@ -9021,7 +9131,8 @@ struct hwrm_func_backing_store_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -9041,6 +9152,12 @@ struct hwrm_func_backing_store_cfg_input {
 	 */
 	#define HWRM_FUNC_BACKING_STORE_CFG_INPUT_FLAGS_PREBOOT_MODE \
 		UINT32_C(0x1)
+	/*
+	 * When set, the 32b `mrav_num_entries` field is logically divided
+	 * into two 16b fields, `mr_num_entries` and `av_num_entries`.
+	 */
+	#define HWRM_FUNC_BACKING_STORE_CFG_INPUT_FLAGS_MRAV_RESERVATION_SPLIT \
+		UINT32_C(0x2)
 	uint32_t	enables;
 	/*
 	 * This bit must be '1' for the qp fields to be
@@ -9958,7 +10075,20 @@ struct hwrm_func_backing_store_cfg_input {
 	 * the backing store.
 	 */
 	uint32_t	tqm_ring7_num_entries;
-	/* Number of MR/AV entries. */
+	/*
+	 * If the MR/AV split reservation flag is not set, then this field
+	 * represents the total number of MR plus AV entries. For versions
+	 * of firmware that support the split reservation, when it is not
+	 * specified half of the entries will be reserved for MRs and the
+	 * other half for AVs.
+	 *
+	 * If the MR/AV split reservation flag is set, then this
+	 * field is logically divided into two 16b fields. Bits `[31:16]`
+	 * represents the `mr_num_entries` and bits `[15:0]` represents
+	 * `av_num_entries`. The granularity of these values is defined by
+	 * the `mrav_num_entries_unit` field returned by the
+	 * `backing_store_qcaps` command.
+	 */
 	uint32_t	mrav_num_entries;
 	/* Number of Timer entries. */
 	uint32_t	tim_num_entries;
@@ -10036,7 +10166,8 @@ struct hwrm_func_backing_store_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -10068,6 +10199,12 @@ struct hwrm_func_backing_store_qcfg_output {
 	 */
 	#define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_FLAGS_PREBOOT_MODE \
 		UINT32_C(0x1)
+	/*
+	 * When set, the 32b `mrav_num_entries` field is logically divided
+	 * into two 16b fields, `mr_num_entries` and `av_num_entries`.
+	 */
+	#define HWRM_FUNC_BACKING_STORE_QCFG_OUTPUT_FLAGS_MRAV_RESERVATION_SPLIT \
+		UINT32_C(0x2)
 	uint8_t	unused_0[4];
 	/*
 	 * This bit must be '1' for the qp fields to be
@@ -10891,7 +11028,20 @@ struct hwrm_func_backing_store_qcfg_output {
 	uint32_t	tqm_ring6_num_entries;
 	/* Number of TQM ring 7 entries. */
 	uint32_t	tqm_ring7_num_entries;
-	/* Number of MR/AV entries. */
+	/*
+	 * If the MR/AV split reservation flag is not set, then this field
+	 * represents the total number of MR plus AV entries. For versions
+	 * of firmware that support the split reservation, when it is not
+	 * specified half of the entries will be reserved for MRs and the
+	 * other half for AVs.
+	 *
+	 * If the MR/AV split reservation flag is set, then this
+	 * field is logically divided into two 16b fields. Bits `[31:16]`
+	 * represents the `mr_num_entries` and bits `[15:0]` represents
+	 * `av_num_entries`. The granularity of these values is defined by
+	 * the `mrav_num_entries_unit` field returned by the
+	 * `backing_store_qcaps` command.
+	 */
 	uint32_t	mrav_num_entries;
 	/* Number of Timer entries. */
 	uint32_t	tim_num_entries;
@@ -10930,7 +11080,8 @@ struct hwrm_error_recovery_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11296,7 +11447,8 @@ struct hwrm_func_vlan_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11386,7 +11538,8 @@ struct hwrm_func_vlan_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11507,7 +11660,8 @@ struct hwrm_func_vf_vnic_ids_query_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11580,7 +11734,8 @@ struct hwrm_func_vf_bw_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11704,7 +11859,8 @@ struct hwrm_func_vf_bw_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11841,7 +11997,8 @@ struct hwrm_func_drv_if_change_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -11929,7 +12086,8 @@ struct hwrm_port_phy_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -12520,7 +12678,8 @@ struct hwrm_port_phy_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -13389,7 +13548,7 @@ struct hwrm_port_phy_qcfg_output {
  *********************/
 
 
-/* hwrm_port_mac_cfg_input (size:320b/40B) */
+/* hwrm_port_mac_cfg_input (size:384b/48B) */
 struct hwrm_port_mac_cfg_input {
 	/* The HWRM command request type. */
 	uint16_t	req_type;
@@ -13407,7 +13566,8 @@ struct hwrm_port_mac_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -13527,6 +13687,13 @@ struct hwrm_port_mac_cfg_input {
 	 */
 	#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_IP_DSCP2COS_DISABLE \
 		UINT32_C(0x1000)
+	/*
+	 * When this bit is set to '1', and the ptp_tx_ts_capture_enable
+	 * bit is set, then the device uses one step Tx timestamping.
+	 * This bit is temporary and used for experimental purposes.
+	 */
+	#define HWRM_PORT_MAC_CFG_INPUT_FLAGS_PTP_ONE_STEP_TX_TS \
+		UINT32_C(0x2000)
 	uint32_t	enables;
 	/*
 	 * This bit must be '1' for the ipg field to be
@@ -13576,6 +13743,12 @@ struct hwrm_port_mac_cfg_input {
 	 */
 	#define HWRM_PORT_MAC_CFG_INPUT_ENABLES_COS_FIELD_CFG \
 		UINT32_C(0x100)
+	/*
+	 * This bit must be '1' for the ptp_freq_adj_ppb field to be
+	 * configured.
+	 */
+	#define HWRM_PORT_MAC_CFG_INPUT_ENABLES_PTP_FREQ_ADJ_PPB \
+		UINT32_C(0x200)
 	/* Port ID of port that is to be configured. */
 	uint16_t	port_id;
 	/*
@@ -13763,6 +13936,12 @@ struct hwrm_port_mac_cfg_input {
 	#define HWRM_PORT_MAC_CFG_INPUT_COS_FIELD_CFG_DEFAULT_COS_SFT \
 		5
 	uint8_t	unused_0[3];
+	/*
+	 * This signed field specifies by how much to adjust the frequency
+	 * of sync timer updates (measured in parts per billion).
+	 */
+	int32_t	ptp_freq_adj_ppb;
+	uint8_t	unused_1[4];
 } __attribute__((packed));
 
 /* hwrm_port_mac_cfg_output (size:128b/16B) */
@@ -13842,7 +14021,8 @@ struct hwrm_port_mac_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -14131,7 +14311,8 @@ struct hwrm_port_mac_ptp_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -14174,6 +14355,12 @@ struct hwrm_port_mac_ptp_qcfg_output {
 	 */
 	#define HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_HWRM_ACCESS \
 		UINT32_C(0x2)
+	/*
+	 * When this bit is set to '1', the device supports one-step
+	 * Tx timestamping.
+	 */
+	#define HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_ONE_STEP_TX_TS \
+		UINT32_C(0x4)
 	uint8_t	unused_0[3];
 	/* Offset of the PTP register for the lower 32 bits of timestamp for RX. */
 	uint32_t	rx_ts_reg_off_lower;
@@ -14595,7 +14782,8 @@ struct hwrm_port_qstats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -14716,7 +14904,7 @@ struct tx_port_stats_ext {
 } __attribute__((packed));
 
 /* Port Rx Statistics extended Formats */
-/* rx_port_stats_ext (size:2368b/296B) */
+/* rx_port_stats_ext (size:3648b/456B) */
 struct rx_port_stats_ext {
 	/* Number of times link state changed to down */
 	uint64_t	link_down_events;
@@ -14792,6 +14980,49 @@ struct rx_port_stats_ext {
 	uint64_t	pfc_pri7_rx_duration_us;
 	/* Number of times, a XON -> XOFF and XOFF -> XON transitions occur for priority 7 */
 	uint64_t	pfc_pri7_rx_transitions;
+	/* Total number of received bits */
+	uint64_t	rx_bits;
+	/* The number of events where the port receive buffer was over 85% full */
+	uint64_t	rx_buffer_passed_threshold;
+	/*
+	 * The number of symbol errors that wasn't corrected by FEC correction
+	 * alogirithm
+	 */
+	uint64_t	rx_pcs_symbol_err;
+	/* The number of corrected bits on the port according to active FEC */
+	uint64_t	rx_corrected_bits;
+	/* Total number of rx discard bytes count on cos queue 0 */
+	uint64_t	rx_discard_bytes_cos0;
+	/* Total number of rx discard bytes count on cos queue 1 */
+	uint64_t	rx_discard_bytes_cos1;
+	/* Total number of rx discard bytes count on cos queue 2 */
+	uint64_t	rx_discard_bytes_cos2;
+	/* Total number of rx discard bytes count on cos queue 3 */
+	uint64_t	rx_discard_bytes_cos3;
+	/* Total number of rx discard bytes count on cos queue 4 */
+	uint64_t	rx_discard_bytes_cos4;
+	/* Total number of rx discard bytes count on cos queue 5 */
+	uint64_t	rx_discard_bytes_cos5;
+	/* Total number of rx discard bytes count on cos queue 6 */
+	uint64_t	rx_discard_bytes_cos6;
+	/* Total number of rx discard bytes count on cos queue 7 */
+	uint64_t	rx_discard_bytes_cos7;
+	/* Total number of rx discard packets count on cos queue 0 */
+	uint64_t	rx_discard_packets_cos0;
+	/* Total number of rx discard packets count on cos queue 1 */
+	uint64_t	rx_discard_packets_cos1;
+	/* Total number of rx discard packets count on cos queue 2 */
+	uint64_t	rx_discard_packets_cos2;
+	/* Total number of rx discard packets count on cos queue 3 */
+	uint64_t	rx_discard_packets_cos3;
+	/* Total number of rx discard packets count on cos queue 4 */
+	uint64_t	rx_discard_packets_cos4;
+	/* Total number of rx discard packets count on cos queue 5 */
+	uint64_t	rx_discard_packets_cos5;
+	/* Total number of rx discard packets count on cos queue 6 */
+	uint64_t	rx_discard_packets_cos6;
+	/* Total number of rx discard packets count on cos queue 7 */
+	uint64_t	rx_discard_packets_cos7;
 } __attribute__((packed));
 
 /************************
@@ -14817,7 +15048,8 @@ struct hwrm_port_qstats_ext_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -14909,7 +15141,8 @@ struct hwrm_port_lpbk_qstats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -14986,7 +15219,8 @@ struct hwrm_port_clr_stats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -15057,7 +15291,8 @@ struct hwrm_port_phy_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -15311,7 +15546,8 @@ struct hwrm_port_phy_mdio_write_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -15387,7 +15623,8 @@ struct hwrm_port_phy_mdio_read_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -15463,7 +15700,8 @@ struct hwrm_port_led_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -15886,7 +16124,8 @@ struct hwrm_port_led_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -16191,7 +16430,8 @@ struct hwrm_port_led_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -16519,6 +16759,137 @@ struct hwrm_port_led_qcaps_output {
 	uint8_t	valid;
 } __attribute__((packed));
 
+/***********************
+ * hwrm_port_prbs_test *
+ ***********************/
+
+
+/* hwrm_port_prbs_test_input (size:384b/48B) */
+struct hwrm_port_prbs_test_input {
+	/* The HWRM command request type. */
+	uint16_t	req_type;
+	/*
+	 * The completion ring to send the completion event on. This should
+	 * be the NQ ID returned from the `nq_alloc` HWRM command.
+	 */
+	uint16_t	cmpl_ring;
+	/*
+	 * The sequence ID is used by the driver for tracking multiple
+	 * commands. This ID is treated as opaque data by the firmware and
+	 * the value is returned in the `hwrm_resp_hdr` upon completion.
+	 */
+	uint16_t	seq_id;
+	/*
+	 * The target ID of the command:
+	 * * 0x0-0xFFF8 - The function ID
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
+	 * * 0xFFFF - HWRM
+	 */
+	uint16_t	target_id;
+	/*
+	 * A physical address pointer pointing to a host buffer that the
+	 * command's response data will be written. This can be either a host
+	 * physical address (HPA) or a guest physical address (GPA) and must
+	 * point to a physically contiguous block of memory.
+	 */
+	uint64_t	resp_addr;
+	/* Host address data is to DMA'd to. */
+	uint64_t	resp_data_addr;
+	/*
+	 * Size of the buffer pointed to by resp_data_addr. The firmware may
+	 * use this entire buffer or less than the entire buffer, but never more.
+	 */
+	uint16_t	data_len;
+	uint16_t	unused_0;
+	uint32_t	unused_1;
+	/* Port ID of port where PRBS test to be run. */
+	uint16_t	port_id;
+	/* Polynomial selection for PRBS test. */
+	uint16_t	poly;
+	/* PRBS7 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS7   UINT32_C(0x0)
+	/* PRBS9 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS9   UINT32_C(0x1)
+	/* PRBS11 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS11  UINT32_C(0x2)
+	/* PRBS15 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS15  UINT32_C(0x3)
+	/* PRBS23 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS23  UINT32_C(0x4)
+	/* PRBS31 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS31  UINT32_C(0x5)
+	/* PRBS58 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_PRBS58  UINT32_C(0x6)
+	/* Invalid */
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_INVALID UINT32_C(0xff)
+	#define HWRM_PORT_PRBS_TEST_INPUT_POLY_LAST \
+		HWRM_PORT_PRBS_TEST_INPUT_POLY_INVALID
+	/*
+	 * Configuration bits for PRBS test.
+	 * Use enable bit to start/stop test.
+	 * Use tx/rx lane map bits to run test on specific lanes,
+	 * if set to 0 test will be run on all lanes.
+	 */
+	uint16_t	prbs_config;
+	/*
+	 * Set 0 to stop test currently in progress
+	 * Set 1 to start test with configuration provided.
+	 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_START_STOP \
+		UINT32_C(0x1)
+	/*
+	 * If set to 1, tx_lane_map bitmap should have lane bits set.
+	 * If set to 0, test will be run on all lanes for this port.
+	 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_TX_LANE_MAP_VALID \
+		UINT32_C(0x2)
+	/*
+	 * If set to 1, rx_lane_map bitmap should have lane bits set.
+	 * If set to 0, test will be run on all lanes for this port.
+	 */
+	#define HWRM_PORT_PRBS_TEST_INPUT_PRBS_CONFIG_RX_LANE_MAP_VALID \
+		UINT32_C(0x4)
+	/* Duration in seconds to run the PRBS test. */
+	uint16_t	timeout;
+	/*
+	 * If tx_lane_map_valid is set to 1, this field is a bitmap
+	 * of tx lanes to run PRBS test. bit0 = lane0,
+	 * bit1 = lane1 ..bit31 = lane31
+	 */
+	uint32_t	tx_lane_map;
+	/*
+	 * If rx_lane_map_valid is set to 1, this field is a bitmap
+	 * of rx lanes to run PRBS test. bit0 = lane0,
+	 * bit1 = lane1 ..bit31 = lane31
+	 */
+	uint32_t	rx_lane_map;
+} __attribute__((packed));
+
+/* hwrm_port_prbs_test_output (size:128b/16B) */
+struct hwrm_port_prbs_test_output {
+	/* The specific error status for the command. */
+	uint16_t	error_code;
+	/* The HWRM command request type. */
+	uint16_t	req_type;
+	/* The sequence ID from the original command. */
+	uint16_t	seq_id;
+	/* The length of the response data in number of bytes. */
+	uint16_t	resp_len;
+	/* Total length of stored data. */
+	uint16_t	total_data_len;
+	uint16_t	unused_0;
+	uint8_t	unused_1[3];
+	/*
+	 * This field is used in Output records to indicate that the output
+	 * is completely written to RAM.  This field should be read as '1'
+	 * to indicate that the output has been completely written.
+	 * When writing a command completion or response to an internal processor,
+	 * the order of writes has to be such that this field is written last.
+	 */
+	uint8_t	valid;
+} __attribute__((packed));
+
 /***********************
  * hwrm_queue_qportcfg *
  ***********************/
@@ -16542,7 +16913,8 @@ struct hwrm_queue_qportcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -16994,7 +17366,8 @@ struct hwrm_queue_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17091,7 +17464,8 @@ struct hwrm_queue_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17194,7 +17568,8 @@ struct hwrm_queue_pfcenable_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17283,7 +17658,8 @@ struct hwrm_queue_pfcenable_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17372,7 +17748,8 @@ struct hwrm_queue_pri2cos_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17522,7 +17899,8 @@ struct hwrm_queue_pri2cos_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -17698,7 +18076,8 @@ struct hwrm_queue_cos2bw_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -18740,7 +19119,8 @@ struct hwrm_queue_cos2bw_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -19831,7 +20211,8 @@ struct hwrm_vnic_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -19897,7 +20278,8 @@ struct hwrm_vnic_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -19957,7 +20339,8 @@ struct hwrm_vnic_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20172,7 +20555,8 @@ struct hwrm_vnic_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20327,7 +20711,8 @@ struct hwrm_vnic_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20419,7 +20804,13 @@ struct hwrm_vnic_qcaps_output {
 	 */
 	#define HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP \
 		UINT32_C(0x80)
-	uint8_t	unused_1[7];
+	/*
+	 * This field advertises the maximum concurrent TPA aggregations
+	 * supported by the VNIC on new devices that support TPA v2.
+	 * '0' means that TPA v2 is not supported.
+	 */
+	uint16_t	max_aggs_supported;
+	uint8_t	unused_1[5];
 	/*
 	 * This field is used in Output records to indicate that the output
 	 * is completely written to RAM.  This field should be read as '1'
@@ -20453,7 +20844,8 @@ struct hwrm_vnic_tpa_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20529,6 +20921,15 @@ struct hwrm_vnic_tpa_cfg_input {
 	 */
 	#define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK \
 		UINT32_C(0x80)
+	/*
+	 * When this bit is '1' and the GRO mode is enabled,
+	 * the VNIC shall DMA payload data using GRO rules.
+	 * When this bit is '0', the VNIC shall DMA payload data
+	 * using the more efficient LRO rules of filling all
+	 * aggregation buffers.
+	 */
+	#define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_PACK_AS_GRO \
+		UINT32_C(0x100)
 	uint32_t	enables;
 	/*
 	 * This bit must be '1' for the max_agg_segs field to be
@@ -20545,16 +20946,15 @@ struct hwrm_vnic_tpa_cfg_input {
 	 * configured.
 	 */
 	#define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER     UINT32_C(0x4)
-	/*
-	 * This bit must be '1' for the min_agg_len field to be
-	 * configured.
-	 */
+	/* deprecated bit.  Do not use!!! */
 	#define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN       UINT32_C(0x8)
 	/* Logical vnic ID */
 	uint16_t	vnic_id;
 	/*
 	 * This is the maximum number of TCP segments that can
-	 * be aggregated (unit is Log2). Max value is 31.
+	 * be aggregated (unit is Log2). Max value is 31. On new
+	 * devices supporting TPA v2, the unit is multiples of 4 and
+	 * valid values are > 0 and <= 63.
 	 */
 	uint16_t	max_agg_segs;
 	/* 1 segment */
@@ -20571,7 +20971,10 @@ struct hwrm_vnic_tpa_cfg_input {
 		HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX
 	/*
 	 * This is the maximum number of aggregations this VNIC is
-	 * allowed (unit is Log2). Max value is 7
+	 * allowed (unit is Log2). Max value is 7. On new devices
+	 * supporting TPA v2, this is in unit of 1 and must be > 0
+	 * and <= max_aggs_supported in the hwrm_vnic_qcaps response
+	 * to enable TPA v2.
 	 */
 	uint16_t	max_aggs;
 	/* 1 aggregation */
@@ -20596,7 +20999,9 @@ struct hwrm_vnic_tpa_cfg_input {
 	uint32_t	max_agg_timer;
 	/*
 	 * This is the minimum amount of payload length required to
-	 * start an aggregation context.
+	 * start an aggregation context. This field is deprecated and
+	 * should be set to 0.  The minimum length is set by firmware
+	 * and can be queried using hwrm_vnic_tpa_qcfg.
 	 */
 	uint32_t	min_agg_len;
 } __attribute__((packed));
@@ -20645,7 +21050,8 @@ struct hwrm_vnic_rss_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20795,7 +21201,8 @@ struct hwrm_vnic_rss_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -20937,7 +21344,8 @@ struct hwrm_vnic_plcmodes_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21100,7 +21508,8 @@ struct hwrm_vnic_plcmodes_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21228,7 +21637,8 @@ struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21287,7 +21697,8 @@ struct hwrm_vnic_rss_cos_lb_ctx_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21347,7 +21758,8 @@ struct hwrm_ring_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21687,7 +22099,8 @@ struct hwrm_ring_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21764,7 +22177,8 @@ struct hwrm_ring_reset_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21839,7 +22253,8 @@ struct hwrm_ring_aggint_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -21988,7 +22403,8 @@ struct hwrm_ring_cmpl_ring_qaggint_params_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22094,7 +22510,8 @@ struct hwrm_ring_cmpl_ring_cfg_aggint_params_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22250,7 +22667,8 @@ struct hwrm_ring_grp_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22334,7 +22752,8 @@ struct hwrm_ring_grp_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22414,7 +22833,8 @@ struct hwrm_cfa_l2_filter_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22476,6 +22896,22 @@ struct hwrm_cfa_l2_filter_alloc_input {
 		(UINT32_C(0x2) << 4)
 	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_LAST \
 		HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_TRAFFIC_ROCE
+	/*
+	 * Setting of this flag indicates that no XDP filter is created with
+	 * L2 filter.
+	 * 0 - legacy behavior, XDP filter is created with L2 filter
+	 * 1 - XDP filter won't be created with L2 filter
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_XDP_DISABLE \
+		UINT32_C(0x40)
+	/*
+	 * Setting this flag to 1 indicate the L2 fields in this command
+	 * pertain to source fields.  Setting this flag to 0 indicate the
+	 * L2 fields in this command pertain to the destination fields
+	 * and this is the default/legacy behavior.
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_SOURCE_VALID \
+		UINT32_C(0x80)
 	uint32_t	enables;
 	/*
 	 * This bit must be '1' for the l2_addr field to be
@@ -22579,13 +23015,31 @@ struct hwrm_cfa_l2_filter_alloc_input {
 	 */
 	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
 		UINT32_C(0x10000)
+	/*
+	 * This bit must be '1' for the num_vlans field to be
+	 * configured.
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS \
+		UINT32_C(0x20000)
+	/*
+	 * This bit must be '1' for the t_num_vlans field to be
+	 * configured.
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS \
+		UINT32_C(0x40000)
 	/*
 	 * This value sets the match value for the L2 MAC address.
 	 * Destination MAC address for RX path.
 	 * Source MAC address for TX path.
 	 */
 	uint8_t	l2_addr[6];
-	uint8_t	unused_0[2];
+	/* This value sets the match value for the number of VLANs. */
+	uint8_t	num_vlans;
+	/*
+	 * This value sets the match value for the number of VLANs
+	 * in the tunnel headers.
+	 */
+	uint8_t	t_num_vlans;
 	/*
 	 * This value sets the mask value for the L2 address.
 	 * A value of 0 will mask the corresponding bit from
@@ -22784,13 +23238,45 @@ struct hwrm_cfa_l2_filter_alloc_output {
 	 */
 	uint64_t	l2_filter_id;
 	/*
-	 * This is the ID of the flow associated with this
-	 * filter.
-	 * This value shall be used to match and associate the
-	 * flow identifier returned in completion records.
-	 * A value of 0xFFFFFFFF shall indicate no flow id.
+	 * The flow id value in bit 0-29 is the actual ID of the flow
+	 * associated with this filter and it shall be used to match
+	 * and associate the flow identifier returned in completion
+	 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
+	 * shall indicate no valid flow id.
 	 */
 	uint32_t	flow_id;
+	/* Indicate the flow id value. */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \
+		UINT32_C(0x3fffffff)
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0
+	/* Indicate type of the flow. */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \
+		UINT32_C(0x40000000)
+	/*
+	 * If this bit set to 0, then it indicates that the flow is
+	 * internal flow.
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \
+		(UINT32_C(0x0) << 30)
+	/*
+	 * If this bit is set to 1, then it indicates that the flow is
+	 * external flow.
+	 */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \
+		(UINT32_C(0x1) << 30)
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \
+		HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT
+	/* Indicate the flow direction. */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \
+		UINT32_C(0x80000000)
+	/* If this bit set to 0, then it indicates rx flow. */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \
+		(UINT32_C(0x0) << 31)
+	/* If this bit is set to 1, then it indicates that tx flow. */
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \
+		(UINT32_C(0x1) << 31)
+	#define HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \
+		HWRM_CFA_L2_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX
 	uint8_t	unused_0[3];
 	/*
 	 * This field is used in Output records to indicate that the output
@@ -22825,7 +23311,8 @@ struct hwrm_cfa_l2_filter_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -22887,7 +23374,8 @@ struct hwrm_cfa_l2_filter_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23014,7 +23502,8 @@ struct hwrm_cfa_l2_set_rx_mask_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23213,7 +23702,8 @@ struct hwrm_cfa_vlan_antispoof_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23287,7 +23777,8 @@ struct hwrm_cfa_vlan_antispoof_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23366,7 +23857,8 @@ struct hwrm_cfa_tunnel_filter_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23602,13 +24094,45 @@ struct hwrm_cfa_tunnel_filter_alloc_output {
 	/* This value is an opaque id into CFA data structures. */
 	uint64_t	tunnel_filter_id;
 	/*
-	 * This is the ID of the flow associated with this
-	 * filter.
-	 * This value shall be used to match and associate the
-	 * flow identifier returned in completion records.
-	 * A value of 0xFFFFFFFF shall indicate no flow id.
+	 * The flow id value in bit 0-29 is the actual ID of the flow
+	 * associated with this filter and it shall be used to match
+	 * and associate the flow identifier returned in completion
+	 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
+	 * shall indicate no valid flow id.
 	 */
 	uint32_t	flow_id;
+	/* Indicate the flow id value. */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \
+		UINT32_C(0x3fffffff)
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0
+	/* Indicate type of the flow. */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \
+		UINT32_C(0x40000000)
+	/*
+	 * If this bit set to 0, then it indicates that the flow is
+	 * internal flow.
+	 */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \
+		(UINT32_C(0x0) << 30)
+	/*
+	 * If this bit is set to 1, then it indicates that the flow is
+	 * external flow.
+	 */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \
+		(UINT32_C(0x1) << 30)
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \
+		HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT
+	/* Indicate the flow direction. */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \
+		UINT32_C(0x80000000)
+	/* If this bit set to 0, then it indicates rx flow. */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \
+		(UINT32_C(0x0) << 31)
+	/* If this bit is set to 1, then it indicates that tx flow. */
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \
+		(UINT32_C(0x1) << 31)
+	#define HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \
+		HWRM_CFA_TUNNEL_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX
 	uint8_t	unused_0[3];
 	/*
 	 * This field is used in Output records to indicate that the output
@@ -23643,7 +24167,8 @@ struct hwrm_cfa_tunnel_filter_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23702,7 +24227,8 @@ struct hwrm_cfa_redirect_tunnel_type_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23813,7 +24339,8 @@ struct hwrm_cfa_redirect_tunnel_type_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -23919,7 +24446,8 @@ struct hwrm_cfa_redirect_tunnel_type_info_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24134,7 +24662,8 @@ struct hwrm_cfa_encap_record_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24247,7 +24776,8 @@ struct hwrm_cfa_encap_record_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24289,7 +24819,7 @@ struct hwrm_cfa_encap_record_free_output {
  ********************************/
 
 
-/* hwrm_cfa_ntuple_filter_alloc_input (size:1024b/128B) */
+/* hwrm_cfa_ntuple_filter_alloc_input (size:1088b/136B) */
 struct hwrm_cfa_ntuple_filter_alloc_input {
 	/* The HWRM command request type. */
 	uint16_t	req_type;
@@ -24307,7 +24837,8 @@ struct hwrm_cfa_ntuple_filter_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24456,6 +24987,12 @@ struct hwrm_cfa_ntuple_filter_alloc_input {
 	 */
 	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \
 		UINT32_C(0x40000)
+	/*
+	 * This bit must be '1' for the rfs_ring_tbl_idx field to be
+	 * configured.
+	 */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_RFS_RING_TBL_IDX \
+		UINT32_C(0x80000)
 	/*
 	 * This value identifies a set of CFA data structures used for an L2
 	 * context.
@@ -24639,6 +25176,13 @@ struct hwrm_cfa_ntuple_filter_alloc_input {
 	 * the pri_hint.
 	 */
 	uint64_t	ntuple_filter_id_hint;
+	/*
+	 * The value of rfs_ring_tbl_idx to be used for RFS for this filter.
+	 * This index is used in lieu of the RSS hash when selecting the
+	 * index into the RSS table to determine the rx ring.
+	 */
+	uint16_t	rfs_ring_tbl_idx;
+	uint8_t	unused_0[6];
 } __attribute__((packed));
 
 /* hwrm_cfa_ntuple_filter_alloc_output (size:192b/24B) */
@@ -24654,13 +25198,45 @@ struct hwrm_cfa_ntuple_filter_alloc_output {
 	/* This value is an opaque id into CFA data structures. */
 	uint64_t	ntuple_filter_id;
 	/*
-	 * This is the ID of the flow associated with this
-	 * filter.
-	 * This value shall be used to match and associate the
-	 * flow identifier returned in completion records.
-	 * A value of 0xFFFFFFFF shall indicate no flow id.
+	 * The flow id value in bit 0-29 is the actual ID of the flow
+	 * associated with this filter and it shall be used to match
+	 * and associate the flow identifier returned in completion
+	 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
+	 * shall indicate no valid flow id.
 	 */
 	uint32_t	flow_id;
+	/* Indicate the flow id value. */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \
+		UINT32_C(0x3fffffff)
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0
+	/* Indicate type of the flow. */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE \
+		UINT32_C(0x40000000)
+	/*
+	 * If this bit set to 0, then it indicates that the flow is
+	 * internal flow.
+	 */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \
+		(UINT32_C(0x0) << 30)
+	/*
+	 * If this bit is set to 1, then it indicates that the flow is
+	 * external flow.
+	 */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \
+		(UINT32_C(0x1) << 30)
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \
+		HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT
+	/* Indicate the flow direction. */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR \
+		UINT32_C(0x80000000)
+	/* If this bit set to 0, then it indicates rx flow. */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_RX \
+		(UINT32_C(0x0) << 31)
+	/* If this bit is set to 1, then it indicates that tx flow. */
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX \
+		(UINT32_C(0x1) << 31)
+	#define HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \
+		HWRM_CFA_NTUPLE_FILTER_ALLOC_OUTPUT_FLOW_ID_DIR_TX
 	uint8_t	unused_0[3];
 	/*
 	 * This field is used in Output records to indicate that the output
@@ -24713,7 +25289,8 @@ struct hwrm_cfa_ntuple_filter_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24772,7 +25349,8 @@ struct hwrm_cfa_ntuple_filter_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -24884,7 +25462,8 @@ struct hwrm_cfa_em_flow_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -25216,13 +25795,45 @@ struct hwrm_cfa_em_flow_alloc_output {
 	/* This value is an opaque id into CFA data structures. */
 	uint64_t	em_filter_id;
 	/*
-	 * This is the ID of the flow associated with this
-	 * filter.
-	 * This value shall be used to match and associate the
-	 * flow identifier returned in completion records.
-	 * A value of 0xFFFFFFFF shall indicate no flow id.
+	 * The flow id value in bit 0-29 is the actual ID of the flow
+	 * associated with this filter and it shall be used to match
+	 * and associate the flow identifier returned in completion
+	 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
+	 * shall indicate no valid flow id.
 	 */
 	uint32_t	flow_id;
+	/* Indicate the flow id value. */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \
+		UINT32_C(0x3fffffff)
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0
+	/* Indicate type of the flow. */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE \
+		UINT32_C(0x40000000)
+	/*
+	 * If this bit set to 0, then it indicates that the flow is
+	 * internal flow.
+	 */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \
+		(UINT32_C(0x0) << 30)
+	/*
+	 * If this bit is set to 1, then it indicates that the flow is
+	 * external flow.
+	 */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \
+		(UINT32_C(0x1) << 30)
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \
+		HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT
+	/* Indicate the flow direction. */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR \
+		UINT32_C(0x80000000)
+	/* If this bit set to 0, then it indicates rx flow. */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_RX \
+		(UINT32_C(0x0) << 31)
+	/* If this bit is set to 1, then it indicates that tx flow. */
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX \
+		(UINT32_C(0x1) << 31)
+	#define HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \
+		HWRM_CFA_EM_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX
 	uint8_t	unused_0[3];
 	/*
 	 * This field is used in Output records to indicate that the output
@@ -25257,7 +25868,8 @@ struct hwrm_cfa_em_flow_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -25316,7 +25928,8 @@ struct hwrm_cfa_meter_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -25428,7 +26041,8 @@ struct hwrm_cfa_meter_profile_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -25705,7 +26319,8 @@ struct hwrm_cfa_meter_profile_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -25789,7 +26404,8 @@ struct hwrm_cfa_meter_profile_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26059,7 +26675,8 @@ struct hwrm_cfa_meter_instance_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26154,7 +26771,8 @@ struct hwrm_cfa_meter_instance_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26246,7 +26864,8 @@ struct hwrm_cfa_meter_instance_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26330,7 +26949,8 @@ struct hwrm_cfa_decap_filter_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26654,7 +27274,8 @@ struct hwrm_cfa_decap_filter_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26714,7 +27335,8 @@ struct hwrm_cfa_flow_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -26847,6 +27469,15 @@ struct hwrm_cfa_flow_alloc_input {
 	 */
 	#define HWRM_CFA_FLOW_ALLOC_INPUT_ACTION_FLAGS_PRI_HINT \
 		UINT32_C(0x1000)
+	/*
+	 * If set to 1 there will be no attempt to allocate an on-chip try to
+	 * offload this flow. If set to 0, which will keep compatibility with the
+	 * older drivers, will cause the FW to attempt to allocate an on-chip flow
+	 * counter for the newly created flow.  This will keep the existing behavior
+	 * with EM flows which always had an associated flow counter.
+	 */
+	#define HWRM_CFA_FLOW_ALLOC_INPUT_ACTION_FLAGS_NO_FLOW_COUNTER_ALLOC \
+		UINT32_C(0x2000)
 	/*
 	 * Tx Flow: pf or vf fid.
 	 * Rx Flow: vf fid.
@@ -26977,13 +27608,45 @@ struct hwrm_cfa_flow_alloc_output {
 	uint16_t	flow_handle;
 	uint8_t	unused_0[2];
 	/*
-	 * This is the ID of the flow associated with this
-	 * filter.
-	 * This value shall be used to match and associate the
-	 * flow identifier returned in completion records.
-	 * A value of 0xFFFFFFFF shall indicate no flow id.
+	 * The flow id value in bit 0-29 is the actual ID of the flow
+	 * associated with this filter and it shall be used to match
+	 * and associate the flow identifier returned in completion
+	 * records. A value of 0xFFFFFFFF in the 32-bit flow_id field
+	 * shall indicate no valid flow id.
 	 */
 	uint32_t	flow_id;
+	/* Indicate the flow id value. */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_MASK \
+		UINT32_C(0x3fffffff)
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_VALUE_SFT 0
+	/* Indicate type of the flow. */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE \
+		UINT32_C(0x40000000)
+	/*
+	 * If this bit set to 0, then it indicates that the flow is
+	 * internal flow.
+	 */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_INT \
+		(UINT32_C(0x0) << 30)
+	/*
+	 * If this bit is set to 1, then it indicates that the flow is
+	 * external flow.
+	 */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT \
+		(UINT32_C(0x1) << 30)
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_LAST \
+		HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_TYPE_EXT
+	/* Indicate the flow direction. */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR \
+		UINT32_C(0x80000000)
+	/* If this bit set to 0, then it indicates rx flow. */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_RX \
+		(UINT32_C(0x0) << 31)
+	/* If this bit is set to 1, then it indicates that tx flow. */
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX \
+		(UINT32_C(0x1) << 31)
+	#define HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_LAST \
+		HWRM_CFA_FLOW_ALLOC_OUTPUT_FLOW_ID_DIR_TX
 	/* This value identifies a set of CFA data structures used for a flow. */
 	uint64_t	ext_flow_handle;
 	uint32_t	flow_counter_id;
@@ -26998,6 +27661,34 @@ struct hwrm_cfa_flow_alloc_output {
 	uint8_t	valid;
 } __attribute__((packed));
 
+/* hwrm_cfa_flow_alloc_cmd_err (size:64b/8B) */
+struct hwrm_cfa_flow_alloc_cmd_err {
+	/*
+	 * command specific error codes that goes to
+	 * the cmd_err field in Common HWRM Error Response.
+	 */
+	uint8_t	code;
+	/* Unknown error */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_UNKNOWN         UINT32_C(0x0)
+	/* No more L2 Context TCAM */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_L2_CONTEXT_TCAM UINT32_C(0x1)
+	/* No more action records */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_ACTION_RECORD   UINT32_C(0x2)
+	/* No more flow counters */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_COUNTER    UINT32_C(0x3)
+	/* No more wild-card TCAM */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_WILD_CARD_TCAM  UINT32_C(0x4)
+	/* Hash collsion in exact match tables */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_HASH_COLLISION  UINT32_C(0x5)
+	/* Key is already installed */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_KEY_EXISTS      UINT32_C(0x6)
+	/* Flow Context DB is out of resource */
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB    UINT32_C(0x7)
+	#define HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_LAST \
+		HWRM_CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB
+	uint8_t	unused_0[7];
+} __attribute__((packed));
+
 /**********************
  * hwrm_cfa_flow_free *
  **********************/
@@ -27021,7 +27712,8 @@ struct hwrm_cfa_flow_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27034,7 +27726,9 @@ struct hwrm_cfa_flow_free_input {
 	uint64_t	resp_addr;
 	/* Flow record index. */
 	uint16_t	flow_handle;
-	uint8_t	unused_0[6];
+	uint16_t	unused_0;
+	/* Flow counter id to be freed. */
+	uint32_t	flow_counter_id;
 	/* This value identifies a set of CFA data structures used for a flow. */
 	uint64_t	ext_flow_handle;
 } __attribute__((packed));
@@ -27310,7 +28004,8 @@ struct hwrm_cfa_flow_info_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27420,7 +28115,8 @@ struct hwrm_cfa_flow_flush_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27448,6 +28144,9 @@ struct hwrm_cfa_flow_flush_input {
 	 */
 	#define HWRM_CFA_FLOW_FLUSH_INPUT_FLAGS_FLOW_RESET_ALL \
 		UINT32_C(0x2)
+	/* Set to 1 to indicate the flow counter IDs are included in the flow table. */
+	#define HWRM_CFA_FLOW_FLUSH_INPUT_FLAGS_FLOW_HANDLE_INCL_FC \
+		UINT32_C(0x8000000)
 	/*
 	 * This specifies the size of flow handle entries provided by the driver
 	 * in the flow table specified below. Only two flow handle size enums are defined.
@@ -27544,7 +28243,8 @@ struct hwrm_cfa_flow_stats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27684,7 +28384,8 @@ struct hwrm_cfa_flow_aging_timer_reset_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27733,7 +28434,7 @@ struct hwrm_cfa_flow_aging_timer_reset_output {
  ***************************/
 
 
-/* hwrm_cfa_flow_aging_cfg_input (size:256b/32B) */
+/* hwrm_cfa_flow_aging_cfg_input (size:384b/48B) */
 struct hwrm_cfa_flow_aging_cfg_input {
 	/* The HWRM command request type. */
 	uint16_t	req_type;
@@ -27751,7 +28452,8 @@ struct hwrm_cfa_flow_aging_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27773,16 +28475,40 @@ struct hwrm_cfa_flow_aging_cfg_input {
 	/* This bit must be '1' for the udp flow timer field to be configured */
 	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_UDP_FLOW_TIMER \
 		UINT32_C(0x4)
-	/* The direction for the flow aging configuration, 1 is rx path, 2 is tx path. */
+	/* This bit must be '1' for the eem dma interval field to be configured */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_DMA_INTERVAL \
+		UINT32_C(0x8)
+	/* This bit must be '1' for the eem notice interval field to be configured */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_NOTICE_INTERVAL \
+		UINT32_C(0x10)
+	/* This bit must be '1' for the eem context memory maximum entries field to be configured */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_MAX_ENTRIES \
+		UINT32_C(0x20)
+	/* This bit must be '1' for the eem context memory ID field to be configured */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_ID \
+		UINT32_C(0x40)
+	/* This bit must be '1' for the eem context memory type field to be configured */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_ENABLES_EEM_CTX_MEM_TYPE \
+		UINT32_C(0x80)
 	uint8_t	flags;
 	/* Enumeration denoting the RX, TX type of the resource. */
-	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH     UINT32_C(0x1)
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH       UINT32_C(0x1)
 	/* tx path */
-	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_TX    UINT32_C(0x0)
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_TX      UINT32_C(0x0)
 	/* rx path */
-	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX    UINT32_C(0x1)
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX      UINT32_C(0x1)
 	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_LAST \
 		HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_PATH_RX
+	/* Enumeration denoting the enable, disable eem flow aging configuration. */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM        UINT32_C(0x2)
+	/* tx path */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_DISABLE \
+		(UINT32_C(0x0) << 1)
+	/* rx path */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_ENABLE \
+		(UINT32_C(0x1) << 1)
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_LAST \
+		HWRM_CFA_FLOW_AGING_CFG_INPUT_FLAGS_EEM_ENABLE
 	uint8_t	unused_0;
 	/* The flow aging timer for all TCP flows, the unit is 100 milliseconds. */
 	uint32_t	tcp_flow_timer;
@@ -27790,6 +28516,21 @@ struct hwrm_cfa_flow_aging_cfg_input {
 	uint32_t	tcp_fin_timer;
 	/* The flow aging timer for all UDP flows, the unit is 100 milliseconds. */
 	uint32_t	udp_flow_timer;
+	/* The interval to dma eem ejection data to host memory, the unit is milliseconds. */
+	uint16_t	eem_dma_interval;
+	/* The interval to notify driver to read the eem ejection data, the unit is milliseconds. */
+	uint16_t	eem_notice_interval;
+	/* The maximum entries number in the eem context memory. */
+	uint32_t	eem_ctx_max_entries;
+	/* The context memory ID for eem flow aging. */
+	uint16_t	eem_ctx_id;
+	uint16_t	eem_ctx_mem_type;
+	/* The content of context memory is eem ejection data, the size of each entry is 4 bytes. */
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_EJECTION_DATA \
+		UINT32_C(0x0)
+	#define HWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_LAST \
+		HWRM_CFA_FLOW_AGING_CFG_INPUT_EEM_CTX_MEM_TYPE_EJECTION_DATA
+	uint8_t	unused_1[4];
 } __attribute__((packed));
 
 /* hwrm_cfa_flow_aging_cfg_output (size:128b/16B) */
@@ -27836,7 +28577,8 @@ struct hwrm_cfa_flow_aging_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27860,7 +28602,7 @@ struct hwrm_cfa_flow_aging_qcfg_input {
 	uint8_t	unused_0[7];
 } __attribute__((packed));
 
-/* hwrm_cfa_flow_aging_qcfg_output (size:192b/24B) */
+/* hwrm_cfa_flow_aging_qcfg_output (size:320b/40B) */
 struct hwrm_cfa_flow_aging_qcfg_output {
 	/* The specific error status for the command. */
 	uint16_t	error_code;
@@ -27876,7 +28618,17 @@ struct hwrm_cfa_flow_aging_qcfg_output {
 	uint32_t	tcp_fin_timer;
 	/* The current flow aging timer for all UDP flows, the unit is 100 millisecond. */
 	uint32_t	udp_flow_timer;
-	uint8_t	unused_0[3];
+	/* The interval to dma eem ejection data to host memory, the unit is milliseconds. */
+	uint16_t	eem_dma_interval;
+	/* The interval to notify driver to read the eem ejection data, the unit is milliseconds. */
+	uint16_t	eem_notice_interval;
+	/* The maximum entries number in the eem context memory. */
+	uint32_t	eem_ctx_max_entries;
+	/* The context memory ID for eem flow aging. */
+	uint16_t	eem_ctx_id;
+	/* The context memory type for eem flow aging. */
+	uint16_t	eem_ctx_mem_type;
+	uint8_t	unused_0[7];
 	/*
 	 * This field is used in Output records to indicate that the output
 	 * is completely written to RAM.  This field should be read as '1'
@@ -27910,7 +28662,8 @@ struct hwrm_cfa_flow_aging_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -27986,7 +28739,8 @@ struct hwrm_cfa_tcp_flag_process_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28051,7 +28805,8 @@ struct hwrm_cfa_pair_info_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28171,7 +28926,8 @@ struct hwrm_cfa_redirect_query_tunnel_type_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28275,7 +29031,8 @@ struct hwrm_cfa_ctx_mem_rgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28371,7 +29128,8 @@ struct hwrm_cfa_ctx_mem_unrgtr_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28434,7 +29192,8 @@ struct hwrm_cfa_ctx_mem_qctx_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28531,7 +29290,8 @@ struct hwrm_cfa_ctx_mem_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28582,7 +29342,8 @@ struct hwrm_cfa_eem_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28630,13 +29391,31 @@ struct hwrm_cfa_eem_qcaps_output {
 	 * which are to be offloaded.
 	 * Note if this bit is set then the path_rx bit can't be set.
 	 */
-	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_TX     UINT32_C(0x1)
+	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_TX \
+		UINT32_C(0x1)
 	/*
 	 * When set to 1, indicates the configuration will apply to RX flows
 	 * which are to be offloaded.
 	 * Note if this bit is set then the path_tx bit can't be set.
 	 */
-	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_RX     UINT32_C(0x2)
+	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_PATH_RX \
+		UINT32_C(0x2)
+	/*
+	 * When set to 1, indicates the the FW supports the Centralized
+	 * Memory Model.  The concept designates one entity for the
+	 * memory allocation while all others ‘subscribe’ to it.
+	 */
+	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_CENTRALIZED_MEMORY_MODEL_SUPPORTED \
+		UINT32_C(0x4)
+	/*
+	 * When set to 1, indicates the the FW supports the Detached
+	 * Centralized Memory Model.  The memory is allocated and managed
+	 * as a separate entity.  All PFs and VFs will be granted direct
+	 * or semi-direct access to the allocated memory while none of
+	 * which can interfere with the management of the memory.
+	 */
+	#define HWRM_CFA_EEM_QCAPS_OUTPUT_FLAGS_DETACHED_CENTRALIZED_MEMORY_MODEL_SUPPORTED \
+		UINT32_C(0x8)
 	uint32_t	unused_0;
 	uint32_t	supported;
 	/*
@@ -28712,7 +29491,8 @@ struct hwrm_cfa_eem_cfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28741,7 +29521,15 @@ struct hwrm_cfa_eem_cfg_input {
 	/* When set to 1, all offloaded flows will be sent to EEM. */
 	#define HWRM_CFA_EEM_CFG_INPUT_FLAGS_PREFERRED_OFFLOAD \
 		UINT32_C(0x4)
-	uint32_t	unused_0;
+	/* When set to 1, secondary, 0 means primary. */
+	#define HWRM_CFA_EEM_CFG_INPUT_FLAGS_SECONDARY_PF \
+		UINT32_C(0x8)
+	/*
+	 * Group_id which used by Firmware to identify memory pools belonging
+	 * to certain group.
+	 */
+	uint16_t	group_id;
+	uint16_t	unused_0;
 	/*
 	 * Configured EEM with the given number of entries.  All the EEM tables KEY0, KEY1,
 	 * RECORD, EFC all have the same number of entries and all tables will be configured
@@ -28803,7 +29591,8 @@ struct hwrm_cfa_eem_qcfg_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28878,7 +29667,8 @@ struct hwrm_cfa_eem_op_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -28974,7 +29764,8 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29045,6 +29836,42 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {
 	 */
 	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_RX_EEM_FLOW_SUPPORTED \
 		UINT32_C(0x40)
+	/*
+	 * Value of 1 to indicate that firmware supports the dynamic allocation of an
+	 * on-chip flow counter which can be used for EEM flows.
+	 * Value of 0 indicates firmware does not support the dynamic allocation of an
+	 * on-chip flow counter.
+	 */
+	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_FLOW_COUNTER_ALLOC_SUPPORTED \
+		UINT32_C(0x80)
+	/*
+	 * Value of 1 to indicate that firmware supports setting of
+	 * rfs_ring_tbl_idx in HWRM_CFA_NTUPLE_ALLOC command.
+	 * Value of 0 indicates firmware does not support rfs_ring_tbl_idx.
+	 */
+	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_RFS_RING_TBL_IDX_SUPPORTED \
+		UINT32_C(0x100)
+	/*
+	 * Value of 1 to indicate that firmware supports untagged matching
+	 * criteria on HWRM_CFA_L2_FILTER_ALLOC command. Value of 0
+	 * indicates firmware does not support untagged matching.
+	 */
+	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_UNTAGGED_VLAN_SUPPORTED \
+		UINT32_C(0x200)
+	/*
+	 * Value of 1 to indicate that firmware supports XDP filter. Value
+	 * of 0 indicates firmware does not support XDP filter.
+	 */
+	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_XDP_SUPPORTED \
+		UINT32_C(0x400)
+	/*
+	 * Value of 1 to indicate that the firmware support L2 header source
+	 * fields matching criteria on HWRM_CFA_L2_FILTER_ALLOC command.
+	 * Value of 0 indicates firmware does not support L2 header source
+	 * fields matching.
+	 */
+	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS_OUTPUT_FLAGS_L2_HEADER_SOURCE_FIELDS_SUPPORTED \
+		UINT32_C(0x800)
 	uint8_t	unused_0[3];
 	/*
 	 * This field is used in Output records to indicate that the output
@@ -29056,6 +29883,81 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {
 	uint8_t	valid;
 } __attribute__((packed));
 
+/******************
+ * hwrm_cfa_tflib *
+ ******************/
+
+
+/* hwrm_cfa_tflib_input (size:1024b/128B) */
+struct hwrm_cfa_tflib_input {
+	/* The HWRM command request type. */
+	uint16_t	req_type;
+	/*
+	 * The completion ring to send the completion event on. This should
+	 * be the NQ ID returned from the `nq_alloc` HWRM command.
+	 */
+	uint16_t	cmpl_ring;
+	/*
+	 * The sequence ID is used by the driver for tracking multiple
+	 * commands. This ID is treated as opaque data by the firmware and
+	 * the value is returned in the `hwrm_resp_hdr` upon completion.
+	 */
+	uint16_t	seq_id;
+	/*
+	 * The target ID of the command:
+	 * * 0x0-0xFFF8 - The function ID
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
+	 * * 0xFFFF - HWRM
+	 */
+	uint16_t	target_id;
+	/*
+	 * A physical address pointer pointing to a host buffer that the
+	 * command's response data will be written. This can be either a host
+	 * physical address (HPA) or a guest physical address (GPA) and must
+	 * point to a physically contiguous block of memory.
+	 */
+	uint64_t	resp_addr;
+	/* TFLIB message type. */
+	uint16_t	tf_type;
+	/* TFLIB message subtype. */
+	uint16_t	tf_subtype;
+	/* unused. */
+	uint8_t	unused0[4];
+	/* TFLIB request data. */
+	uint32_t	tf_req[26];
+} __attribute__((packed));
+
+/* hwrm_cfa_tflib_output (size:5632b/704B) */
+struct hwrm_cfa_tflib_output {
+	/* The specific error status for the command. */
+	uint16_t	error_code;
+	/* The HWRM command request type. */
+	uint16_t	req_type;
+	/* The sequence ID from the original command. */
+	uint16_t	seq_id;
+	/* The length of the response data in number of bytes. */
+	uint16_t	resp_len;
+	/* TFLIB message type. */
+	uint16_t	tf_type;
+	/* TFLIB message subtype. */
+	uint16_t	tf_subtype;
+	/* TFLIB response code */
+	uint32_t	tf_resp_code;
+	/* TFLIB response data. */
+	uint32_t	tf_resp[170];
+	/* unused. */
+	uint8_t	unused1[7];
+	/*
+	 * This field is used in Output records to indicate that the output
+	 * is completely written to RAM.  This field should be read as '1'
+	 * to indicate that the output has been completely written.
+	 * When writing a command completion or response to an internal processor,
+	 * the order of writes has to be such that this field is written last.
+	 */
+	uint8_t	valid;
+} __attribute__((packed));
+
 /******************************
  * hwrm_tunnel_dst_port_query *
  ******************************/
@@ -29079,7 +29981,8 @@ struct hwrm_tunnel_dst_port_query_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29177,7 +30080,8 @@ struct hwrm_tunnel_dst_port_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29274,7 +30178,8 @@ struct hwrm_tunnel_dst_port_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29451,7 +30356,8 @@ struct hwrm_stat_ctx_alloc_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29540,7 +30446,8 @@ struct hwrm_stat_ctx_free_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29602,7 +30509,8 @@ struct hwrm_stat_ctx_query_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29702,7 +30610,8 @@ struct hwrm_stat_ctx_eng_query_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29803,7 +30712,8 @@ struct hwrm_stat_ctx_clr_stats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29863,7 +30773,8 @@ struct hwrm_pcie_qstats_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -29970,7 +30881,8 @@ struct hwrm_exec_fwd_resp_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30043,7 +30955,8 @@ struct hwrm_reject_fwd_resp_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30116,7 +31029,8 @@ struct hwrm_fwd_resp_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30204,7 +31118,8 @@ struct hwrm_fwd_async_event_cmpl_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30273,7 +31188,8 @@ struct hwrm_nvm_raw_write_blk_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30342,7 +31258,8 @@ struct hwrm_nvm_read_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30412,7 +31329,8 @@ struct hwrm_nvm_raw_dump_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30478,7 +31396,8 @@ struct hwrm_nvm_get_dir_entries_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30540,7 +31459,8 @@ struct hwrm_nvm_get_dir_info_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30601,7 +31521,8 @@ struct hwrm_nvm_write_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30722,7 +31643,8 @@ struct hwrm_nvm_modify_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30795,7 +31717,8 @@ struct hwrm_nvm_find_dir_entry_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30897,7 +31820,8 @@ struct hwrm_nvm_erase_dir_entry_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30957,7 +31881,8 @@ struct hwrm_nvm_get_dev_info_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -30991,7 +31916,12 @@ struct hwrm_nvm_get_dev_info_output {
 	uint32_t	reserved_size;
 	/* Available size that can be used, in bytes.  Available size is the NVRAM size take away the used size and reserved size. */
 	uint32_t	available_size;
-	uint8_t	unused_0[3];
+	/* This field represents the major version of NVM cfg */
+	uint8_t	nvm_cfg_ver_maj;
+	/* This field represents the minor version of NVM cfg */
+	uint8_t	nvm_cfg_ver_min;
+	/* This field represents the update version of NVM cfg */
+	uint8_t	nvm_cfg_ver_upd;
 	/*
 	 * This field is used in Output records to indicate that the output
 	 * is completely written to RAM.  This field should be read as '1'
@@ -31025,7 +31955,8 @@ struct hwrm_nvm_mod_dir_entry_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31104,7 +32035,8 @@ struct hwrm_nvm_verify_update_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31177,7 +32109,8 @@ struct hwrm_nvm_install_update_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31340,7 +32273,8 @@ struct hwrm_nvm_flush_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31413,7 +32347,8 @@ struct hwrm_nvm_get_variable_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31548,7 +32483,8 @@ struct hwrm_nvm_set_variable_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
@@ -31678,7 +32614,8 @@ struct hwrm_nvm_validate_option_input {
 	/*
 	 * The target ID of the command:
 	 * * 0x0-0xFFF8 - The function ID
-	 * * 0xFFF8-0xFFFE - Reserved for internal processors
+	 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
+	 * * 0xFFFD - Reserved for user-space HWRM interface
 	 * * 0xFFFF - HWRM
 	 */
 	uint16_t	target_id;
-- 
2.17.1


  parent reply index

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-21 21:39 [dpdk-dev] [PATCH 00/11] bnxt patchset Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 01/11] net/bnxt: move tx bd checking to header file Ajit Khaparde
2019-05-23 11:44   ` Maxime Coquelin
2019-05-21 21:39 ` [dpdk-dev] [PATCH 02/11] net/bnxt: compute and store scattered RX status Ajit Khaparde
2019-05-23 11:47   ` Maxime Coquelin
2019-05-21 21:39 ` [dpdk-dev] [PATCH 03/11] net/bnxt: implement vector mode driver Ajit Khaparde
2019-05-23 12:18   ` Maxime Coquelin
2019-05-23 19:23     ` Lance Richardson
2019-05-21 21:39 ` [dpdk-dev] [PATCH 04/11] net/bnxt: fix double counting VLAN tags Ajit Khaparde
2019-05-23 12:21   ` Maxime Coquelin
2019-05-23 18:53     ` Lance Richardson
2019-05-21 21:39 ` [dpdk-dev] [PATCH 05/11] net/bnxt: fix RSS reta indirection table update Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 06/11] net/bnxt: use reta update mask and translate qid to grp id Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 07/11] net/bnxt: fix reta query op Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 08/11] net/bnxt: update HWRM API Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 09/11] net/bnxt: update HWRM version Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 10/11] net/bnxt: HWRM version update Ajit Khaparde
2019-05-21 21:39 ` [dpdk-dev] [PATCH 11/11] net/bnxt: update release notes for bnxt Ajit Khaparde
2019-05-24 14:49 ` [dpdk-dev] [PATCH v2 00/10] bnxt patchset Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 01/10] net/bnxt: move tx bd checking to header file Lance Richardson
2019-05-27  9:36     ` Ferruh Yigit
2019-05-27 15:24       ` Ferruh Yigit
2019-05-27 18:50         ` Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 02/10] net/bnxt: compute and store scattered RX status Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 03/10] net/bnxt: implement vector mode driver Lance Richardson
2019-05-28  9:05     ` Ferruh Yigit
2019-05-28  9:08     ` Ferruh Yigit
2019-05-28 11:23       ` Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 04/10] net/bnxt: fix RSS reta indirection table update Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 05/10] net/bnxt: use reta update mask and translate qid to grp id Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 06/10] net/bnxt: fix reta query op Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 07/10] net/bnxt: update HWRM API Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 08/10] net/bnxt: update HWRM version Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 09/10] net/bnxt: HWRM version update Lance Richardson
2019-05-28  9:12     ` Ferruh Yigit
2019-05-28 15:06       ` Lance Richardson
2019-05-24 14:49   ` [dpdk-dev] [PATCH v2 10/10] net/bnxt: update release notes for bnxt Lance Richardson
2019-05-28  9:15     ` Ferruh Yigit
2019-05-28  9:19   ` [dpdk-dev] [PATCH v2 00/10] bnxt patchset Ferruh Yigit
2019-05-28 15:11     ` Lance Richardson
2019-05-28 19:23 ` [dpdk-dev] [PATCH v3 0/8] " Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 1/8] net/bnxt: update release notes for bnxt Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 2/8] net/bnxt: move Tx bd checking to header file Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 3/8] net/bnxt: compute and store scattered Rx status Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 4/8] net/bnxt: implement vector mode driver Lance Richardson
2019-05-29  6:48     ` Maxime Coquelin
2019-05-29 13:19       ` Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 5/8] net/bnxt: fix RSS RETA indirection table ops Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 6/8] net/bnxt: update HWRM API to version 1.10.0.19 Lance Richardson
2019-05-28 19:23   ` [dpdk-dev] [PATCH v3 7/8] net/bnxt: update HWRM API to version 1.10.0.48 Lance Richardson
2019-05-28 19:23   ` Lance Richardson [this message]
2019-05-29 15:02 ` [dpdk-dev] [PATCH v4 0/8] bnxt patchset Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 1/8] net/bnxt: update release notes for bnxt Lance Richardson
2019-05-29 18:16     ` Kevin Traynor
2019-05-29 20:28       ` Lance Richardson
2019-05-29 20:35         ` Lance Richardson
2019-05-29 20:38           ` Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 2/8] net/bnxt: move Tx bd checking to header file Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 3/8] net/bnxt: compute and store scattered Rx status Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 4/8] net/bnxt: implement vector mode driver Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 5/8] net/bnxt: fix RSS RETA indirection table ops Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 6/8] net/bnxt: update HWRM API to version 1.10.0.19 Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 7/8] net/bnxt: update HWRM API to version 1.10.0.48 Lance Richardson
2019-05-29 15:02   ` [dpdk-dev] [PATCH v4 8/8] net/bnxt: update HWRM API to version 1.10.0.74 Lance Richardson
2019-05-29 21:02 ` [dpdk-dev] [PATCH v5 0/8] bnxt patchset Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 1/8] net/bnxt: update release notes for bnxt Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 2/8] net/bnxt: move Tx bd checking to header file Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 3/8] net/bnxt: compute and store scattered Rx status Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 4/8] net/bnxt: implement vector mode driver Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 5/8] net/bnxt: fix RSS RETA indirection table ops Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 6/8] net/bnxt: update HWRM API to version 1.10.0.19 Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 7/8] net/bnxt: update HWRM API to version 1.10.0.48 Lance Richardson
2019-05-29 21:02   ` [dpdk-dev] [PATCH v5 8/8] net/bnxt: update HWRM API to version 1.10.0.74 Lance Richardson
2019-06-04 16:07   ` [dpdk-dev] [PATCH v5 0/8] bnxt patchset Ferruh Yigit
2019-06-14 15:34     ` Ferruh Yigit

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