From: Stephen Boyd <sboyd@kernel.org>
To: CK Hu <ck.hu@mediatek.com>, Michael Turquette <mturquette@baylibre.com>
Cc: wangyan wang <wangyan.wang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
chunhui dai <chunhui.dai@mediatek.com>,
Colin Ian King <colin.king@canonical.com>,
Sean Wang <sean.wang@mediatek.com>,
Ryder Lee <ryder.lee@mediatek.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
dri-devel@lists.freedesktop.org, srv_heupstream@mediatek.com
Subject: Re: [PATCH V6 6/8] clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
Date: Mon, 25 Feb 2019 09:19:44 -0800 [thread overview]
Message-ID: <155111518481.77512.14619508720748400478@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20190225020912.29120-7-wangyan.wang@mediatek.com>
Quoting wangyan wang (2019-02-24 18:09:10)
> From: chunhui dai <chunhui.dai@mediatek.com>
>
> The MUX clock of dpi1_sel should select the closet clock for itself.
> We could add this flag to enable this function of MUX in CCF.
>
> Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
> Signed-off-by: wangyan wang <wangyan.wang@mediatek.com>
> ---
Applied to clk-next
next prev parent reply other threads:[~2019-02-25 17:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-25 2:09 [PATCH V6 0/8] make mt7623 clock of hdmi stable wangyan wang
2019-02-25 2:09 ` [PATCH v6 1/8] drm/mediatek: recalculate hdmi phy clock of MT2701 by querying hardware wangyan wang
2019-03-06 10:07 ` CK Hu
2019-03-21 3:23 ` CK Hu
2019-03-22 6:02 ` CK Hu
2019-02-25 2:09 ` [PATCH V6 2/8] drm/mediatek: move the setting of fixed divider wangyan wang
2019-02-25 2:09 ` [PATCH V6 3/8] drm/mediatek: using different flags of clk for HDMI phy wangyan wang
2019-02-25 2:09 ` [PATCH V6 4/8] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 wangyan wang
2019-02-25 2:09 ` [PATCH V6 5/8] clk: mediatek: add MUX_GATE_FLAGS_2 wangyan wang
2019-02-25 17:19 ` Stephen Boyd
2019-02-25 2:09 ` [PATCH V6 6/8] clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel wangyan wang
2019-02-25 17:19 ` Stephen Boyd [this message]
2019-02-25 2:09 ` [PATCH V6 7/8] drm/mediatek: using new factor for tvdpll in MT2701 wangyan wang
2019-02-25 2:09 ` [PATCH V6 8/8] drm/mediatek: fix the rate of parent for hdmi phy " wangyan wang
2019-03-06 10:13 ` CK Hu
2019-03-21 5:32 ` CK Hu
2019-03-21 7:20 ` CK Hu
2019-03-06 1:52 ` [PATCH V6 0/8] make mt7623 clock of hdmi stable CK Hu
2019-03-06 9:48 ` CK Hu
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