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From: CK Hu <ck.hu@mediatek.com>
To: Hsin-Yi Wang <hsinyi@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v10 3/9] drm/mediatek: add RDMA fifo size error handle
Date: Wed, 27 Jan 2021 15:59:26 +0800	[thread overview]
Message-ID: <1611734366.29432.1.camel@mtksdaap41> (raw)
In-Reply-To: <20210127045422.2418917-4-hsinyi@chromium.org>

Hi, Hsin-Yi:

On Wed, 2021-01-27 at 12:54 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> This patch add RDMA fifo size error handle
> rdma fifo size will not always bigger than the calculated threshold
> if that case happened, we need set fifo size as the threshold
> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index b84004394970f..04b9542010b00 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -168,6 +168,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
>  	 * account for blanking, and with a pixel depth of 4 bytes:
>  	 */
>  	threshold = width * height * vrefresh * 4 * 7 / 1000000;
> +
> +	if (threshold > rdma_fifo_size)
> +		threshold = rdma_fifo_size;

Please see the discussion in [1].

[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/1607591262-21736-6-git-send-email-yongqiang.niu@mediatek.com/

Regards,
CK

> +
>  	reg = RDMA_FIFO_UNDERFLOW_EN |
>  	      RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
>  	      RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);

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  reply	other threads:[~2021-01-27  8:15 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27  4:54 [PATCH v10 0/9] drm/mediatek: add support for mediatek SOC MT8183 Hsin-Yi Wang
2021-01-27  4:54 ` [PATCH v10 1/9] arm64: dts: mt8183: rename rdma fifo size Hsin-Yi Wang
2021-01-27  4:54 ` [PATCH v10 2/9] arm64: dts: mt8183: refine gamma compatible name Hsin-Yi Wang
2021-01-27  4:54 ` [PATCH v10 3/9] drm/mediatek: add RDMA fifo size error handle Hsin-Yi Wang
2021-01-27  7:59   ` CK Hu [this message]
2021-01-27  4:54 ` [PATCH v10 4/9] drm/mediatek: generalize mtk_dither_set() function Hsin-Yi Wang
2021-01-28  4:39   ` CK Hu
2021-01-28  5:09     ` Hsin-Yi Wang
2021-01-28  5:21       ` CK Hu
2021-01-27  4:54 ` [PATCH v10 5/9] drm/mediatek: separate gamma module Hsin-Yi Wang
2021-01-28  5:33   ` CK Hu
2021-01-27  4:54 ` [PATCH v10 6/9] drm/mediatek: add has_dither private data for gamma Hsin-Yi Wang
2021-01-28  5:34   ` CK Hu
2021-01-27  4:54 ` [PATCH v10 7/9] drm/mediatek: enable dither function Hsin-Yi Wang
2021-01-28  6:01   ` CK Hu
2021-01-27  4:54 ` [PATCH v10 8/9] drm/mediatek: add DDP support for MT8183 Hsin-Yi Wang
2021-01-28  6:13   ` CK Hu
2021-01-28  6:15     ` Hsin-Yi Wang
2021-01-28  7:00       ` CK Hu
2021-01-28  6:19     ` CK Hu
2021-01-27  4:54 ` [PATCH v10 9/9] drm/mediatek: add support for mediatek SOC MT8183 Hsin-Yi Wang
2021-01-28  6:17   ` CK Hu

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