From: Andrzej Hajda <a.hajda@samsung.com>
To: Inki Dae <inki.dae@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
dri-devel@lists.freedesktop.org,
Marek Szyprowski <m.szyprowski@samsung.com>
Subject: [PATCH v2 RESEND 05/24] drm/exynos/decon5433: embed exynos_drm_crtc directly into context
Date: Wed, 20 Mar 2019 14:06:48 +0100 [thread overview]
Message-ID: <20190320130707.25161-6-a.hajda@samsung.com> (raw)
In-Reply-To: <20190320130707.25161-1-a.hajda@samsung.com>
Since crtc maps 1:1 to the device there is no point in allocating it
separately, another benefit is possibility of direct initialisation
of its fields which is more readable and allows further expansion.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 52 +++++++++----------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index ae0f475eb633..0d409f453923 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -54,7 +54,7 @@ static const char * const decon_clks_name[] = {
struct decon_context {
struct device *dev;
struct drm_device *drm_dev;
- struct exynos_drm_crtc *crtc;
+ struct exynos_drm_crtc crtc;
struct exynos_drm_plane planes[WINDOWS_NR];
void __iomem *addr;
struct regmap *sysreg;
@@ -69,6 +69,8 @@ struct decon_context {
u32 frame_id;
};
+#define to_decon(ptr) container_of(ptr, struct decon_context, ptr)
+
static const uint32_t decon_formats[] = {
DRM_FORMAT_XRGB1555,
DRM_FORMAT_RGB565,
@@ -90,7 +92,7 @@ static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
u32 val;
val = VIDINTCON0_INTEN;
@@ -110,7 +112,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
if (!(ctx->out_type & I80_HW_TRG))
disable_irq_nosync(ctx->te_irq);
@@ -143,7 +145,7 @@ static u32 decon_get_frame_count(struct decon_context *ctx, bool end)
switch (status & (VIDCON1_VSTATUS_MASK | VIDCON1_I80_ACTIVE)) {
case VIDCON1_VSTATUS_VS:
- if (!(ctx->crtc->i80_mode))
+ if (!(ctx->crtc.i80_mode))
--frm;
break;
case VIDCON1_VSTATUS_BP:
@@ -163,7 +165,7 @@ static u32 decon_get_frame_count(struct decon_context *ctx, bool end)
static void decon_setup_trigger(struct decon_context *ctx)
{
- if (!ctx->crtc->i80_mode && !(ctx->out_type & I80_HW_TRG))
+ if (!ctx->crtc.i80_mode && !(ctx->out_type & I80_HW_TRG))
return;
if (!(ctx->out_type & I80_HW_TRG)) {
@@ -183,7 +185,7 @@ static void decon_setup_trigger(struct decon_context *ctx)
static void decon_commit(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
struct drm_display_mode *m = &crtc->base.mode;
bool interlaced = false;
u32 val;
@@ -377,7 +379,7 @@ static void decon_shadow_protect(struct decon_context *ctx, bool protect)
static void decon_atomic_begin(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
decon_shadow_protect(ctx, true);
}
@@ -391,7 +393,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
{
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
struct drm_framebuffer *fb = state->base.fb;
unsigned int win = state->base.normalized_zpos + ctx->first_win;
unsigned int cpp = fb->format->cpp[0];
@@ -445,7 +447,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
unsigned long flags;
int win = hweight32(crtc->base.state->plane_mask) + ctx->first_win;
@@ -502,7 +504,7 @@ static void decon_swreset(struct decon_context *ctx)
static void decon_enable(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
pm_runtime_get_sync(ctx->dev);
@@ -510,12 +512,12 @@ static void decon_enable(struct exynos_drm_crtc *crtc)
decon_swreset(ctx);
- decon_commit(ctx->crtc);
+ decon_commit(&ctx->crtc);
}
static void decon_disable(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
int i;
if (!(ctx->out_type & I80_HW_TRG))
@@ -548,7 +550,7 @@ static irqreturn_t decon_te_irq_handler(int irq, void *dev_id)
static void decon_clear_channels(struct exynos_drm_crtc *crtc)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
int win, i, ret;
DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -577,7 +579,7 @@ static void decon_clear_channels(struct exynos_drm_crtc *crtc)
static enum drm_mode_status decon_mode_valid(struct exynos_drm_crtc *crtc,
const struct drm_display_mode *mode)
{
- struct decon_context *ctx = crtc->ctx;
+ struct decon_context *ctx = to_decon(crtc);
ctx->irq = crtc->i80_mode ? ctx->irq_lcd_sys : ctx->irq_vsync;
@@ -605,8 +607,6 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
{
struct decon_context *ctx = dev_get_drvdata(dev);
struct drm_device *drm_dev = data;
- struct exynos_drm_plane *exynos_plane;
- enum exynos_drm_output_type out_type;
unsigned int i;
int ret;
@@ -624,15 +624,15 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
return ret;
}
- exynos_plane = &ctx->planes[PRIMARY_WIN];
- out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
- : EXYNOS_DISPLAY_TYPE_LCD;
- ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
- out_type, &decon_crtc_ops, ctx);
- if (IS_ERR(ctx->crtc))
- return PTR_ERR(ctx->crtc);
+ ctx->crtc.type = (ctx->out_type & IFTYPE_HDMI)
+ ? EXYNOS_DISPLAY_TYPE_HDMI : EXYNOS_DISPLAY_TYPE_LCD;
+ ctx->crtc.ops = &decon_crtc_ops;
+ ret = exynos_drm_crtc_init(&ctx->crtc, drm_dev);
+ if (ret)
+ return ret;
+ ctx->crtc.base.primary = &ctx->planes[PRIMARY_WIN].base;
- decon_clear_channels(ctx->crtc);
+ decon_clear_channels(&ctx->crtc);
return exynos_drm_register_dma(drm_dev, dev);
}
@@ -641,7 +641,7 @@ static void decon_unbind(struct device *dev, struct device *master, void *data)
{
struct decon_context *ctx = dev_get_drvdata(dev);
- decon_disable(ctx->crtc);
+ decon_disable(&ctx->crtc);
/* detach this sub driver from iommu mapping if supported. */
exynos_drm_unregister_dma(ctx->drm_dev, ctx->dev);
@@ -663,7 +663,7 @@ static void decon_handle_vblank(struct decon_context *ctx)
if (frm != ctx->frame_id) {
/* handle only if incremented, take care of wrap-around */
if ((s32)(frm - ctx->frame_id) > 0)
- drm_crtc_handle_vblank(&ctx->crtc->base);
+ drm_crtc_handle_vblank(&ctx->crtc.base);
ctx->frame_id = frm;
}
--
2.17.1
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next prev parent reply other threads:[~2019-03-20 13:07 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190320130711eucas1p2b9f18d009647652b4bb912fdd40c9f74@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 00/24] drm/exynos: add support for GSCALER planes on Exynos5433 Andrzej Hajda
[not found] ` <CGME20190320130712eucas1p2c98ef5f0f42d422dc711c222fa4da11b@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 01/24] drm/exynos: remove exynos_drm_plane.h header Andrzej Hajda
[not found] ` <CGME20190320130712eucas1p2f3735c6c5afd7117f297ce7f495e4479@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 02/24] drm/exynos: remove spare macro Andrzej Hajda
[not found] ` <CGME20190320130713eucas1p137746c8fcdf13bbe1c897c27a245b22a@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 03/24] drm/exynos: drop exynos_drm_plane_config structure Andrzej Hajda
[not found] ` <CGME20190320130713eucas1p2dd57732ea0135355863ba26424a8bacf@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 04/24] drm/exynos: add exynos_drm_crtc_init function Andrzej Hajda
[not found] ` <CGME20190320130714eucas1p1c0b414ed76d7d0d78da56c9c0a6c8973@eucas1p1.samsung.com>
2019-03-20 13:06 ` Andrzej Hajda [this message]
[not found] ` <CGME20190320130714eucas1p2e4f96fe67486283560c7b6a8627b769c@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 06/24] drm/exynos/decon7: embed exynos_drm_crtc directly into context Andrzej Hajda
[not found] ` <CGME20190320130714eucas1p1d3ab6fceec849f22bab69df1e46b972d@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 07/24] drm/exynos/fimd: " Andrzej Hajda
[not found] ` <CGME20190320130715eucas1p250b6b902360896cd36bff8536b6292bf@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 08/24] drm/exynos/mixer: " Andrzej Hajda
[not found] ` <CGME20190320130715eucas1p2ab0449e8b243fcfa2d63524363eb8544@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 09/24] drm/exynos/vidi: " Andrzej Hajda
[not found] ` <CGME20190320130715eucas1p1cc35aa50021848a6f3d5459bb0c6d1bf@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 10/24] drm/exynos: remove standalone exynos_drm_crtc leftovers Andrzej Hajda
[not found] ` <CGME20190320130716eucas1p2fa37979f7715c411e079d146b96628cb@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 11/24] drm/exynos/vidi: remove encoder_to_vidi helper Andrzej Hajda
[not found] ` <CGME20190320130716eucas1p121bc6480ad28d1c0c79c195ae943ee55@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 12/24] drm/exynos: unify plane type assignment Andrzej Hajda
[not found] ` <CGME20190320130717eucas1p2a2a480a8c5d71fc66741410829a0d016@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 13/24] drm/exynos: set primary plane in exynos_drm_crtc_init Andrzej Hajda
[not found] ` <CGME20190320130717eucas1p2c75749455fa4b34b4d21f9873b3d9cb6@eucas1p2.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 14/24] drm/exynos: set cursor " Andrzej Hajda
[not found] ` <CGME20190320130718eucas1p15d440d88365fa5ea213f592b97e6f226@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 15/24] drm/exynos: add plane update/disable callbacks for planes Andrzej Hajda
[not found] ` <CGME20190320130718eucas1p1e42feb422bda24a2db733d50eb41ea47@eucas1p1.samsung.com>
2019-03-20 13:06 ` [PATCH v2 RESEND 16/24] drm/exynos: add GSCALER plane capability Andrzej Hajda
[not found] ` <CGME20190320130719eucas1p1b411bcd1e32a500202a19a24a4ba92a6@eucas1p1.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 17/24] drm/exynos/gscaler: fix id assignement Andrzej Hajda
[not found] ` <CGME20190320130719eucas1p274be59cfcd798d21ea583bc22f218ff7@eucas1p2.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 18/24] arm64: dts: exynos: configure GSCALER related clocks Andrzej Hajda
[not found] ` <CGME20190320130719eucas1p2e59268e628f6c88db6b632abb153313a@eucas1p2.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 19/24] arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs Andrzej Hajda
[not found] ` <CGME20190320130720eucas1p1b6f2351c2262d2c89a464fdc10a6a607@eucas1p1.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 20/24] drm/exynos/gscaler: add local path support Andrzej Hajda
[not found] ` <CGME20190320130720eucas1p1f2b27e5d340a50dc710155b37e7b173b@eucas1p1.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 21/24] drm/exynos/decon5433: " Andrzej Hajda
[not found] ` <CGME20190320130721eucas1p2097f22c60919e45a10f9dff6dd678c99@eucas1p2.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 22/24] drm/exynos/decon5433: wait for finish previous update Andrzej Hajda
[not found] ` <CGME20190320130721eucas1p258d3ace8294e90446d369c1d45941dc9@eucas1p2.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 23/24] drm/exynos/gscaler: change supported color format BGRX8888 to XBGR8888 Andrzej Hajda
[not found] ` <CGME20190320130722eucas1p201e6452c3329fdbbc651051da9b14155@eucas1p2.samsung.com>
2019-03-20 13:07 ` [PATCH v2 RESEND 24/24] drm/exynos/gscaler: fix handling YVU420 pixel format Andrzej Hajda
2019-03-25 3:12 ` [PATCH v2 RESEND 00/24] drm/exynos: add support for GSCALER planes on Exynos5433 Inki Dae
2019-03-25 7:21 ` Andrzej Hajda
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