* [PATCH] amd/amdgpu: code refactoring to clean code style a bit
@ 2021-03-31 13:11 Bernard Zhao
2021-04-01 21:12 ` Alex Deucher
0 siblings, 1 reply; 2+ messages in thread
From: Bernard Zhao @ 2021-03-31 13:11 UTC (permalink / raw)
To: Alex Deucher, Christian König, David Airlie, Daniel Vetter,
Luben Tuikov, Hawking Zhang, Deepak R Varma, Evan Quan,
Likun Gao, amd-gfx, dri-devel, linux-kernel
Cc: opensource.kernel, Bernard Zhao
Fix checkpatch.pl warning:
Too many leading tabs - consider code refactoring
WARNING: Too many leading tabs - consider code refactoring
+ for (j = 0; j < profile->ucLeakageBinNum; j++) {
WARNING: Too many leading tabs - consider code refactoring
+ if (vbios_voltage_id <= leakage_bin[j]) {
WARNING: Too many leading tabs - consider code refactoring
+ for (j = 0; j < profile->ucLeakageBinNum; j++) {
WARNING: Too many leading tabs - consider code refactoring
+ if (vbios_voltage_id <= leakage_bin[j]) {
Signed-off-by: Bernard Zhao <bernard@vivo.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 84 ++++++++------------
1 file changed, 35 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 86add0f4ea4d..9968ff8ddc9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1283,65 +1283,51 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_devic
profile = (ATOM_ASIC_PROFILING_INFO_V2_1 *)
(adev->mode_info.atom_context->bios + data_offset);
- switch (frev) {
- case 1:
+ if ((frev != 2) || (crev != 1)) {
+ DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
return -EINVAL;
- case 2:
- switch (crev) {
- case 1:
- if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
- return -EINVAL;
- leakage_bin = (u16 *)
- (adev->mode_info.atom_context->bios + data_offset +
- le16_to_cpu(profile->usLeakageBinArrayOffset));
- vddc_id_buf = (u16 *)
- (adev->mode_info.atom_context->bios + data_offset +
- le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
- vddc_buf = (u16 *)
- (adev->mode_info.atom_context->bios + data_offset +
- le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
- vddci_id_buf = (u16 *)
- (adev->mode_info.atom_context->bios + data_offset +
- le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
- vddci_buf = (u16 *)
- (adev->mode_info.atom_context->bios + data_offset +
- le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
-
- if (profile->ucElbVDDC_Num > 0) {
- for (i = 0; i < profile->ucElbVDDC_Num; i++) {
- if (vddc_id_buf[i] == virtual_voltage_id) {
- for (j = 0; j < profile->ucLeakageBinNum; j++) {
- if (vbios_voltage_id <= leakage_bin[j]) {
- *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
- break;
- }
- }
+ }
+
+ if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
+ return -EINVAL;
+
+ leakage_bin = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
+ le16_to_cpu(profile->usLeakageBinArrayOffset));
+ vddc_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
+ le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
+ vddc_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
+ le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
+ vddci_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
+ le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
+ vddci_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
+ le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
+
+ if (profile->ucElbVDDC_Num > 0) {
+ for (i = 0; i < profile->ucElbVDDC_Num; i++) {
+ if (vddc_id_buf[i] == virtual_voltage_id) {
+ for (j = 0; j < profile->ucLeakageBinNum; j++) {
+ if (vbios_voltage_id <= leakage_bin[j]) {
+ *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
break;
}
}
+ break;
}
- if (profile->ucElbVDDCI_Num > 0) {
- for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
- if (vddci_id_buf[i] == virtual_voltage_id) {
- for (j = 0; j < profile->ucLeakageBinNum; j++) {
- if (vbios_voltage_id <= leakage_bin[j]) {
- *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
- break;
- }
- }
+ }
+ }
+
+ if (profile->ucElbVDDCI_Num > 0) {
+ for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
+ if (vddci_id_buf[i] == virtual_voltage_id) {
+ for (j = 0; j < profile->ucLeakageBinNum; j++) {
+ if (vbios_voltage_id <= leakage_bin[j]) {
+ *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
break;
}
}
+ break;
}
- break;
- default:
- DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
- return -EINVAL;
}
- break;
- default:
- DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
- return -EINVAL;
}
return 0;
--
2.31.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] amd/amdgpu: code refactoring to clean code style a bit
2021-03-31 13:11 [PATCH] amd/amdgpu: code refactoring to clean code style a bit Bernard Zhao
@ 2021-04-01 21:12 ` Alex Deucher
0 siblings, 0 replies; 2+ messages in thread
From: Alex Deucher @ 2021-04-01 21:12 UTC (permalink / raw)
To: Bernard Zhao
Cc: opensource.kernel, Deepak R Varma, David Airlie, LKML,
amd-gfx list, Luben Tuikov, Maling list - DRI developers,
Alex Deucher, Likun Gao, Evan Quan, Christian König,
Hawking Zhang
This code has been dropped.
Alex
On Wed, Mar 31, 2021 at 9:36 AM Bernard Zhao <bernard@vivo.com> wrote:
>
> Fix checkpatch.pl warning:
> Too many leading tabs - consider code refactoring
> WARNING: Too many leading tabs - consider code refactoring
> + for (j = 0; j < profile->ucLeakageBinNum; j++) {
>
> WARNING: Too many leading tabs - consider code refactoring
> + if (vbios_voltage_id <= leakage_bin[j]) {
>
> WARNING: Too many leading tabs - consider code refactoring
> + for (j = 0; j < profile->ucLeakageBinNum; j++) {
>
> WARNING: Too many leading tabs - consider code refactoring
> + if (vbios_voltage_id <= leakage_bin[j]) {
>
> Signed-off-by: Bernard Zhao <bernard@vivo.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 84 ++++++++------------
> 1 file changed, 35 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> index 86add0f4ea4d..9968ff8ddc9c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> @@ -1283,65 +1283,51 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_devic
> profile = (ATOM_ASIC_PROFILING_INFO_V2_1 *)
> (adev->mode_info.atom_context->bios + data_offset);
>
> - switch (frev) {
> - case 1:
> + if ((frev != 2) || (crev != 1)) {
> + DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
> return -EINVAL;
> - case 2:
> - switch (crev) {
> - case 1:
> - if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
> - return -EINVAL;
> - leakage_bin = (u16 *)
> - (adev->mode_info.atom_context->bios + data_offset +
> - le16_to_cpu(profile->usLeakageBinArrayOffset));
> - vddc_id_buf = (u16 *)
> - (adev->mode_info.atom_context->bios + data_offset +
> - le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
> - vddc_buf = (u16 *)
> - (adev->mode_info.atom_context->bios + data_offset +
> - le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
> - vddci_id_buf = (u16 *)
> - (adev->mode_info.atom_context->bios + data_offset +
> - le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
> - vddci_buf = (u16 *)
> - (adev->mode_info.atom_context->bios + data_offset +
> - le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
> -
> - if (profile->ucElbVDDC_Num > 0) {
> - for (i = 0; i < profile->ucElbVDDC_Num; i++) {
> - if (vddc_id_buf[i] == virtual_voltage_id) {
> - for (j = 0; j < profile->ucLeakageBinNum; j++) {
> - if (vbios_voltage_id <= leakage_bin[j]) {
> - *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
> - break;
> - }
> - }
> + }
> +
> + if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
> + return -EINVAL;
> +
> + leakage_bin = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> + le16_to_cpu(profile->usLeakageBinArrayOffset));
> + vddc_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> + le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
> + vddc_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> + le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
> + vddci_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> + le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
> + vddci_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> + le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
> +
> + if (profile->ucElbVDDC_Num > 0) {
> + for (i = 0; i < profile->ucElbVDDC_Num; i++) {
> + if (vddc_id_buf[i] == virtual_voltage_id) {
> + for (j = 0; j < profile->ucLeakageBinNum; j++) {
> + if (vbios_voltage_id <= leakage_bin[j]) {
> + *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
> break;
> }
> }
> + break;
> }
> - if (profile->ucElbVDDCI_Num > 0) {
> - for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
> - if (vddci_id_buf[i] == virtual_voltage_id) {
> - for (j = 0; j < profile->ucLeakageBinNum; j++) {
> - if (vbios_voltage_id <= leakage_bin[j]) {
> - *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
> - break;
> - }
> - }
> + }
> + }
> +
> + if (profile->ucElbVDDCI_Num > 0) {
> + for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
> + if (vddci_id_buf[i] == virtual_voltage_id) {
> + for (j = 0; j < profile->ucLeakageBinNum; j++) {
> + if (vbios_voltage_id <= leakage_bin[j]) {
> + *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
> break;
> }
> }
> + break;
> }
> - break;
> - default:
> - DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
> - return -EINVAL;
> }
> - break;
> - default:
> - DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
> - return -EINVAL;
> }
>
> return 0;
> --
> 2.31.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-04-01 21:12 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-31 13:11 [PATCH] amd/amdgpu: code refactoring to clean code style a bit Bernard Zhao
2021-04-01 21:12 ` Alex Deucher
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).