From: Rob Clark <robdclark@gmail.com>
To: dri-devel@lists.freedesktop.org
Cc: "Rob Clark" <robdclark@chromium.org>,
"open list" <linux-kernel@vger.kernel.org>,
"Christian König" <ckoenig.leichtzumerken@gmail.com>,
intel-gfx@lists.freedesktop.org,
"Abhinav Kumar" <quic_abhinavk@quicinc.com>,
"Christian König" <christian.koenig@amd.com>,
"moderated list:DMA BUFFER SHARING FRAMEWORK"
<linaro-mm-sig@lists.linaro.org>, "Sean Paul" <sean@poorly.run>,
"Luben Tuikov" <luben.tuikov@amd.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>,
"Matt Turner" <mattst88@gmail.com>,
freedreno@lists.freedesktop.org,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@vger.kernel.org>,
"open list:DMA BUFFER SHARING FRAMEWORK"
<linux-media@vger.kernel.org>
Subject: [PATCH v10 12/15] drm/msm: Add deadline based boost support
Date: Wed, 8 Mar 2023 07:53:03 -0800 [thread overview]
Message-ID: <20230308155322.344664-13-robdclark@gmail.com> (raw)
In-Reply-To: <20230308155322.344664-1-robdclark@gmail.com>
From: Rob Clark <robdclark@chromium.org>
Track the nearest deadline on a fence timeline and set a timer to expire
shortly before to trigger boost if the fence has not yet been signaled.
v2: rebase
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
drivers/gpu/drm/msm/msm_fence.c | 74 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/msm/msm_fence.h | 20 +++++++++
2 files changed, 94 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_fence.c b/drivers/gpu/drm/msm/msm_fence.c
index 56641408ea74..51b461f32103 100644
--- a/drivers/gpu/drm/msm/msm_fence.c
+++ b/drivers/gpu/drm/msm/msm_fence.c
@@ -8,6 +8,35 @@
#include "msm_drv.h"
#include "msm_fence.h"
+#include "msm_gpu.h"
+
+static struct msm_gpu *fctx2gpu(struct msm_fence_context *fctx)
+{
+ struct msm_drm_private *priv = fctx->dev->dev_private;
+ return priv->gpu;
+}
+
+static enum hrtimer_restart deadline_timer(struct hrtimer *t)
+{
+ struct msm_fence_context *fctx = container_of(t,
+ struct msm_fence_context, deadline_timer);
+
+ kthread_queue_work(fctx2gpu(fctx)->worker, &fctx->deadline_work);
+
+ return HRTIMER_NORESTART;
+}
+
+static void deadline_work(struct kthread_work *work)
+{
+ struct msm_fence_context *fctx = container_of(work,
+ struct msm_fence_context, deadline_work);
+
+ /* If deadline fence has already passed, nothing to do: */
+ if (msm_fence_completed(fctx, fctx->next_deadline_fence))
+ return;
+
+ msm_devfreq_boost(fctx2gpu(fctx), 2);
+}
struct msm_fence_context *
@@ -36,6 +65,13 @@ msm_fence_context_alloc(struct drm_device *dev, volatile uint32_t *fenceptr,
fctx->completed_fence = fctx->last_fence;
*fctx->fenceptr = fctx->last_fence;
+ hrtimer_init(&fctx->deadline_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
+ fctx->deadline_timer.function = deadline_timer;
+
+ kthread_init_work(&fctx->deadline_work, deadline_work);
+
+ fctx->next_deadline = ktime_get();
+
return fctx;
}
@@ -62,6 +98,8 @@ void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence)
spin_lock_irqsave(&fctx->spinlock, flags);
if (fence_after(fence, fctx->completed_fence))
fctx->completed_fence = fence;
+ if (msm_fence_completed(fctx, fctx->next_deadline_fence))
+ hrtimer_cancel(&fctx->deadline_timer);
spin_unlock_irqrestore(&fctx->spinlock, flags);
}
@@ -92,10 +130,46 @@ static bool msm_fence_signaled(struct dma_fence *fence)
return msm_fence_completed(f->fctx, f->base.seqno);
}
+static void msm_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
+{
+ struct msm_fence *f = to_msm_fence(fence);
+ struct msm_fence_context *fctx = f->fctx;
+ unsigned long flags;
+ ktime_t now;
+
+ spin_lock_irqsave(&fctx->spinlock, flags);
+ now = ktime_get();
+
+ if (ktime_after(now, fctx->next_deadline) ||
+ ktime_before(deadline, fctx->next_deadline)) {
+ fctx->next_deadline = deadline;
+ fctx->next_deadline_fence =
+ max(fctx->next_deadline_fence, (uint32_t)fence->seqno);
+
+ /*
+ * Set timer to trigger boost 3ms before deadline, or
+ * if we are already less than 3ms before the deadline
+ * schedule boost work immediately.
+ */
+ deadline = ktime_sub(deadline, ms_to_ktime(3));
+
+ if (ktime_after(now, deadline)) {
+ kthread_queue_work(fctx2gpu(fctx)->worker,
+ &fctx->deadline_work);
+ } else {
+ hrtimer_start(&fctx->deadline_timer, deadline,
+ HRTIMER_MODE_ABS);
+ }
+ }
+
+ spin_unlock_irqrestore(&fctx->spinlock, flags);
+}
+
static const struct dma_fence_ops msm_fence_ops = {
.get_driver_name = msm_fence_get_driver_name,
.get_timeline_name = msm_fence_get_timeline_name,
.signaled = msm_fence_signaled,
+ .set_deadline = msm_fence_set_deadline,
};
struct dma_fence *
diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h
index 7f1798c54cd1..cdaebfb94f5c 100644
--- a/drivers/gpu/drm/msm/msm_fence.h
+++ b/drivers/gpu/drm/msm/msm_fence.h
@@ -52,6 +52,26 @@ struct msm_fence_context {
volatile uint32_t *fenceptr;
spinlock_t spinlock;
+
+ /*
+ * TODO this doesn't really deal with multiple deadlines, like
+ * if userspace got multiple frames ahead.. OTOH atomic updates
+ * don't queue, so maybe that is ok
+ */
+
+ /** next_deadline: Time of next deadline */
+ ktime_t next_deadline;
+
+ /**
+ * next_deadline_fence:
+ *
+ * Fence value for next pending deadline. The deadline timer is
+ * canceled when this fence is signaled.
+ */
+ uint32_t next_deadline_fence;
+
+ struct hrtimer deadline_timer;
+ struct kthread_work deadline_work;
};
struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev,
--
2.39.2
next prev parent reply other threads:[~2023-03-08 15:54 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 15:52 [PATCH v10 00/15] dma-fence: Deadline awareness Rob Clark
2023-03-08 15:52 ` [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness Rob Clark
2023-03-10 15:45 ` Jonas Ådahl
2023-03-10 17:38 ` Rob Clark
2023-03-15 13:53 ` Jonas Ådahl
2023-03-15 16:19 ` Rob Clark
2023-03-16 9:26 ` Jonas Ådahl
2023-03-16 16:28 ` Rob Clark
2023-03-16 22:22 ` Sebastian Wick
2023-03-16 22:59 ` Rob Clark
2023-03-17 15:07 ` Sebastian Wick
2023-03-17 9:09 ` Pekka Paalanen
2023-03-17 9:17 ` Pekka Paalanen
2023-03-17 9:59 ` Pekka Paalanen
2023-03-17 9:10 ` Michel Dänzer
2023-03-17 10:23 ` Jonas Ådahl
2023-03-17 15:59 ` Rob Clark
2023-03-21 13:24 ` Jonas Ådahl
2023-03-21 14:34 ` Rob Clark
2023-03-08 15:52 ` [PATCH v10 02/15] dma-buf/fence-array: Add fence deadline support Rob Clark
2023-03-08 15:52 ` [PATCH v10 03/15] dma-buf/fence-chain: " Rob Clark
2023-03-08 15:52 ` [PATCH v10 04/15] dma-buf/dma-resv: Add a way to set fence deadline Rob Clark
2023-03-08 15:52 ` [PATCH v10 05/15] dma-buf/sync_file: Surface sync-file uABI Rob Clark
2023-03-08 15:52 ` [PATCH v10 06/15] dma-buf/sync_file: Add SET_DEADLINE ioctl Rob Clark
2023-03-08 15:52 ` [PATCH v10 07/15] dma-buf/sw_sync: Add fence deadline support Rob Clark
2023-03-28 13:57 ` Tvrtko Ursulin
2023-03-08 15:52 ` [PATCH v10 08/15] drm/scheduler: " Rob Clark
2023-03-08 15:53 ` [PATCH v10 09/15] drm/syncobj: Add deadline support for syncobj waits Rob Clark
2023-03-17 19:08 ` [Intel-gfx] " Faith Ekstrand
2023-03-17 19:38 ` Rob Clark
2023-03-18 16:07 ` Rob Clark
2023-03-28 14:24 ` Tvrtko Ursulin
2023-03-08 15:53 ` [PATCH v10 10/15] drm/vblank: Add helper to get next vblank time Rob Clark
2023-03-08 15:53 ` [PATCH v10 11/15] drm/atomic-helper: Set fence deadline for vblank Rob Clark
2023-03-31 20:44 ` Nathan Chancellor
2023-03-31 22:14 ` Rob Clark
2023-03-31 23:30 ` Nathan Chancellor
2023-04-01 15:39 ` Rob Clark
2023-04-04 17:22 ` Dmitry Baryshkov
2023-04-04 19:16 ` Daniel Vetter
2023-04-04 21:53 ` Dmitry Baryshkov
2023-04-05 7:58 ` Daniel Vetter
2023-03-08 15:53 ` Rob Clark [this message]
2023-03-08 15:53 ` [PATCH v10 13/15] drm/msm: Add wait-boost support Rob Clark
2023-03-08 15:53 ` [PATCH v10 14/15] drm/msm/atomic: Switch to vblank_start helper Rob Clark
2023-03-08 15:53 ` [PATCH v10 15/15] drm/i915: Add deadline based boost support Rob Clark
2023-03-09 10:21 ` [PATCH v10 00/15] dma-fence: Deadline awareness Pekka Paalanen
2023-03-16 21:22 ` Rob Clark
2023-03-27 19:05 ` Matt Turner
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