Re: [PATCH v10 00/15] dma-fence: Deadline awareness

From: Matt Turner <mattst88@gmail.com>
To: Rob Clark <robdclark@gmail.com>
Cc: "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
	"Gustavo Padovan" <gustavo@padovan.org>,
	dri-devel@lists.freedesktop.org,
	"Douglas Anderson" <dianders@chromium.org>,
	"Liu Shixin" <liushixin2@huawei.com>,
	"Rob Clark" <robdclark@chromium.org>,
	"Vinod Polimera" <quic_vpolimer@quicinc.com>,
	"Luben Tuikov" <luben.tuikov@amd.com>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<linux-arm-msm@vger.kernel.org>,
	"open list:DMA BUFFER SHARING FRAMEWORK"
	<linux-media@vger.kernel.org>,
	"Christian König" <ckoenig.leichtzumerken@gmail.com>,
	intel-gfx@lists.freedesktop.org,
	"Abhinav Kumar" <quic_abhinavk@quicinc.com>,
	"Stephen Boyd" <swboyd@chromium.org>,
	"moderated list:DMA BUFFER SHARING FRAMEWORK"
	<linaro-mm-sig@lists.linaro.org>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Sean Paul" <sean@poorly.run>,
	"open list" <linux-kernel@vger.kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>,
	freedreno@lists.freedesktop.org
Subject: Re: [PATCH v10 00/15] dma-fence: Deadline awareness
Date: Mon, 27 Mar 2023 15:05:48 -0400	[thread overview]
Message-ID: <CAEdQ38FGQe_z2T2vUCsSYvH52WZc75OPCCFYOSEKJ9MzXq0ynw@mail.gmail.com> (raw)
In-Reply-To: <20230308155322.344664-1-robdclark@gmail.com>

On Wed, Mar 8, 2023 at 10:53 AM Rob Clark <robdclark@gmail.com> wrote:
>
> From: Rob Clark <robdclark@chromium.org>
>
> This series adds a deadline hint to fences, so realtime deadlines
> such as vblank can be communicated to the fence signaller for power/
> frequency management decisions.
>
> This is partially inspired by a trick i915 does, but implemented
> via dma-fence for a couple of reasons:
>
> 1) To continue to be able to use the atomic helpers
> 2) To support cases where display and gpu are different drivers
>
> This iteration adds a dma-fence ioctl to set a deadline (both to
> support igt-tests, and compositors which delay decisions about which
> client buffer to display), and a sw_sync ioctl to read back the
> deadline.  IGT tests utilizing these can be found at:

I read through the series and didn't spot anything. Have a rather weak

Reviewed-by: Matt Turner <mattst88@gmail.com>

Thanks!