* [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML
@ 2020-04-05 23:39 Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI Laurent Pinchart
` (6 more replies)
0 siblings, 7 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Hello,
This patch series attempts a conversion of the DWC HDMI TX DT bindings
to YAML. I've marked it as RFC as the base schema doesn't work is
intended in this (naive) approach, and I'm not sure how to fix it
properly.
The DWC HDMI TX is an HDMI transmitter IP core from Synopsys, integrated
in various SoCs with different glue layers. As such, some properties are
defined in a common document, but sometimes need to be overridden by
platform-specific bindings.
Patch 1/6 adds a base schema for the common properties, based on the
existing dw_hdmi.txt document. Patches 2/6 to 4/6 then convert the
platformspecific bindings for Renesas, NXP and Rockchip SoCs. Patch 5/6
replaces the reference to dw_hdmi.txt in the Allwinner bindings with a
reference to the YAML base schema, and patch 6/6 drops dw_hdmi.txt.
My attempts at defining properties in the base schema, including it in
the platform-specific schema with an allOf: $ref..., and overridding
properties didn't work, as DT schemas don't define properties in a way
that can be overridden, but instead define validation rules that are all
considered. Both the rules in the base schema and in the
platform-specific schemas are evaluated.
One possible way around this would be to not pull in the whole base
schema, but specific rules. This is however a bit cumbersome to use in
my opinion. Is there a better way to achieve this ?
I have volunteered Philipp Zabel and Mark Yao as maintainers for the
i.MX6 and Rockchip bindings respectively. Please let me know if you
would prefer a different maintainer, or ack the respective patch if this
is fine with you.
Laurent Pinchart (6):
dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI
dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
dt-bindings: display: imx: hdmi: Convert binding to YAML
dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML
schema
dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt
.../display/allwinner,sun8i-a83t-dw-hdmi.yaml | 4 +-
.../bindings/display/bridge/dw_hdmi.txt | 33 ----
.../display/bridge/renesas,dw-hdmi.txt | 86 ---------
.../display/bridge/renesas,dw-hdmi.yaml | 142 ++++++++++++++
.../display/bridge/synopsys,dw-hdmi.yaml | 68 +++++++
.../bindings/display/imx/fsl,imx6-hdmi.yaml | 143 ++++++++++++++
.../devicetree/bindings/display/imx/hdmi.txt | 65 -------
.../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
.../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
9 files changed, 533 insertions(+), 260 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
delete mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
create mode 100644 Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml
delete mode 100644 Documentation/devicetree/bindings/display/imx/hdmi.txt
delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-06 7:50 ` Maxime Ripard
2020-04-05 23:39 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML Laurent Pinchart
` (5 subsequent siblings)
6 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Add a .yaml schema containing the common properties for the Synopsys
DesignWare HDMI TX controller. This isn't a full device tree binding
specification, but is meant to be referenced by platform-specific
bindings for the IP core.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../display/bridge/synopsys,dw-hdmi.yaml | 68 +++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
new file mode 100644
index 000000000000..6ebb8f7d2ba8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common Properties for Synopsys DesignWare HDMI TX Controller
+
+maintainers:
+ - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+
+description: |
+ This document defines device tree properties for the Synopsys DesignWare HDMI
+ TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
+ binding specification by itself but is meant to be referenced by device tree
+ bindings for the platform-specific integrations of the DWC HDMI TX.
+
+ When referenced from platform device tree bindings the properties defined in
+ this document are defined as follows. The platform device tree bindings are
+ responsible for defining whether each property is required or optional.
+
+properties:
+ reg:
+ maxItems: 1
+
+ reg-io-width:
+ description:
+ Width (in bytes) of the registers specified by the reg property. The
+ register width defaults to 1 if the property is not present.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [1, 4]
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+ items:
+ - description: The bus clock for either AHB and APB
+ - description: The internal register configuration clock
+ - description: The HDMI CEC controller main clock
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+ items:
+ - const: iahb
+ - const: isfr
+ - const: cec
+
+ interrupts:
+ maxItems: 1
+
+ ports:
+ type: object
+ description: |
+ The connectivity of the DWC HDMI TX with the rest of the system is
+ expressed using ports as specified in the device graph bindings defined
+ in Documentation/devicetree/bindings/graph.txt. The numbering of the ports
+ is platform-specific.
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+...
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-06 7:57 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: " Maxime Ripard
2020-04-06 8:51 ` Geert Uytterhoeven
2020-04-05 23:39 ` [PATCH/RFC 3/6] dt-bindings: display: imx: hdmi: " Laurent Pinchart
` (4 subsequent siblings)
6 siblings, 2 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Convert the Renesas R-Car DWC HDMI TX text binding to YAML.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../display/bridge/renesas,dw-hdmi.txt | 86 -----------
.../display/bridge/renesas,dw-hdmi.yaml | 142 ++++++++++++++++++
2 files changed, 142 insertions(+), 86 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
deleted file mode 100644
index 819f3e31013c..000000000000
--- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
+++ /dev/null
@@ -1,86 +0,0 @@
-Renesas Gen3 DWC HDMI TX Encoder
-================================
-
-The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
-with a companion PHY IP.
-
-These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
-Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
-following device-specific properties.
-
-
-Required properties:
-
-- compatible : Shall contain one or more of
- - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
- - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
- - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
- - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
- - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
- - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible
- HDMI TX
-
- When compatible with generic versions, nodes must list the SoC-specific
- version corresponding to the platform first, followed by the
- family-specific version.
-
-- reg: See dw_hdmi.txt.
-- interrupts: HDMI interrupt number
-- clocks: See dw_hdmi.txt.
-- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
-- ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
- corresponding to the video input of the controller and one port numbered 1
- corresponding to its HDMI output, and one port numbered 2 corresponding to
- sound input of the controller. Each port shall have a single endpoint.
-
-Optional properties:
-
-- power-domains: Shall reference the power domain that contains the DWC HDMI,
- if any.
-
-
-Example:
-
- hdmi0: hdmi@fead0000 {
- compatible = "renesas,r8a7795-dw-hdmi";
- reg = <0 0xfead0000 0 0x10000>;
- interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
- clock-names = "iahb", "isfr";
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- dw_hdmi0_in: endpoint {
- remote-endpoint = <&du_out_hdmi0>;
- };
- };
- port@1 {
- reg = <1>;
- rcar_dw_hdmi0_out: endpoint {
- remote-endpoint = <&hdmi0_con>;
- };
- };
- port@2 {
- reg = <2>;
- rcar_dw_hdmi0_sound_in: endpoint {
- remote-endpoint = <&hdmi_sound_out>;
- };
- };
- };
- };
-
- hdmi0-out {
- compatible = "hdmi-connector";
- label = "HDMI0 OUT";
- type = "a";
-
- port {
- hdmi0_con: endpoint {
- remote-endpoint = <&rcar_dw_hdmi0_out>;
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
new file mode 100644
index 000000000000..9a543740c81d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas R-Car DWC HDMI TX Encoder
+
+maintainers:
+ - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+
+description: |
+ The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
+ with a companion PHY IP.
+
+allOf:
+ - $ref: synopsys,dw-hdmi.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r8a774a1-hdmi # for R8A774A1 (RZ/G2M) compatible HDMI TX
+ - renesas,r8a774b1-hdmi # for R8A774B1 (RZ/G2N) compatible HDMI TX
+ - renesas,r8a7795-hdmi # for R8A7795 (R-Car H3) compatible HDMI TX
+ - renesas,r8a7796-hdmi # for R8A7796 (R-Car M3-W) compatible HDMI TX
+ - renesas,r8a77965-hdmi # for R8A77965 (R-Car M3-N) compatible HDMI TX
+ - const: renesas,rcar-gen3-hdmi
+
+ reg: true
+
+ reg-io-width:
+ const: 1
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: iahb
+ - const: isfr
+
+ interrupts: true
+
+ ports:
+ type: object
+ description: |
+ This device has three video ports. Their connections are modelled using the
+ OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
+ Each port shall have a single endpoint.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ port@0:
+ type: object
+ description: Parallel RGB input port
+
+ port@1:
+ type: object
+ description: HDMI output port
+
+ port@2:
+ type: object
+ description: Sound input port
+
+ required:
+ - port@0
+ - port@1
+ - port@2
+
+ additionalProperties: false
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/r8a7795-sysc.h>
+
+ hdmi@fead0000 {
+ compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
+ clock-names = "iahb", "isfr";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ dw_hdmi0_in: endpoint {
+ remote-endpoint = <&du_out_hdmi0>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ rcar_dw_hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi0_con>;
+ };
+ };
+ port@2 {
+ reg = <2>;
+ rcar_dw_hdmi0_sound_in: endpoint {
+ remote-endpoint = <&hdmi_sound_out>;
+ };
+ };
+ };
+ };
+
+ hdmi0-out {
+ compatible = "hdmi-connector";
+ label = "HDMI0 OUT";
+ type = "a";
+
+ port {
+ hdmi0_con: endpoint {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
+ };
+ };
+ };
+
+...
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH/RFC 3/6] dt-bindings: display: imx: hdmi: Convert binding to YAML
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: " Laurent Pinchart
` (3 subsequent siblings)
6 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Convert the i.MX6 HDMI TX text binding to YAML.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../bindings/display/imx/fsl,imx6-hdmi.yaml | 143 ++++++++++++++++++
.../devicetree/bindings/display/imx/hdmi.txt | 65 --------
2 files changed, 143 insertions(+), 65 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml
delete mode 100644 Documentation/devicetree/bindings/display/imx/hdmi.txt
diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml
new file mode 100644
index 000000000000..209ebb11dd80
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml
@@ -0,0 +1,143 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX6 DWC HDMI TX Encoder
+
+maintainers:
+ - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+ The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
+ with a companion PHY IP.
+
+allOf:
+ - $ref: ../bridge/synopsys,dw-hdmi.yaml#
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx6dl-hdmi
+ - fsl,imx6q-hdmi
+
+ reg: true
+
+ reg-io-width:
+ const: 1
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: iahb
+ - const: isfr
+
+ ddc-i2c-bus:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ The HDMI DDC bus can be connected to either a system I2C master or the
+ functionally-reduced I2C master contained in the DWC HDMI. When connected
+ to a system I2C master this property contains a phandle to that I2C
+ master controller.
+
+ gpr:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to the iomuxc-gpr region containing the HDMI multiplexer control
+ register.
+
+ interrupts: true
+
+ ports:
+ type: object
+ description: |
+ This device has four video ports, corresponding to the four inputs of the
+ HDMI multiplexer. Their connections are modelled using the OF graph
+ bindings specified in Documentation/devicetree/bindings/graph.txt.
+ Each port shall have a single endpoint.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ port@0:
+ type: object
+ description: First input of the HDMI multiplexer
+
+ port@1:
+ type: object
+ description: Second input of the HDMI multiplexer
+
+ port@2:
+ type: object
+ description: Third input of the HDMI multiplexer
+
+ port@3:
+ type: object
+ description: Fourth input of the HDMI multiplexer
+
+ anyOf:
+ - required:
+ - port@0
+ - required:
+ - port@1
+ - required:
+ - port@2
+ - required:
+ - port@3
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - gpr
+ - interrupts
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx6qdl-clock.h>
+
+ hdmi: hdmi@120000 {
+ reg = <0x00120000 0x9000>;
+ interrupts = <0 115 0x04>;
+ gpr = <&gpr>;
+ clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
+ <&clks IMX6QDL_CLK_HDMI_ISFR>;
+ clock-names = "iahb", "isfr";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ hdmi_mux_0: endpoint {
+ remote-endpoint = <&ipu1_di0_hdmi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ hdmi_mux_1: endpoint {
+ remote-endpoint = <&ipu1_di1_hdmi>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/display/imx/hdmi.txt b/Documentation/devicetree/bindings/display/imx/hdmi.txt
deleted file mode 100644
index 6d021e71c9cf..000000000000
--- a/Documentation/devicetree/bindings/display/imx/hdmi.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Freescale i.MX6 DWC HDMI TX Encoder
-===================================
-
-The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
-with a companion PHY IP.
-
-These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
-Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
-following device-specific properties.
-
-
-Required properties:
-
-- compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
-- reg: See dw_hdmi.txt.
-- interrupts: HDMI interrupt number
-- clocks: See dw_hdmi.txt.
-- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
-- ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
- numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer.
- Each port shall have a single endpoint.
-- gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
- multiplexer control register.
-
-Optional properties
-
-- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
- or the functionally-reduced I2C master contained in the DWC HDMI. When
- connected to a system I2C master this property contains a phandle to that
- I2C master controller.
-
-
-Example:
-
- gpr: iomuxc-gpr@20e0000 {
- /* ... */
- };
-
- hdmi: hdmi@120000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx6q-hdmi";
- reg = <0x00120000 0x9000>;
- interrupts = <0 115 0x04>;
- gpr = <&gpr>;
- clocks = <&clks 123>, <&clks 124>;
- clock-names = "iahb", "isfr";
- ddc-i2c-bus = <&i2c2>;
-
- port@0 {
- reg = <0>;
-
- hdmi_mux_0: endpoint {
- remote-endpoint = <&ipu1_di0_hdmi>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- hdmi_mux_1: endpoint {
- remote-endpoint = <&ipu1_di1_hdmi>;
- };
- };
- };
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
` (2 preceding siblings ...)
2020-04-05 23:39 ` [PATCH/RFC 3/6] dt-bindings: display: imx: hdmi: " Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-06 8:00 ` Maxime Ripard
2020-04-05 23:39 ` [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema Laurent Pinchart
` (2 subsequent siblings)
6 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Convert the Rockchip HDMI TX text binding to YAML.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
.../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
2 files changed, 178 insertions(+), 74 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
deleted file mode 100644
index 3d32ce137e7f..000000000000
--- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Rockchip DWC HDMI TX Encoder
-============================
-
-The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
-with a companion PHY IP.
-
-These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
-Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
-following device-specific properties.
-
-
-Required properties:
-
-- compatible: should be one of the following:
- "rockchip,rk3228-dw-hdmi"
- "rockchip,rk3288-dw-hdmi"
- "rockchip,rk3328-dw-hdmi"
- "rockchip,rk3399-dw-hdmi"
-- reg: See dw_hdmi.txt.
-- reg-io-width: See dw_hdmi.txt. Shall be 4.
-- interrupts: HDMI interrupt number
-- clocks: See dw_hdmi.txt.
-- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
-- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
- corresponding to the video input of the controller. The port shall have two
- endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
-- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
-
-Optional properties
-
-- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
- or the functionally-reduced I2C master contained in the DWC HDMI. When
- connected to a system I2C master this property contains a phandle to that
- I2C master controller.
-- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
-- clock-names: May contain "cec" as defined in dw_hdmi.txt.
-- clock-names: May contain "grf", power for grf io.
-- clock-names: May contain "vpll", external clock for some hdmi phy.
-- phys: from general PHY binding: the phandle for the PHY device.
-- phy-names: Should be "hdmi" if phys references an external phy.
-
-Optional pinctrl entry:
-- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
- will switch to the unwedge pinctrl state for 10ms if it ever gets an
- i2c timeout. It's intended that this unwedge pinctrl entry will
- cause the SDA line to be driven low to work around a hardware
- errata.
-
-Example:
-
-hdmi: hdmi@ff980000 {
- compatible = "rockchip,rk3288-dw-hdmi";
- reg = <0xff980000 0x20000>;
- reg-io-width = <4>;
- ddc-i2c-bus = <&i2c5>;
- rockchip,grf = <&grf>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
- clock-names = "iahb", "isfr";
- ports {
- hdmi_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
- hdmi_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_hdmi>;
- };
- hdmi_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_hdmi>;
- };
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
new file mode 100644
index 000000000000..8ff544ae0ac2
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
@@ -0,0 +1,178 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip DWC HDMI TX Encoder
+
+maintainers:
+ - Mark Yao <mark.yao@rock-chips.com>
+
+description: |
+ The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
+ with a companion PHY IP.
+
+allOf:
+ - $ref: ../bridge/synopsys,dw-hdmi.yaml#
+
+properties:
+ compatible:
+ enum:
+ - rockchip,rk3228-dw-hdmi
+ - rockchip,rk3288-dw-hdmi
+ - rockchip,rk3328-dw-hdmi
+ - rockchip,rk3399-dw-hdmi
+
+ reg: true
+
+ reg-io-width:
+ const: 4
+
+ clocks:
+ minItems: 2
+ maxItems: 5
+ items:
+ - description: The bus clock for either AHB and APB
+ - description: The internal register configuration clock
+ - description: The HDMI CEC controller main clock
+ - description: Power for GRF IO
+ - description: External clock for some HDMI PHY
+
+ clock-names:
+ minItems: 2
+ maxItems: 5
+ items:
+ - const: iahb
+ - const: isfr
+ - enum:
+ - cec
+ - grf
+ - vpll
+ - enum:
+ - cec
+ - grf
+ - vpll
+ - enum:
+ - cec
+ - grf
+ - vpll
+
+ ddc-i2c-bus:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ The HDMI DDC bus can be connected to either a system I2C master or the
+ functionally-reduced I2C master contained in the DWC HDMI. When connected
+ to a system I2C master this property contains a phandle to that I2C
+ master controller.
+
+ interrupts: true
+
+ phys:
+ maxItems: 1
+ description: The HDMI PHY
+
+ phy-names:
+ const: hdmi
+
+ pinctrl-0: true
+ pinctrl-1: true
+
+ pinctrl-names:
+ description:
+ The unwedge pinctrl entry shall drive the DDC SDA line low. This is
+ intended to work around a hardware errata that can cause the DDC I2C
+ bus to be wedged.
+ items:
+ - const: default
+ - const: unwedge
+
+ ports:
+ type: object
+ description: |
+ This device has one video port, corresponding to the input of the DWC
+ HDMI TX. Its connections are modelled using the OF graph bindings
+ specified in Documentation/devicetree/bindings/graph.txt.
+
+ properties:
+ port:
+ type: object
+ description: Input of the DWC HDMI TX
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ endpoint@0:
+ type: object
+ description: Connection to the VOPB
+
+ endpoint@1:
+ type: object
+ description: Connection to the VOPL
+
+ required:
+ - endpoint@0
+ - endpoint@1
+
+ additionalProperties: false
+
+ required:
+ - port
+
+ additionalProperties: false
+
+ rockchip,grf:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to the GRF to mux vopl/vopb.
+
+required:
+ - compatible
+ - reg
+ - reg-io-width
+ - clocks
+ - clock-names
+ - interrupts
+ - ports
+ - rockchip,grf
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3288-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ hdmi: hdmi@ff980000 {
+ compatible = "rockchip,rk3288-dw-hdmi";
+ reg = <0xff980000 0x20000>;
+ reg-io-width = <4>;
+ ddc-i2c-bus = <&i2c5>;
+ rockchip,grf = <&grf>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
+ clock-names = "iahb", "isfr";
+
+ ports {
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_hdmi>;
+ };
+ hdmi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_hdmi>;
+ };
+ };
+ };
+ };
+
+...
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
` (3 preceding siblings ...)
2020-04-05 23:39 ` [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: " Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-14 23:10 ` Rob Herring
2020-04-05 23:39 ` [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt Laurent Pinchart
2020-04-05 23:55 ` [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
6 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Replace the reference to the DWC HDMI text DT binding with a reference
to the YAML equivalent.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml
index 4d6795690ac3..2ab96051ce4f 100644
--- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml
+++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml
@@ -12,8 +12,8 @@ description: |
and CEC.
These DT bindings follow the Synopsys DWC HDMI TX bindings defined
- in Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with
- the following device-specific properties.
+ in bridge/synopsys,dw-hdmi.yaml with the following device-specific
+ properties.
maintainers:
- Chen-Yu Tsai <wens@csie.org>
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
` (4 preceding siblings ...)
2020-04-05 23:39 ` [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema Laurent Pinchart
@ 2020-04-05 23:39 ` Laurent Pinchart
2020-04-14 23:11 ` Rob Herring
2020-04-05 23:55 ` [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
6 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:39 UTC (permalink / raw)
To: devicetree
Cc: Sandy Huang, dri-devel, linux-renesas-soc, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
dw_hdmi.txt has been replaced with synopsys,dw-hdmi.yaml, and all
references to the old file have been converted. Remove it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
.../bindings/display/bridge/dw_hdmi.txt | 33 -------------------
1 file changed, 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
diff --git a/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt b/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
deleted file mode 100644
index 33bf981fbe33..000000000000
--- a/Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Synopsys DesignWare HDMI TX Encoder
-===================================
-
-This document defines device tree properties for the Synopsys DesignWare HDMI
-TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
-specification by itself but is meant to be referenced by platform-specific
-device tree bindings.
-
-When referenced from platform device tree bindings the properties defined in
-this document are defined as follows. The platform device tree bindings are
-responsible for defining whether each property is required or optional.
-
-- reg: Memory mapped base address and length of the DWC HDMI TX registers.
-
-- reg-io-width: Width of the registers specified by the reg property. The
- value is expressed in bytes and must be equal to 1 or 4 if specified. The
- register width defaults to 1 if the property is not present.
-
-- interrupts: Reference to the DWC HDMI TX interrupt.
-
-- clocks: References to all the clocks specified in the clock-names property
- as specified in Documentation/devicetree/bindings/clock/clock-bindings.txt.
-
-- clock-names: The DWC HDMI TX uses the following clocks.
-
- - "iahb" is the bus clock for either AHB and APB (mandatory).
- - "isfr" is the internal register configuration clock (mandatory).
- - "cec" is the HDMI CEC controller main clock (optional).
-
-- ports: The connectivity of the DWC HDMI TX with the rest of the system is
- expressed in using ports as specified in the device graph bindings defined
- in Documentation/devicetree/bindings/graph.txt. The numbering of the ports
- is platform-specific.
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
` (5 preceding siblings ...)
2020-04-05 23:39 ` [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt Laurent Pinchart
@ 2020-04-05 23:55 ` Laurent Pinchart
6 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-05 23:55 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Rob Herring, Maxime Ripard, Mark Yao
On Mon, Apr 06, 2020 at 02:39:29AM +0300, Laurent Pinchart wrote:
> Hello,
>
> This patch series attempts a conversion of the DWC HDMI TX DT bindings
> to YAML. I've marked it as RFC as the base schema doesn't work is
> intended in this (naive) approach, and I'm not sure how to fix it
> properly.
>
> The DWC HDMI TX is an HDMI transmitter IP core from Synopsys, integrated
> in various SoCs with different glue layers. As such, some properties are
> defined in a common document, but sometimes need to be overridden by
> platform-specific bindings.
>
> Patch 1/6 adds a base schema for the common properties, based on the
> existing dw_hdmi.txt document. Patches 2/6 to 4/6 then convert the
> platformspecific bindings for Renesas, NXP and Rockchip SoCs. Patch 5/6
> replaces the reference to dw_hdmi.txt in the Allwinner bindings with a
> reference to the YAML base schema, and patch 6/6 drops dw_hdmi.txt.
>
> My attempts at defining properties in the base schema, including it in
> the platform-specific schema with an allOf: $ref..., and overridding
> properties didn't work, as DT schemas don't define properties in a way
> that can be overridden, but instead define validation rules that are all
> considered. Both the rules in the base schema and in the
> platform-specific schemas are evaluated.
>
> One possible way around this would be to not pull in the whole base
> schema, but specific rules. This is however a bit cumbersome to use in
> my opinion. Is there a better way to achieve this ?
>
> I have volunteered Philipp Zabel and Mark Yao as maintainers for the
> i.MX6 and Rockchip bindings respectively. Please let me know if you
> would prefer a different maintainer, or ack the respective patch if this
> is fine with you.
Given that <mark.yao@rock-chips.com> bounced, I may already have an
answer to part of that question :-) I've CC'ed Mark's gmail address, as
well as Sandy and Heiko who maintain the Rockchip DRM driver.
> Laurent Pinchart (6):
> dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI
> dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
> dt-bindings: display: imx: hdmi: Convert binding to YAML
> dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
> dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML
> schema
> dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt
>
> .../display/allwinner,sun8i-a83t-dw-hdmi.yaml | 4 +-
> .../bindings/display/bridge/dw_hdmi.txt | 33 ----
> .../display/bridge/renesas,dw-hdmi.txt | 86 ---------
> .../display/bridge/renesas,dw-hdmi.yaml | 142 ++++++++++++++
> .../display/bridge/synopsys,dw-hdmi.yaml | 68 +++++++
> .../bindings/display/imx/fsl,imx6-hdmi.yaml | 143 ++++++++++++++
> .../devicetree/bindings/display/imx/hdmi.txt | 65 -------
> .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> 9 files changed, 533 insertions(+), 260 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
> delete mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
> create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> create mode 100644 Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
> create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6-hdmi.yaml
> delete mode 100644 Documentation/devicetree/bindings/display/imx/hdmi.txt
> delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI
2020-04-05 23:39 ` [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI Laurent Pinchart
@ 2020-04-06 7:50 ` Maxime Ripard
0 siblings, 0 replies; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 7:50 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 2203 bytes --]
Hi,
On Mon, Apr 06, 2020 at 02:39:30AM +0300, Laurent Pinchart wrote:
> Add a .yaml schema containing the common properties for the Synopsys
> DesignWare HDMI TX controller. This isn't a full device tree binding
> specification, but is meant to be referenced by platform-specific
> bindings for the IP core.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> .../display/bridge/synopsys,dw-hdmi.yaml | 68 +++++++++++++++++++
> 1 file changed, 68 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
> new file mode 100644
> index 000000000000..6ebb8f7d2ba8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Common Properties for Synopsys DesignWare HDMI TX Controller
> +
> +maintainers:
> + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> +
> +description: |
> + This document defines device tree properties for the Synopsys DesignWare HDMI
> + TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
> + binding specification by itself but is meant to be referenced by device tree
> + bindings for the platform-specific integrations of the DWC HDMI TX.
> +
> + When referenced from platform device tree bindings the properties defined in
> + this document are defined as follows. The platform device tree bindings are
> + responsible for defining whether each property is required or optional.
> +
> +properties:
> + reg:
> + maxItems: 1
> +
> + reg-io-width:
> + description:
> + Width (in bytes) of the registers specified by the reg property. The
> + register width defaults to 1 if the property is not present.
This is what default is here for ;)
Looks good otherwise.
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-05 23:39 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML Laurent Pinchart
@ 2020-04-06 7:57 ` Maxime Ripard
2020-04-06 11:28 ` Laurent Pinchart
2020-04-06 8:51 ` Geert Uytterhoeven
1 sibling, 1 reply; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 7:57 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Rob Herring, Mark Yao
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Hi,
On Mon, Apr 06, 2020 at 02:39:31AM +0300, Laurent Pinchart wrote:
> diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> new file mode 100644
> index 000000000000..9a543740c81d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas R-Car DWC HDMI TX Encoder
> +
> +maintainers:
> + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> +
> +description: |
> + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> + with a companion PHY IP.
> +
> +allOf:
> + - $ref: synopsys,dw-hdmi.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - renesas,r8a774a1-hdmi # for R8A774A1 (RZ/G2M) compatible HDMI TX
> + - renesas,r8a774b1-hdmi # for R8A774B1 (RZ/G2N) compatible HDMI TX
> + - renesas,r8a7795-hdmi # for R8A7795 (R-Car H3) compatible HDMI TX
> + - renesas,r8a7796-hdmi # for R8A7796 (R-Car M3-W) compatible HDMI TX
> + - renesas,r8a77965-hdmi # for R8A77965 (R-Car M3-N) compatible HDMI TX
> + - const: renesas,rcar-gen3-hdmi
> +
> + reg: true
> +
> + reg-io-width:
> + const: 1
> +
> + clocks:
> + minItems: 2
> + maxItems: 2
You don't need both, if one is missing the other will be filled by the
dt-schema tools. In this particular case, I guess maxItems would make
more sense.
> +
> + clock-names:
> + items:
> + - const: iahb
> + - const: isfr
> +
> + interrupts: true
> +
> + ports:
> + type: object
> + description: |
> + This device has three video ports. Their connections are modelled using the
> + OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> + Each port shall have a single endpoint.
> +
> + properties:
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + port@0:
> + type: object
> + description: Parallel RGB input port
> +
> + port@1:
> + type: object
> + description: HDMI output port
> +
> + port@2:
> + type: object
> + description: Sound input port
> +
> + required:
> + - port@0
> + - port@1
> + - port@2
> +
> + additionalProperties: false
> +
> + power-domains:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> + - ports
> +
> +additionalProperties: false
In the case where you have some kind of generic schema and then a more
specific one like you have here, unevaluatedProperties make more sense
that additionalProperties.
additionalProperties checks that there are no extra properties on the
current schema, which is a problem here since you have to duplicate
the entire list of properties found in the generic schema, while
unevaluatedProperties checks that there are no extra properties in the
entire set of all schemas that apply to this node.
This way, you can just put what is different from the generic schema,
and you don't have to keep it in sync.
It's a feature that has been added in the spec of the schemas that
went on right after the one we support in the tools, so for now the
kernel meta-schemas only allows that property to be there (just like
deprecated) but won't do anything.
This should be fixed quite soon however, the library we depend on
has started to work on that spec apparently.
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-05 23:39 ` [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: " Laurent Pinchart
@ 2020-04-06 8:00 ` Maxime Ripard
2020-04-06 11:19 ` Laurent Pinchart
0 siblings, 1 reply; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 8:00 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 6406 bytes --]
Hi,
On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> Convert the Rockchip HDMI TX text binding to YAML.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> 2 files changed, 178 insertions(+), 74 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> deleted file mode 100644
> index 3d32ce137e7f..000000000000
> --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> +++ /dev/null
> @@ -1,74 +0,0 @@
> -Rockchip DWC HDMI TX Encoder
> -============================
> -
> -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> -with a companion PHY IP.
> -
> -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> -following device-specific properties.
> -
> -
> -Required properties:
> -
> -- compatible: should be one of the following:
> - "rockchip,rk3228-dw-hdmi"
> - "rockchip,rk3288-dw-hdmi"
> - "rockchip,rk3328-dw-hdmi"
> - "rockchip,rk3399-dw-hdmi"
> -- reg: See dw_hdmi.txt.
> -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> -- interrupts: HDMI interrupt number
> -- clocks: See dw_hdmi.txt.
> -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> - corresponding to the video input of the controller. The port shall have two
> - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> -
> -Optional properties
> -
> -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> - or the functionally-reduced I2C master contained in the DWC HDMI. When
> - connected to a system I2C master this property contains a phandle to that
> - I2C master controller.
> -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> -- clock-names: May contain "grf", power for grf io.
> -- clock-names: May contain "vpll", external clock for some hdmi phy.
> -- phys: from general PHY binding: the phandle for the PHY device.
> -- phy-names: Should be "hdmi" if phys references an external phy.
> -
> -Optional pinctrl entry:
> -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> - i2c timeout. It's intended that this unwedge pinctrl entry will
> - cause the SDA line to be driven low to work around a hardware
> - errata.
> -
> -Example:
> -
> -hdmi: hdmi@ff980000 {
> - compatible = "rockchip,rk3288-dw-hdmi";
> - reg = <0xff980000 0x20000>;
> - reg-io-width = <4>;
> - ddc-i2c-bus = <&i2c5>;
> - rockchip,grf = <&grf>;
> - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> - clock-names = "iahb", "isfr";
> - ports {
> - hdmi_in: port {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - hdmi_in_vopb: endpoint@0 {
> - reg = <0>;
> - remote-endpoint = <&vopb_out_hdmi>;
> - };
> - hdmi_in_vopl: endpoint@1 {
> - reg = <1>;
> - remote-endpoint = <&vopl_out_hdmi>;
> - };
> - };
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> new file mode 100644
> index 000000000000..8ff544ae0ac2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> @@ -0,0 +1,178 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip DWC HDMI TX Encoder
> +
> +maintainers:
> + - Mark Yao <mark.yao@rock-chips.com>
> +
> +description: |
> + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> + with a companion PHY IP.
> +
> +allOf:
> + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,rk3228-dw-hdmi
> + - rockchip,rk3288-dw-hdmi
> + - rockchip,rk3328-dw-hdmi
> + - rockchip,rk3399-dw-hdmi
> +
> + reg: true
> +
> + reg-io-width:
> + const: 4
> +
> + clocks:
> + minItems: 2
> + maxItems: 5
> + items:
> + - description: The bus clock for either AHB and APB
> + - description: The internal register configuration clock
> + - description: The HDMI CEC controller main clock
> + - description: Power for GRF IO
> + - description: External clock for some HDMI PHY
> +
> + clock-names:
> + minItems: 2
> + maxItems: 5
> + items:
> + - const: iahb
> + - const: isfr
> + - enum:
> + - cec
> + - grf
> + - vpll
> + - enum:
> + - cec
> + - grf
> + - vpll
> + - enum:
> + - cec
> + - grf
> + - vpll
IIRC Rob wanted us to standardize the order of the clocks if possible,
since it's a pain to support properly here, and your description won't
match what you describe here either (and in general it's just a best
practice), so if all your DTs have the same order you should just set
that order in stone.
> + ddc-i2c-bus:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + The HDMI DDC bus can be connected to either a system I2C master or the
> + functionally-reduced I2C master contained in the DWC HDMI. When connected
> + to a system I2C master this property contains a phandle to that I2C
> + master controller.
> +
> + interrupts: true
> +
> + phys:
> + maxItems: 1
> + description: The HDMI PHY
> +
> + phy-names:
> + const: hdmi
> +
> + pinctrl-0: true
> + pinctrl-1: true
These two are already set by the tools on any schemas (up to
pinctrl-255 actually).
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-05 23:39 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML Laurent Pinchart
2020-04-06 7:57 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: " Maxime Ripard
@ 2020-04-06 8:51 ` Geert Uytterhoeven
1 sibling, 0 replies; 28+ messages in thread
From: Geert Uytterhoeven @ 2020-04-06 8:51 UTC (permalink / raw)
To: Laurent Pinchart
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Sandy Huang, DRI Development, Linux-Renesas, Chen-Yu Tsai,
Rob Herring, Maxime Ripard, Mark Yao
Hi Laurent,
On Mon, Apr 6, 2020 at 1:40 AM Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Convert the Renesas R-Car DWC HDMI TX text binding to YAML.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> +properties:
> + compatible:
> + items:
> + - enum:
> + - renesas,r8a774a1-hdmi # for R8A774A1 (RZ/G2M) compatible HDMI TX
> + - renesas,r8a774b1-hdmi # for R8A774B1 (RZ/G2N) compatible HDMI TX
> + - renesas,r8a7795-hdmi # for R8A7795 (R-Car H3) compatible HDMI TX
> + - renesas,r8a7796-hdmi # for R8A7796 (R-Car M3-W) compatible HDMI TX
R8A77960 (I know you don't support R8A77961 yet ;-)
> + - renesas,r8a77965-hdmi # for R8A77965 (R-Car M3-N) compatible HDMI TX
Wouldn't it be sufficient to just have the SoC name (e.g. "R-Car M3-N") in
the comments?
> + - const: renesas,rcar-gen3-hdmi
# R-Car Gen3 and RZ/G2
> +examples:
> + - |
> + #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/r8a7795-sysc.h>
> +
> + hdmi@fead0000 {
> + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
> + reg = <0 0xfead0000 0 0x10000>;
Examples are built with #{address,size}-cells = <1>.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-06 8:00 ` Maxime Ripard
@ 2020-04-06 11:19 ` Laurent Pinchart
2020-04-06 17:09 ` Maxime Ripard
0 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-06 11:19 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hi Maxime,
On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > Convert the Rockchip HDMI TX text binding to YAML.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > 2 files changed, 178 insertions(+), 74 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > deleted file mode 100644
> > index 3d32ce137e7f..000000000000
> > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > +++ /dev/null
> > @@ -1,74 +0,0 @@
> > -Rockchip DWC HDMI TX Encoder
> > -============================
> > -
> > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > -with a companion PHY IP.
> > -
> > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > -following device-specific properties.
> > -
> > -
> > -Required properties:
> > -
> > -- compatible: should be one of the following:
> > - "rockchip,rk3228-dw-hdmi"
> > - "rockchip,rk3288-dw-hdmi"
> > - "rockchip,rk3328-dw-hdmi"
> > - "rockchip,rk3399-dw-hdmi"
> > -- reg: See dw_hdmi.txt.
> > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > -- interrupts: HDMI interrupt number
> > -- clocks: See dw_hdmi.txt.
> > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > - corresponding to the video input of the controller. The port shall have two
> > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > -
> > -Optional properties
> > -
> > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > - connected to a system I2C master this property contains a phandle to that
> > - I2C master controller.
> > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > -- clock-names: May contain "grf", power for grf io.
> > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > -- phys: from general PHY binding: the phandle for the PHY device.
> > -- phy-names: Should be "hdmi" if phys references an external phy.
> > -
> > -Optional pinctrl entry:
> > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > - cause the SDA line to be driven low to work around a hardware
> > - errata.
> > -
> > -Example:
> > -
> > -hdmi: hdmi@ff980000 {
> > - compatible = "rockchip,rk3288-dw-hdmi";
> > - reg = <0xff980000 0x20000>;
> > - reg-io-width = <4>;
> > - ddc-i2c-bus = <&i2c5>;
> > - rockchip,grf = <&grf>;
> > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > - clock-names = "iahb", "isfr";
> > - ports {
> > - hdmi_in: port {
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > - hdmi_in_vopb: endpoint@0 {
> > - reg = <0>;
> > - remote-endpoint = <&vopb_out_hdmi>;
> > - };
> > - hdmi_in_vopl: endpoint@1 {
> > - reg = <1>;
> > - remote-endpoint = <&vopl_out_hdmi>;
> > - };
> > - };
> > - };
> > -};
> > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > new file mode 100644
> > index 000000000000..8ff544ae0ac2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > @@ -0,0 +1,178 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Rockchip DWC HDMI TX Encoder
> > +
> > +maintainers:
> > + - Mark Yao <mark.yao@rock-chips.com>
> > +
> > +description: |
> > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > + with a companion PHY IP.
> > +
> > +allOf:
> > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - rockchip,rk3228-dw-hdmi
> > + - rockchip,rk3288-dw-hdmi
> > + - rockchip,rk3328-dw-hdmi
> > + - rockchip,rk3399-dw-hdmi
> > +
> > + reg: true
> > +
> > + reg-io-width:
> > + const: 4
> > +
> > + clocks:
> > + minItems: 2
> > + maxItems: 5
> > + items:
> > + - description: The bus clock for either AHB and APB
> > + - description: The internal register configuration clock
> > + - description: The HDMI CEC controller main clock
> > + - description: Power for GRF IO
> > + - description: External clock for some HDMI PHY
> > +
> > + clock-names:
> > + minItems: 2
> > + maxItems: 5
> > + items:
> > + - const: iahb
> > + - const: isfr
> > + - enum:
> > + - cec
> > + - grf
> > + - vpll
> > + - enum:
> > + - cec
> > + - grf
> > + - vpll
> > + - enum:
> > + - cec
> > + - grf
> > + - vpll
>
> IIRC Rob wanted us to standardize the order of the clocks if possible,
> since it's a pain to support properly here, and your description won't
> match what you describe here either (and in general it's just a best
> practice), so if all your DTs have the same order you should just set
> that order in stone.
But how do we handle the case where any of the cec, grf and vpll clocks
can be set ? Assuming, for instance, that
clock-names = "iahb", "isfr", "cec";
clock-names = "iahb", "isfr", "vpll";
clock-names = "iahb", "isfr", "cec", "vpll";
would all be valid.
> > + ddc-i2c-bus:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description:
> > + The HDMI DDC bus can be connected to either a system I2C master or the
> > + functionally-reduced I2C master contained in the DWC HDMI. When connected
> > + to a system I2C master this property contains a phandle to that I2C
> > + master controller.
> > +
> > + interrupts: true
> > +
> > + phys:
> > + maxItems: 1
> > + description: The HDMI PHY
> > +
> > + phy-names:
> > + const: hdmi
> > +
> > + pinctrl-0: true
> > + pinctrl-1: true
>
> These two are already set by the tools on any schemas (up to
> pinctrl-255 actually).
Thank you for the information. I'll drop them.
--
Regards,
Laurent Pinchart
_______________________________________________
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-06 7:57 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: " Maxime Ripard
@ 2020-04-06 11:28 ` Laurent Pinchart
2020-04-06 11:32 ` Laurent Pinchart
2020-04-06 17:06 ` Maxime Ripard
0 siblings, 2 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-06 11:28 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hi Maxime,
On Mon, Apr 06, 2020 at 09:57:05AM +0200, Maxime Ripard wrote:
> On Mon, Apr 06, 2020 at 02:39:31AM +0300, Laurent Pinchart wrote:
> > diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> > new file mode 100644
> > index 000000000000..9a543740c81d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> > @@ -0,0 +1,142 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas R-Car DWC HDMI TX Encoder
> > +
> > +maintainers:
> > + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > +
> > +description: |
> > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > + with a companion PHY IP.
> > +
> > +allOf:
> > + - $ref: synopsys,dw-hdmi.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - renesas,r8a774a1-hdmi # for R8A774A1 (RZ/G2M) compatible HDMI TX
> > + - renesas,r8a774b1-hdmi # for R8A774B1 (RZ/G2N) compatible HDMI TX
> > + - renesas,r8a7795-hdmi # for R8A7795 (R-Car H3) compatible HDMI TX
> > + - renesas,r8a7796-hdmi # for R8A7796 (R-Car M3-W) compatible HDMI TX
> > + - renesas,r8a77965-hdmi # for R8A77965 (R-Car M3-N) compatible HDMI TX
> > + - const: renesas,rcar-gen3-hdmi
> > +
> > + reg: true
> > +
> > + reg-io-width:
> > + const: 1
> > +
> > + clocks:
> > + minItems: 2
> > + maxItems: 2
>
> You don't need both, if one is missing the other will be filled by the
> dt-schema tools. In this particular case, I guess maxItems would make
> more sense.
Fixed.
> > +
> > + clock-names:
> > + items:
> > + - const: iahb
> > + - const: isfr
> > +
> > + interrupts: true
> > +
> > + ports:
> > + type: object
> > + description: |
> > + This device has three video ports. Their connections are modelled using the
> > + OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> > + Each port shall have a single endpoint.
> > +
> > + properties:
> > + '#address-cells':
> > + const: 1
> > +
> > + '#size-cells':
> > + const: 0
> > +
> > + port@0:
> > + type: object
> > + description: Parallel RGB input port
> > +
> > + port@1:
> > + type: object
> > + description: HDMI output port
> > +
> > + port@2:
> > + type: object
> > + description: Sound input port
> > +
> > + required:
> > + - port@0
> > + - port@1
> > + - port@2
> > +
> > + additionalProperties: false
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > + - interrupts
> > + - ports
> > +
> > +additionalProperties: false
>
> In the case where you have some kind of generic schema and then a more
> specific one like you have here, unevaluatedProperties make more sense
> that additionalProperties.
>
> additionalProperties checks that there are no extra properties on the
> current schema, which is a problem here since you have to duplicate
> the entire list of properties found in the generic schema, while
> unevaluatedProperties checks that there are no extra properties in the
> entire set of all schemas that apply to this node.
>
> This way, you can just put what is different from the generic schema,
> and you don't have to keep it in sync.
>
> It's a feature that has been added in the spec of the schemas that
> went on right after the one we support in the tools, so for now the
> kernel meta-schemas only allows that property to be there (just like
> deprecated) but won't do anything.
>
> This should be fixed quite soon however, the library we depend on
> has started to work on that spec apparently.
Should I postpone this series until support for unevaluatedProperties is
available, to be able to test this ?
--
Regards,
Laurent Pinchart
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-06 11:28 ` Laurent Pinchart
@ 2020-04-06 11:32 ` Laurent Pinchart
2020-04-06 17:04 ` Maxime Ripard
2020-04-06 17:06 ` Maxime Ripard
1 sibling, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-06 11:32 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hallo again,
On Mon, Apr 06, 2020 at 02:28:57PM +0300, Laurent Pinchart wrote:
> On Mon, Apr 06, 2020 at 09:57:05AM +0200, Maxime Ripard wrote:
> > On Mon, Apr 06, 2020 at 02:39:31AM +0300, Laurent Pinchart wrote:
> > > diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> > > new file mode 100644
> > > index 000000000000..9a543740c81d
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
> > > @@ -0,0 +1,142 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Renesas R-Car DWC HDMI TX Encoder
> > > +
> > > +maintainers:
> > > + - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > +
> > > +description: |
> > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > + with a companion PHY IP.
> > > +
> > > +allOf:
> > > + - $ref: synopsys,dw-hdmi.yaml#
> > > +
> > > +properties:
> > > + compatible:
> > > + items:
> > > + - enum:
> > > + - renesas,r8a774a1-hdmi # for R8A774A1 (RZ/G2M) compatible HDMI TX
> > > + - renesas,r8a774b1-hdmi # for R8A774B1 (RZ/G2N) compatible HDMI TX
> > > + - renesas,r8a7795-hdmi # for R8A7795 (R-Car H3) compatible HDMI TX
> > > + - renesas,r8a7796-hdmi # for R8A7796 (R-Car M3-W) compatible HDMI TX
> > > + - renesas,r8a77965-hdmi # for R8A77965 (R-Car M3-N) compatible HDMI TX
> > > + - const: renesas,rcar-gen3-hdmi
> > > +
> > > + reg: true
> > > +
> > > + reg-io-width:
> > > + const: 1
> > > +
> > > + clocks:
> > > + minItems: 2
> > > + maxItems: 2
> >
> > You don't need both, if one is missing the other will be filled by the
> > dt-schema tools. In this particular case, I guess maxItems would make
> > more sense.
>
> Fixed.
>
> > > +
> > > + clock-names:
> > > + items:
> > > + - const: iahb
> > > + - const: isfr
> > > +
> > > + interrupts: true
> > > +
> > > + ports:
> > > + type: object
> > > + description: |
> > > + This device has three video ports. Their connections are modelled using the
> > > + OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> > > + Each port shall have a single endpoint.
> > > +
> > > + properties:
> > > + '#address-cells':
> > > + const: 1
> > > +
> > > + '#size-cells':
> > > + const: 0
> > > +
> > > + port@0:
> > > + type: object
> > > + description: Parallel RGB input port
> > > +
> > > + port@1:
> > > + type: object
> > > + description: HDMI output port
> > > +
> > > + port@2:
> > > + type: object
> > > + description: Sound input port
> > > +
> > > + required:
> > > + - port@0
> > > + - port@1
> > > + - port@2
> > > +
> > > + additionalProperties: false
Would it also make sense to use unevaluatedProperties here, and drop
#address-cells and #size-cells above as they're already evaluated in
synopsys,dw-hdmi.yaml ?
> > > +
> > > + power-domains:
> > > + maxItems: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - clocks
> > > + - clock-names
> > > + - interrupts
> > > + - ports
> > > +
> > > +additionalProperties: false
> >
> > In the case where you have some kind of generic schema and then a more
> > specific one like you have here, unevaluatedProperties make more sense
> > that additionalProperties.
> >
> > additionalProperties checks that there are no extra properties on the
> > current schema, which is a problem here since you have to duplicate
> > the entire list of properties found in the generic schema, while
> > unevaluatedProperties checks that there are no extra properties in the
> > entire set of all schemas that apply to this node.
> >
> > This way, you can just put what is different from the generic schema,
> > and you don't have to keep it in sync.
> >
> > It's a feature that has been added in the spec of the schemas that
> > went on right after the one we support in the tools, so for now the
> > kernel meta-schemas only allows that property to be there (just like
> > deprecated) but won't do anything.
> >
> > This should be fixed quite soon however, the library we depend on
> > has started to work on that spec apparently.
>
> Should I postpone this series until support for unevaluatedProperties is
> available, to be able to test this ?
Also, to make sure I understand this correctly, does it mean I can drop
"reg: true" and "interrupts: true" ?
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-06 11:32 ` Laurent Pinchart
@ 2020-04-06 17:04 ` Maxime Ripard
0 siblings, 0 replies; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 17:04 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 2967 bytes --]
On Mon, Apr 06, 2020 at 02:32:47PM +0300, Laurent Pinchart wrote:
> > > > +
> > > > + clock-names:
> > > > + items:
> > > > + - const: iahb
> > > > + - const: isfr
> > > > +
> > > > + interrupts: true
> > > > +
> > > > + ports:
> > > > + type: object
> > > > + description: |
> > > > + This device has three video ports. Their connections are modelled using the
> > > > + OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> > > > + Each port shall have a single endpoint.
> > > > +
> > > > + properties:
> > > > + '#address-cells':
> > > > + const: 1
> > > > +
> > > > + '#size-cells':
> > > > + const: 0
> > > > +
> > > > + port@0:
> > > > + type: object
> > > > + description: Parallel RGB input port
> > > > +
> > > > + port@1:
> > > > + type: object
> > > > + description: HDMI output port
> > > > +
> > > > + port@2:
> > > > + type: object
> > > > + description: Sound input port
> > > > +
> > > > + required:
> > > > + - port@0
> > > > + - port@1
> > > > + - port@2
> > > > +
> > > > + additionalProperties: false
>
> Would it also make sense to use unevaluatedProperties here, and drop
> #address-cells and #size-cells above as they're already evaluated in
> synopsys,dw-hdmi.yaml ?
Yup :)
> > > > +
> > > > + power-domains:
> > > > + maxItems: 1
> > > > +
> > > > +required:
> > > > + - compatible
> > > > + - reg
> > > > + - clocks
> > > > + - clock-names
> > > > + - interrupts
> > > > + - ports
> > > > +
> > > > +additionalProperties: false
> > >
> > > In the case where you have some kind of generic schema and then a more
> > > specific one like you have here, unevaluatedProperties make more sense
> > > that additionalProperties.
> > >
> > > additionalProperties checks that there are no extra properties on the
> > > current schema, which is a problem here since you have to duplicate
> > > the entire list of properties found in the generic schema, while
> > > unevaluatedProperties checks that there are no extra properties in the
> > > entire set of all schemas that apply to this node.
> > >
> > > This way, you can just put what is different from the generic schema,
> > > and you don't have to keep it in sync.
> > >
> > > It's a feature that has been added in the spec of the schemas that
> > > went on right after the one we support in the tools, so for now the
> > > kernel meta-schemas only allows that property to be there (just like
> > > deprecated) but won't do anything.
> > >
> > > This should be fixed quite soon however, the library we depend on
> > > has started to work on that spec apparently.
> >
> > Should I postpone this series until support for unevaluatedProperties is
> > available, to be able to test this ?
>
> Also, to make sure I understand this correctly, does it mean I can drop
> "reg: true" and "interrupts: true" ?
Ditto :)
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: Convert binding to YAML
2020-04-06 11:28 ` Laurent Pinchart
2020-04-06 11:32 ` Laurent Pinchart
@ 2020-04-06 17:06 ` Maxime Ripard
1 sibling, 0 replies; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 17:06 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 2703 bytes --]
On Mon, Apr 06, 2020 at 02:28:56PM +0300, Laurent Pinchart wrote:
> > > +
> > > + clock-names:
> > > + items:
> > > + - const: iahb
> > > + - const: isfr
> > > +
> > > + interrupts: true
> > > +
> > > + ports:
> > > + type: object
> > > + description: |
> > > + This device has three video ports. Their connections are modelled using the
> > > + OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> > > + Each port shall have a single endpoint.
> > > +
> > > + properties:
> > > + '#address-cells':
> > > + const: 1
> > > +
> > > + '#size-cells':
> > > + const: 0
> > > +
> > > + port@0:
> > > + type: object
> > > + description: Parallel RGB input port
> > > +
> > > + port@1:
> > > + type: object
> > > + description: HDMI output port
> > > +
> > > + port@2:
> > > + type: object
> > > + description: Sound input port
> > > +
> > > + required:
> > > + - port@0
> > > + - port@1
> > > + - port@2
> > > +
> > > + additionalProperties: false
> > > +
> > > + power-domains:
> > > + maxItems: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> > > + - clocks
> > > + - clock-names
> > > + - interrupts
> > > + - ports
> > > +
> > > +additionalProperties: false
> >
> > In the case where you have some kind of generic schema and then a more
> > specific one like you have here, unevaluatedProperties make more sense
> > that additionalProperties.
> >
> > additionalProperties checks that there are no extra properties on the
> > current schema, which is a problem here since you have to duplicate
> > the entire list of properties found in the generic schema, while
> > unevaluatedProperties checks that there are no extra properties in the
> > entire set of all schemas that apply to this node.
> >
> > This way, you can just put what is different from the generic schema,
> > and you don't have to keep it in sync.
> >
> > It's a feature that has been added in the spec of the schemas that
> > went on right after the one we support in the tools, so for now the
> > kernel meta-schemas only allows that property to be there (just like
> > deprecated) but won't do anything.
> >
> > This should be fixed quite soon however, the library we depend on
> > has started to work on that spec apparently.
>
> Should I postpone this series until support for unevaluatedProperties is
> available, to be able to test this ?
There's no need to wait, just put it in and it will eventually be
checked. And the time between now and then won't be worse than the
current situation of not checking anything at all anyway :)
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-06 11:19 ` Laurent Pinchart
@ 2020-04-06 17:09 ` Maxime Ripard
2020-04-06 17:50 ` Laurent Pinchart
0 siblings, 1 reply; 28+ messages in thread
From: Maxime Ripard @ 2020-04-06 17:09 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 7319 bytes --]
On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > Convert the Rockchip HDMI TX text binding to YAML.
> > >
> > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > ---
> > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > deleted file mode 100644
> > > index 3d32ce137e7f..000000000000
> > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > +++ /dev/null
> > > @@ -1,74 +0,0 @@
> > > -Rockchip DWC HDMI TX Encoder
> > > -============================
> > > -
> > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > -with a companion PHY IP.
> > > -
> > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > -following device-specific properties.
> > > -
> > > -
> > > -Required properties:
> > > -
> > > -- compatible: should be one of the following:
> > > - "rockchip,rk3228-dw-hdmi"
> > > - "rockchip,rk3288-dw-hdmi"
> > > - "rockchip,rk3328-dw-hdmi"
> > > - "rockchip,rk3399-dw-hdmi"
> > > -- reg: See dw_hdmi.txt.
> > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > -- interrupts: HDMI interrupt number
> > > -- clocks: See dw_hdmi.txt.
> > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > - corresponding to the video input of the controller. The port shall have two
> > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > -
> > > -Optional properties
> > > -
> > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > - connected to a system I2C master this property contains a phandle to that
> > > - I2C master controller.
> > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > -- clock-names: May contain "grf", power for grf io.
> > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > -
> > > -Optional pinctrl entry:
> > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > - cause the SDA line to be driven low to work around a hardware
> > > - errata.
> > > -
> > > -Example:
> > > -
> > > -hdmi: hdmi@ff980000 {
> > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > - reg = <0xff980000 0x20000>;
> > > - reg-io-width = <4>;
> > > - ddc-i2c-bus = <&i2c5>;
> > > - rockchip,grf = <&grf>;
> > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > - clock-names = "iahb", "isfr";
> > > - ports {
> > > - hdmi_in: port {
> > > - #address-cells = <1>;
> > > - #size-cells = <0>;
> > > - hdmi_in_vopb: endpoint@0 {
> > > - reg = <0>;
> > > - remote-endpoint = <&vopb_out_hdmi>;
> > > - };
> > > - hdmi_in_vopl: endpoint@1 {
> > > - reg = <1>;
> > > - remote-endpoint = <&vopl_out_hdmi>;
> > > - };
> > > - };
> > > - };
> > > -};
> > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > new file mode 100644
> > > index 000000000000..8ff544ae0ac2
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > @@ -0,0 +1,178 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Rockchip DWC HDMI TX Encoder
> > > +
> > > +maintainers:
> > > + - Mark Yao <mark.yao@rock-chips.com>
> > > +
> > > +description: |
> > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > + with a companion PHY IP.
> > > +
> > > +allOf:
> > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > +
> > > +properties:
> > > + compatible:
> > > + enum:
> > > + - rockchip,rk3228-dw-hdmi
> > > + - rockchip,rk3288-dw-hdmi
> > > + - rockchip,rk3328-dw-hdmi
> > > + - rockchip,rk3399-dw-hdmi
> > > +
> > > + reg: true
> > > +
> > > + reg-io-width:
> > > + const: 4
> > > +
> > > + clocks:
> > > + minItems: 2
> > > + maxItems: 5
> > > + items:
> > > + - description: The bus clock for either AHB and APB
> > > + - description: The internal register configuration clock
> > > + - description: The HDMI CEC controller main clock
> > > + - description: Power for GRF IO
> > > + - description: External clock for some HDMI PHY
> > > +
> > > + clock-names:
> > > + minItems: 2
> > > + maxItems: 5
> > > + items:
> > > + - const: iahb
> > > + - const: isfr
> > > + - enum:
> > > + - cec
> > > + - grf
> > > + - vpll
> > > + - enum:
> > > + - cec
> > > + - grf
> > > + - vpll
> > > + - enum:
> > > + - cec
> > > + - grf
> > > + - vpll
> >
> > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > since it's a pain to support properly here, and your description won't
> > match what you describe here either (and in general it's just a best
> > practice), so if all your DTs have the same order you should just set
> > that order in stone.
>
> But how do we handle the case where any of the cec, grf and vpll clocks
> can be set ? Assuming, for instance, that
>
> clock-names = "iahb", "isfr", "cec";
> clock-names = "iahb", "isfr", "vpll";
> clock-names = "iahb", "isfr", "cec", "vpll";
>
> would all be valid.
It would be painful then...
The easiest way to do so would be to simply use an enum there, and not
bother checking the array at all. You'll get a warning if there's
multiple occurences of the same string, and I guess that's what you
would be really concerned about.
However, now that I think about it, what's the interaction between the
generic binding and this one when it comes to the third clock? The
generic one expects it to be cec, and here you have other options?
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-06 17:09 ` Maxime Ripard
@ 2020-04-06 17:50 ` Laurent Pinchart
2020-04-07 7:12 ` Maxime Ripard
0 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-06 17:50 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hi Maxime,
On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > > Convert the Rockchip HDMI TX text binding to YAML.
> > > >
> > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > ---
> > > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > deleted file mode 100644
> > > > index 3d32ce137e7f..000000000000
> > > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > +++ /dev/null
> > > > @@ -1,74 +0,0 @@
> > > > -Rockchip DWC HDMI TX Encoder
> > > > -============================
> > > > -
> > > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > -with a companion PHY IP.
> > > > -
> > > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > > -following device-specific properties.
> > > > -
> > > > -
> > > > -Required properties:
> > > > -
> > > > -- compatible: should be one of the following:
> > > > - "rockchip,rk3228-dw-hdmi"
> > > > - "rockchip,rk3288-dw-hdmi"
> > > > - "rockchip,rk3328-dw-hdmi"
> > > > - "rockchip,rk3399-dw-hdmi"
> > > > -- reg: See dw_hdmi.txt.
> > > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > > -- interrupts: HDMI interrupt number
> > > > -- clocks: See dw_hdmi.txt.
> > > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > > - corresponding to the video input of the controller. The port shall have two
> > > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > > -
> > > > -Optional properties
> > > > -
> > > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > > - connected to a system I2C master this property contains a phandle to that
> > > > - I2C master controller.
> > > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > > -- clock-names: May contain "grf", power for grf io.
> > > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > > -
> > > > -Optional pinctrl entry:
> > > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > > - cause the SDA line to be driven low to work around a hardware
> > > > - errata.
> > > > -
> > > > -Example:
> > > > -
> > > > -hdmi: hdmi@ff980000 {
> > > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > > - reg = <0xff980000 0x20000>;
> > > > - reg-io-width = <4>;
> > > > - ddc-i2c-bus = <&i2c5>;
> > > > - rockchip,grf = <&grf>;
> > > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > > - clock-names = "iahb", "isfr";
> > > > - ports {
> > > > - hdmi_in: port {
> > > > - #address-cells = <1>;
> > > > - #size-cells = <0>;
> > > > - hdmi_in_vopb: endpoint@0 {
> > > > - reg = <0>;
> > > > - remote-endpoint = <&vopb_out_hdmi>;
> > > > - };
> > > > - hdmi_in_vopl: endpoint@1 {
> > > > - reg = <1>;
> > > > - remote-endpoint = <&vopl_out_hdmi>;
> > > > - };
> > > > - };
> > > > - };
> > > > -};
> > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > new file mode 100644
> > > > index 000000000000..8ff544ae0ac2
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > @@ -0,0 +1,178 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Rockchip DWC HDMI TX Encoder
> > > > +
> > > > +maintainers:
> > > > + - Mark Yao <mark.yao@rock-chips.com>
> > > > +
> > > > +description: |
> > > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > + with a companion PHY IP.
> > > > +
> > > > +allOf:
> > > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > > +
> > > > +properties:
> > > > + compatible:
> > > > + enum:
> > > > + - rockchip,rk3228-dw-hdmi
> > > > + - rockchip,rk3288-dw-hdmi
> > > > + - rockchip,rk3328-dw-hdmi
> > > > + - rockchip,rk3399-dw-hdmi
> > > > +
> > > > + reg: true
> > > > +
> > > > + reg-io-width:
> > > > + const: 4
> > > > +
> > > > + clocks:
> > > > + minItems: 2
> > > > + maxItems: 5
> > > > + items:
> > > > + - description: The bus clock for either AHB and APB
> > > > + - description: The internal register configuration clock
> > > > + - description: The HDMI CEC controller main clock
> > > > + - description: Power for GRF IO
> > > > + - description: External clock for some HDMI PHY
> > > > +
> > > > + clock-names:
> > > > + minItems: 2
> > > > + maxItems: 5
> > > > + items:
> > > > + - const: iahb
> > > > + - const: isfr
> > > > + - enum:
> > > > + - cec
> > > > + - grf
> > > > + - vpll
> > > > + - enum:
> > > > + - cec
> > > > + - grf
> > > > + - vpll
> > > > + - enum:
> > > > + - cec
> > > > + - grf
> > > > + - vpll
> > >
> > > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > > since it's a pain to support properly here, and your description won't
> > > match what you describe here either (and in general it's just a best
> > > practice), so if all your DTs have the same order you should just set
> > > that order in stone.
> >
> > But how do we handle the case where any of the cec, grf and vpll clocks
> > can be set ? Assuming, for instance, that
> >
> > clock-names = "iahb", "isfr", "cec";
> > clock-names = "iahb", "isfr", "vpll";
> > clock-names = "iahb", "isfr", "cec", "vpll";
> >
> > would all be valid.
>
> It would be painful then...
>
> The easiest way to do so would be to simply use an enum there, and not
> bother checking the array at all. You'll get a warning if there's
> multiple occurences of the same string, and I guess that's what you
> would be really concerned about.
>
> However, now that I think about it, what's the interaction between the
> generic binding and this one when it comes to the third clock? The
> generic one expects it to be cec, and here you have other options?
I'm not too familiar with the platform, but as far as I understand, any
of the cec, grf and vpll clock is optional (if someone could confirm
that, it would be useful). I don't care so much about the order, but
iahb and isfr are mandatory, and thus need to be specified as two const
items in the beginning as far as I understand. It would be nice to set
something along the lines of
minItems: 2
maxItems: 5
items:
- const: iahb
- const: isfr
- enum:
- cec
- grf
- vpll
and have the enum automatically span the last three slots of the items.
I understand this isn't possible, but an equivalent compact would to do
so would be useful.
As for the base schema, it expects three clocks only, so
clock-names = "iahb", "isfr", "vpll";
won't validate. I can't think of a way around that other than pulling
constraints selectively from the base schema, or just not specifying it
in the base schema at all.
--
Regards,
Laurent Pinchart
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dri-devel@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-06 17:50 ` Laurent Pinchart
@ 2020-04-07 7:12 ` Maxime Ripard
2020-04-08 11:45 ` Laurent Pinchart
0 siblings, 1 reply; 28+ messages in thread
From: Maxime Ripard @ 2020-04-07 7:12 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 9439 bytes --]
On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> > On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > > On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > > > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > > > Convert the Rockchip HDMI TX text binding to YAML.
> > > > >
> > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > > ---
> > > > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > deleted file mode 100644
> > > > > index 3d32ce137e7f..000000000000
> > > > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > +++ /dev/null
> > > > > @@ -1,74 +0,0 @@
> > > > > -Rockchip DWC HDMI TX Encoder
> > > > > -============================
> > > > > -
> > > > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > -with a companion PHY IP.
> > > > > -
> > > > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > > > -following device-specific properties.
> > > > > -
> > > > > -
> > > > > -Required properties:
> > > > > -
> > > > > -- compatible: should be one of the following:
> > > > > - "rockchip,rk3228-dw-hdmi"
> > > > > - "rockchip,rk3288-dw-hdmi"
> > > > > - "rockchip,rk3328-dw-hdmi"
> > > > > - "rockchip,rk3399-dw-hdmi"
> > > > > -- reg: See dw_hdmi.txt.
> > > > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > > > -- interrupts: HDMI interrupt number
> > > > > -- clocks: See dw_hdmi.txt.
> > > > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > > > - corresponding to the video input of the controller. The port shall have two
> > > > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > > > -
> > > > > -Optional properties
> > > > > -
> > > > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > > > - connected to a system I2C master this property contains a phandle to that
> > > > > - I2C master controller.
> > > > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > > > -- clock-names: May contain "grf", power for grf io.
> > > > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > > > -
> > > > > -Optional pinctrl entry:
> > > > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > > > - cause the SDA line to be driven low to work around a hardware
> > > > > - errata.
> > > > > -
> > > > > -Example:
> > > > > -
> > > > > -hdmi: hdmi@ff980000 {
> > > > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > > > - reg = <0xff980000 0x20000>;
> > > > > - reg-io-width = <4>;
> > > > > - ddc-i2c-bus = <&i2c5>;
> > > > > - rockchip,grf = <&grf>;
> > > > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > > > - clock-names = "iahb", "isfr";
> > > > > - ports {
> > > > > - hdmi_in: port {
> > > > > - #address-cells = <1>;
> > > > > - #size-cells = <0>;
> > > > > - hdmi_in_vopb: endpoint@0 {
> > > > > - reg = <0>;
> > > > > - remote-endpoint = <&vopb_out_hdmi>;
> > > > > - };
> > > > > - hdmi_in_vopl: endpoint@1 {
> > > > > - reg = <1>;
> > > > > - remote-endpoint = <&vopl_out_hdmi>;
> > > > > - };
> > > > > - };
> > > > > - };
> > > > > -};
> > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > new file mode 100644
> > > > > index 000000000000..8ff544ae0ac2
> > > > > --- /dev/null
> > > > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > @@ -0,0 +1,178 @@
> > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > +%YAML 1.2
> > > > > +---
> > > > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > +
> > > > > +title: Rockchip DWC HDMI TX Encoder
> > > > > +
> > > > > +maintainers:
> > > > > + - Mark Yao <mark.yao@rock-chips.com>
> > > > > +
> > > > > +description: |
> > > > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > + with a companion PHY IP.
> > > > > +
> > > > > +allOf:
> > > > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > > > +
> > > > > +properties:
> > > > > + compatible:
> > > > > + enum:
> > > > > + - rockchip,rk3228-dw-hdmi
> > > > > + - rockchip,rk3288-dw-hdmi
> > > > > + - rockchip,rk3328-dw-hdmi
> > > > > + - rockchip,rk3399-dw-hdmi
> > > > > +
> > > > > + reg: true
> > > > > +
> > > > > + reg-io-width:
> > > > > + const: 4
> > > > > +
> > > > > + clocks:
> > > > > + minItems: 2
> > > > > + maxItems: 5
> > > > > + items:
> > > > > + - description: The bus clock for either AHB and APB
> > > > > + - description: The internal register configuration clock
> > > > > + - description: The HDMI CEC controller main clock
> > > > > + - description: Power for GRF IO
> > > > > + - description: External clock for some HDMI PHY
> > > > > +
> > > > > + clock-names:
> > > > > + minItems: 2
> > > > > + maxItems: 5
> > > > > + items:
> > > > > + - const: iahb
> > > > > + - const: isfr
> > > > > + - enum:
> > > > > + - cec
> > > > > + - grf
> > > > > + - vpll
> > > > > + - enum:
> > > > > + - cec
> > > > > + - grf
> > > > > + - vpll
> > > > > + - enum:
> > > > > + - cec
> > > > > + - grf
> > > > > + - vpll
> > > >
> > > > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > > > since it's a pain to support properly here, and your description won't
> > > > match what you describe here either (and in general it's just a best
> > > > practice), so if all your DTs have the same order you should just set
> > > > that order in stone.
> > >
> > > But how do we handle the case where any of the cec, grf and vpll clocks
> > > can be set ? Assuming, for instance, that
> > >
> > > clock-names = "iahb", "isfr", "cec";
> > > clock-names = "iahb", "isfr", "vpll";
> > > clock-names = "iahb", "isfr", "cec", "vpll";
> > >
> > > would all be valid.
> >
> > It would be painful then...
> >
> > The easiest way to do so would be to simply use an enum there, and not
> > bother checking the array at all. You'll get a warning if there's
> > multiple occurences of the same string, and I guess that's what you
> > would be really concerned about.
> >
> > However, now that I think about it, what's the interaction between the
> > generic binding and this one when it comes to the third clock? The
> > generic one expects it to be cec, and here you have other options?
>
> I'm not too familiar with the platform, but as far as I understand, any
> of the cec, grf and vpll clock is optional (if someone could confirm
> that, it would be useful). I don't care so much about the order, but
> iahb and isfr are mandatory, and thus need to be specified as two const
> items in the beginning as far as I understand. It would be nice to set
> something along the lines of
>
> minItems: 2
> maxItems: 5
> items:
> - const: iahb
> - const: isfr
> - enum:
> - cec
> - grf
> - vpll
I guess you could do something like:
in the generic schema:
clock-names:
allOf:
- minItems: 2
- enum:
- iahb
- isfr
- cec
additonalItems: true
- items:
- iahb
- isfr
Or something along those lines, I haven't tested it, but the basic
idea is that you want to enforce that:
a) there's a minimum of two clocks
b) valid clock names are iahb, isfr and cec, but we will allow more
c) the first two clocks are iahb and isfr
Now, on the rockchip binding, we can simply have:
clock-names:
enum:
- iahb
- isfr
- cec
- grf
- vpll
This way, here we enforce the available clock names, while keeping the
constraints set in the generic binding.
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-07 7:12 ` Maxime Ripard
@ 2020-04-08 11:45 ` Laurent Pinchart
2020-04-08 12:25 ` Maxime Ripard
2020-04-14 23:10 ` Rob Herring
0 siblings, 2 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-08 11:45 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hi Maxime,
On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> > On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> > > On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > > > On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > > > > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > > > > Convert the Rockchip HDMI TX text binding to YAML.
> > > > > >
> > > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > > > ---
> > > > > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > > > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > > > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > > > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > >
> > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > deleted file mode 100644
> > > > > > index 3d32ce137e7f..000000000000
> > > > > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > +++ /dev/null
> > > > > > @@ -1,74 +0,0 @@
> > > > > > -Rockchip DWC HDMI TX Encoder
> > > > > > -============================
> > > > > > -
> > > > > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > -with a companion PHY IP.
> > > > > > -
> > > > > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > > > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > > > > -following device-specific properties.
> > > > > > -
> > > > > > -
> > > > > > -Required properties:
> > > > > > -
> > > > > > -- compatible: should be one of the following:
> > > > > > - "rockchip,rk3228-dw-hdmi"
> > > > > > - "rockchip,rk3288-dw-hdmi"
> > > > > > - "rockchip,rk3328-dw-hdmi"
> > > > > > - "rockchip,rk3399-dw-hdmi"
> > > > > > -- reg: See dw_hdmi.txt.
> > > > > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > > > > -- interrupts: HDMI interrupt number
> > > > > > -- clocks: See dw_hdmi.txt.
> > > > > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > > > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > > > > - corresponding to the video input of the controller. The port shall have two
> > > > > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > > > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > > > > -
> > > > > > -Optional properties
> > > > > > -
> > > > > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > > > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > > > > - connected to a system I2C master this property contains a phandle to that
> > > > > > - I2C master controller.
> > > > > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > > > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > > > > -- clock-names: May contain "grf", power for grf io.
> > > > > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > > > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > > > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > > > > -
> > > > > > -Optional pinctrl entry:
> > > > > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > > > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > > > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > > > > - cause the SDA line to be driven low to work around a hardware
> > > > > > - errata.
> > > > > > -
> > > > > > -Example:
> > > > > > -
> > > > > > -hdmi: hdmi@ff980000 {
> > > > > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > > > > - reg = <0xff980000 0x20000>;
> > > > > > - reg-io-width = <4>;
> > > > > > - ddc-i2c-bus = <&i2c5>;
> > > > > > - rockchip,grf = <&grf>;
> > > > > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > > > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > > > > - clock-names = "iahb", "isfr";
> > > > > > - ports {
> > > > > > - hdmi_in: port {
> > > > > > - #address-cells = <1>;
> > > > > > - #size-cells = <0>;
> > > > > > - hdmi_in_vopb: endpoint@0 {
> > > > > > - reg = <0>;
> > > > > > - remote-endpoint = <&vopb_out_hdmi>;
> > > > > > - };
> > > > > > - hdmi_in_vopl: endpoint@1 {
> > > > > > - reg = <1>;
> > > > > > - remote-endpoint = <&vopl_out_hdmi>;
> > > > > > - };
> > > > > > - };
> > > > > > - };
> > > > > > -};
> > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > new file mode 100644
> > > > > > index 000000000000..8ff544ae0ac2
> > > > > > --- /dev/null
> > > > > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > @@ -0,0 +1,178 @@
> > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > > +%YAML 1.2
> > > > > > +---
> > > > > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > > +
> > > > > > +title: Rockchip DWC HDMI TX Encoder
> > > > > > +
> > > > > > +maintainers:
> > > > > > + - Mark Yao <mark.yao@rock-chips.com>
> > > > > > +
> > > > > > +description: |
> > > > > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > + with a companion PHY IP.
> > > > > > +
> > > > > > +allOf:
> > > > > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > > > > +
> > > > > > +properties:
> > > > > > + compatible:
> > > > > > + enum:
> > > > > > + - rockchip,rk3228-dw-hdmi
> > > > > > + - rockchip,rk3288-dw-hdmi
> > > > > > + - rockchip,rk3328-dw-hdmi
> > > > > > + - rockchip,rk3399-dw-hdmi
> > > > > > +
> > > > > > + reg: true
> > > > > > +
> > > > > > + reg-io-width:
> > > > > > + const: 4
> > > > > > +
> > > > > > + clocks:
> > > > > > + minItems: 2
> > > > > > + maxItems: 5
> > > > > > + items:
> > > > > > + - description: The bus clock for either AHB and APB
> > > > > > + - description: The internal register configuration clock
> > > > > > + - description: The HDMI CEC controller main clock
> > > > > > + - description: Power for GRF IO
> > > > > > + - description: External clock for some HDMI PHY
> > > > > > +
> > > > > > + clock-names:
> > > > > > + minItems: 2
> > > > > > + maxItems: 5
> > > > > > + items:
> > > > > > + - const: iahb
> > > > > > + - const: isfr
> > > > > > + - enum:
> > > > > > + - cec
> > > > > > + - grf
> > > > > > + - vpll
> > > > > > + - enum:
> > > > > > + - cec
> > > > > > + - grf
> > > > > > + - vpll
> > > > > > + - enum:
> > > > > > + - cec
> > > > > > + - grf
> > > > > > + - vpll
> > > > >
> > > > > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > > > > since it's a pain to support properly here, and your description won't
> > > > > match what you describe here either (and in general it's just a best
> > > > > practice), so if all your DTs have the same order you should just set
> > > > > that order in stone.
> > > >
> > > > But how do we handle the case where any of the cec, grf and vpll clocks
> > > > can be set ? Assuming, for instance, that
> > > >
> > > > clock-names = "iahb", "isfr", "cec";
> > > > clock-names = "iahb", "isfr", "vpll";
> > > > clock-names = "iahb", "isfr", "cec", "vpll";
> > > >
> > > > would all be valid.
> > >
> > > It would be painful then...
> > >
> > > The easiest way to do so would be to simply use an enum there, and not
> > > bother checking the array at all. You'll get a warning if there's
> > > multiple occurences of the same string, and I guess that's what you
> > > would be really concerned about.
> > >
> > > However, now that I think about it, what's the interaction between the
> > > generic binding and this one when it comes to the third clock? The
> > > generic one expects it to be cec, and here you have other options?
> >
> > I'm not too familiar with the platform, but as far as I understand, any
> > of the cec, grf and vpll clock is optional (if someone could confirm
> > that, it would be useful). I don't care so much about the order, but
> > iahb and isfr are mandatory, and thus need to be specified as two const
> > items in the beginning as far as I understand. It would be nice to set
> > something along the lines of
> >
> > minItems: 2
> > maxItems: 5
> > items:
> > - const: iahb
> > - const: isfr
> > - enum:
> > - cec
> > - grf
> > - vpll
>
> I guess you could do something like:
>
> in the generic schema:
>
> clock-names:
> allOf:
> - minItems: 2
> - enum:
> - iahb
> - isfr
> - cec
> additonalItems: true
> - items:
> - iahb
> - isfr
>
> Or something along those lines, I haven't tested it, but the basic
> idea is that you want to enforce that:
> a) there's a minimum of two clocks
> b) valid clock names are iahb, isfr and cec, but we will allow more
> c) the first two clocks are iahb and isfr
Interesting idea. I've tried
clock-names:
allOf:
- minItems: 2
- enum:
- iahb
- isfr
- cec
additionalItems: true
- items:
- const: iahb
- const: isfr
in the base synopsys,dw-hdmi.yaml schema, and
clock-names:
maxItems: 2
in renesas,dw-hdmi.yaml, which resulted in the following validation
errors:
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.example.dt.yaml: hdmi@fead0000: clock-names: ['iahb', 'isfr'] is too long
This is caused by the enum entry.
> Now, on the rockchip binding, we can simply have:
>
> clock-names:
> enum:
> - iahb
> - isfr
> - cec
> - grf
> - vpll
>
> This way, here we enforce the available clock names, while keeping the
> constraints set in the generic binding.
--
Regards,
Laurent Pinchart
_______________________________________________
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dri-devel@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-08 11:45 ` Laurent Pinchart
@ 2020-04-08 12:25 ` Maxime Ripard
2020-04-08 14:01 ` Laurent Pinchart
2020-04-14 23:10 ` Rob Herring
1 sibling, 1 reply; 28+ messages in thread
From: Maxime Ripard @ 2020-04-08 12:25 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
[-- Attachment #1.1: Type: text/plain, Size: 10908 bytes --]
On Wed, Apr 08, 2020 at 02:45:52PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> > On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> > > On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> > > > On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > > > > On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > > > > > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > > > > > Convert the Rockchip HDMI TX text binding to YAML.
> > > > > > >
> > > > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > > > > ---
> > > > > > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > > > > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > > > > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > > > > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > >
> > > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > deleted file mode 100644
> > > > > > > index 3d32ce137e7f..000000000000
> > > > > > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > +++ /dev/null
> > > > > > > @@ -1,74 +0,0 @@
> > > > > > > -Rockchip DWC HDMI TX Encoder
> > > > > > > -============================
> > > > > > > -
> > > > > > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > > -with a companion PHY IP.
> > > > > > > -
> > > > > > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > > > > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > > > > > -following device-specific properties.
> > > > > > > -
> > > > > > > -
> > > > > > > -Required properties:
> > > > > > > -
> > > > > > > -- compatible: should be one of the following:
> > > > > > > - "rockchip,rk3228-dw-hdmi"
> > > > > > > - "rockchip,rk3288-dw-hdmi"
> > > > > > > - "rockchip,rk3328-dw-hdmi"
> > > > > > > - "rockchip,rk3399-dw-hdmi"
> > > > > > > -- reg: See dw_hdmi.txt.
> > > > > > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > > > > > -- interrupts: HDMI interrupt number
> > > > > > > -- clocks: See dw_hdmi.txt.
> > > > > > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > > > > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > > > > > - corresponding to the video input of the controller. The port shall have two
> > > > > > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > > > > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > > > > > -
> > > > > > > -Optional properties
> > > > > > > -
> > > > > > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > > > > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > > > > > - connected to a system I2C master this property contains a phandle to that
> > > > > > > - I2C master controller.
> > > > > > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > > > > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > > > > > -- clock-names: May contain "grf", power for grf io.
> > > > > > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > > > > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > > > > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > > > > > -
> > > > > > > -Optional pinctrl entry:
> > > > > > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > > > > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > > > > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > > > > > - cause the SDA line to be driven low to work around a hardware
> > > > > > > - errata.
> > > > > > > -
> > > > > > > -Example:
> > > > > > > -
> > > > > > > -hdmi: hdmi@ff980000 {
> > > > > > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > > > > > - reg = <0xff980000 0x20000>;
> > > > > > > - reg-io-width = <4>;
> > > > > > > - ddc-i2c-bus = <&i2c5>;
> > > > > > > - rockchip,grf = <&grf>;
> > > > > > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > > > > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > > > > > - clock-names = "iahb", "isfr";
> > > > > > > - ports {
> > > > > > > - hdmi_in: port {
> > > > > > > - #address-cells = <1>;
> > > > > > > - #size-cells = <0>;
> > > > > > > - hdmi_in_vopb: endpoint@0 {
> > > > > > > - reg = <0>;
> > > > > > > - remote-endpoint = <&vopb_out_hdmi>;
> > > > > > > - };
> > > > > > > - hdmi_in_vopl: endpoint@1 {
> > > > > > > - reg = <1>;
> > > > > > > - remote-endpoint = <&vopl_out_hdmi>;
> > > > > > > - };
> > > > > > > - };
> > > > > > > - };
> > > > > > > -};
> > > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > > new file mode 100644
> > > > > > > index 000000000000..8ff544ae0ac2
> > > > > > > --- /dev/null
> > > > > > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > > @@ -0,0 +1,178 @@
> > > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > > > +%YAML 1.2
> > > > > > > +---
> > > > > > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > > > +
> > > > > > > +title: Rockchip DWC HDMI TX Encoder
> > > > > > > +
> > > > > > > +maintainers:
> > > > > > > + - Mark Yao <mark.yao@rock-chips.com>
> > > > > > > +
> > > > > > > +description: |
> > > > > > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > > + with a companion PHY IP.
> > > > > > > +
> > > > > > > +allOf:
> > > > > > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > > > > > +
> > > > > > > +properties:
> > > > > > > + compatible:
> > > > > > > + enum:
> > > > > > > + - rockchip,rk3228-dw-hdmi
> > > > > > > + - rockchip,rk3288-dw-hdmi
> > > > > > > + - rockchip,rk3328-dw-hdmi
> > > > > > > + - rockchip,rk3399-dw-hdmi
> > > > > > > +
> > > > > > > + reg: true
> > > > > > > +
> > > > > > > + reg-io-width:
> > > > > > > + const: 4
> > > > > > > +
> > > > > > > + clocks:
> > > > > > > + minItems: 2
> > > > > > > + maxItems: 5
> > > > > > > + items:
> > > > > > > + - description: The bus clock for either AHB and APB
> > > > > > > + - description: The internal register configuration clock
> > > > > > > + - description: The HDMI CEC controller main clock
> > > > > > > + - description: Power for GRF IO
> > > > > > > + - description: External clock for some HDMI PHY
> > > > > > > +
> > > > > > > + clock-names:
> > > > > > > + minItems: 2
> > > > > > > + maxItems: 5
> > > > > > > + items:
> > > > > > > + - const: iahb
> > > > > > > + - const: isfr
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > >
> > > > > > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > > > > > since it's a pain to support properly here, and your description won't
> > > > > > match what you describe here either (and in general it's just a best
> > > > > > practice), so if all your DTs have the same order you should just set
> > > > > > that order in stone.
> > > > >
> > > > > But how do we handle the case where any of the cec, grf and vpll clocks
> > > > > can be set ? Assuming, for instance, that
> > > > >
> > > > > clock-names = "iahb", "isfr", "cec";
> > > > > clock-names = "iahb", "isfr", "vpll";
> > > > > clock-names = "iahb", "isfr", "cec", "vpll";
> > > > >
> > > > > would all be valid.
> > > >
> > > > It would be painful then...
> > > >
> > > > The easiest way to do so would be to simply use an enum there, and not
> > > > bother checking the array at all. You'll get a warning if there's
> > > > multiple occurences of the same string, and I guess that's what you
> > > > would be really concerned about.
> > > >
> > > > However, now that I think about it, what's the interaction between the
> > > > generic binding and this one when it comes to the third clock? The
> > > > generic one expects it to be cec, and here you have other options?
> > >
> > > I'm not too familiar with the platform, but as far as I understand, any
> > > of the cec, grf and vpll clock is optional (if someone could confirm
> > > that, it would be useful). I don't care so much about the order, but
> > > iahb and isfr are mandatory, and thus need to be specified as two const
> > > items in the beginning as far as I understand. It would be nice to set
> > > something along the lines of
> > >
> > > minItems: 2
> > > maxItems: 5
> > > items:
> > > - const: iahb
> > > - const: isfr
> > > - enum:
> > > - cec
> > > - grf
> > > - vpll
> >
> > I guess you could do something like:
> >
> > in the generic schema:
> >
> > clock-names:
> > allOf:
> > - minItems: 2
> > - enum:
> > - iahb
> > - isfr
> > - cec
> > additonalItems: true
> > - items:
> > - iahb
> > - isfr
> >
> > Or something along those lines, I haven't tested it, but the basic
> > idea is that you want to enforce that:
> > a) there's a minimum of two clocks
> > b) valid clock names are iahb, isfr and cec, but we will allow more
> > c) the first two clocks are iahb and isfr
>
> Interesting idea. I've tried
>
> clock-names:
> allOf:
> - minItems: 2
> - enum:
> - iahb
> - isfr
> - cec
> additionalItems: true
> - items:
> - const: iahb
> - const: isfr
>
> in the base synopsys,dw-hdmi.yaml schema, and
>
> clock-names:
> maxItems: 2
>
> in renesas,dw-hdmi.yaml, which resulted in the following validation
> errors:
>
> Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.example.dt.yaml: hdmi@fead0000: clock-names: ['iahb', 'isfr'] is too long
>
> This is caused by the enum entry.
What happens if you have instead of
- enum:
...
- items:
enum:
...
Maxime
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-08 12:25 ` Maxime Ripard
@ 2020-04-08 14:01 ` Laurent Pinchart
0 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-08 14:01 UTC (permalink / raw)
To: Maxime Ripard
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Rob Herring, Mark Yao
Hi Maxime,
On Wed, Apr 08, 2020 at 02:25:19PM +0200, Maxime Ripard wrote:
> On Wed, Apr 08, 2020 at 02:45:52PM +0300, Laurent Pinchart wrote:
> > On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> >> On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> >>> On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> >>>> On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> >>>>> On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> >>>>>> On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> >>>>>>> Convert the Rockchip HDMI TX text binding to YAML.
> >>>>>>>
> >>>>>>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> >>>>>>> ---
> >>>>>>> .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> >>>>>>> .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> >>>>>>> 2 files changed, 178 insertions(+), 74 deletions(-)
> >>>>>>> delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>>
> >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> deleted file mode 100644
> >>>>>>> index 3d32ce137e7f..000000000000
> >>>>>>> --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> +++ /dev/null
> >>>>>>> @@ -1,74 +0,0 @@
> >>>>>>> -Rockchip DWC HDMI TX Encoder
> >>>>>>> -============================
> >>>>>>> -
> >>>>>>> -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> >>>>>>> -with a companion PHY IP.
> >>>>>>> -
> >>>>>>> -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> >>>>>>> -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> >>>>>>> -following device-specific properties.
> >>>>>>> -
> >>>>>>> -
> >>>>>>> -Required properties:
> >>>>>>> -
> >>>>>>> -- compatible: should be one of the following:
> >>>>>>> - "rockchip,rk3228-dw-hdmi"
> >>>>>>> - "rockchip,rk3288-dw-hdmi"
> >>>>>>> - "rockchip,rk3328-dw-hdmi"
> >>>>>>> - "rockchip,rk3399-dw-hdmi"
> >>>>>>> -- reg: See dw_hdmi.txt.
> >>>>>>> -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> >>>>>>> -- interrupts: HDMI interrupt number
> >>>>>>> -- clocks: See dw_hdmi.txt.
> >>>>>>> -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> >>>>>>> -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> >>>>>>> - corresponding to the video input of the controller. The port shall have two
> >>>>>>> - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> >>>>>>> -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> >>>>>>> -
> >>>>>>> -Optional properties
> >>>>>>> -
> >>>>>>> -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> >>>>>>> - or the functionally-reduced I2C master contained in the DWC HDMI. When
> >>>>>>> - connected to a system I2C master this property contains a phandle to that
> >>>>>>> - I2C master controller.
> >>>>>>> -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> >>>>>>> -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> >>>>>>> -- clock-names: May contain "grf", power for grf io.
> >>>>>>> -- clock-names: May contain "vpll", external clock for some hdmi phy.
> >>>>>>> -- phys: from general PHY binding: the phandle for the PHY device.
> >>>>>>> -- phy-names: Should be "hdmi" if phys references an external phy.
> >>>>>>> -
> >>>>>>> -Optional pinctrl entry:
> >>>>>>> -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> >>>>>>> - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> >>>>>>> - i2c timeout. It's intended that this unwedge pinctrl entry will
> >>>>>>> - cause the SDA line to be driven low to work around a hardware
> >>>>>>> - errata.
> >>>>>>> -
> >>>>>>> -Example:
> >>>>>>> -
> >>>>>>> -hdmi: hdmi@ff980000 {
> >>>>>>> - compatible = "rockchip,rk3288-dw-hdmi";
> >>>>>>> - reg = <0xff980000 0x20000>;
> >>>>>>> - reg-io-width = <4>;
> >>>>>>> - ddc-i2c-bus = <&i2c5>;
> >>>>>>> - rockchip,grf = <&grf>;
> >>>>>>> - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> >>>>>>> - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> >>>>>>> - clock-names = "iahb", "isfr";
> >>>>>>> - ports {
> >>>>>>> - hdmi_in: port {
> >>>>>>> - #address-cells = <1>;
> >>>>>>> - #size-cells = <0>;
> >>>>>>> - hdmi_in_vopb: endpoint@0 {
> >>>>>>> - reg = <0>;
> >>>>>>> - remote-endpoint = <&vopb_out_hdmi>;
> >>>>>>> - };
> >>>>>>> - hdmi_in_vopl: endpoint@1 {
> >>>>>>> - reg = <1>;
> >>>>>>> - remote-endpoint = <&vopl_out_hdmi>;
> >>>>>>> - };
> >>>>>>> - };
> >>>>>>> - };
> >>>>>>> -};
> >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>> new file mode 100644
> >>>>>>> index 000000000000..8ff544ae0ac2
> >>>>>>> --- /dev/null
> >>>>>>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>> @@ -0,0 +1,178 @@
> >>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>>>>> +%YAML 1.2
> >>>>>>> +---
> >>>>>>> +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> >>>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>>>>> +
> >>>>>>> +title: Rockchip DWC HDMI TX Encoder
> >>>>>>> +
> >>>>>>> +maintainers:
> >>>>>>> + - Mark Yao <mark.yao@rock-chips.com>
> >>>>>>> +
> >>>>>>> +description: |
> >>>>>>> + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> >>>>>>> + with a companion PHY IP.
> >>>>>>> +
> >>>>>>> +allOf:
> >>>>>>> + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> >>>>>>> +
> >>>>>>> +properties:
> >>>>>>> + compatible:
> >>>>>>> + enum:
> >>>>>>> + - rockchip,rk3228-dw-hdmi
> >>>>>>> + - rockchip,rk3288-dw-hdmi
> >>>>>>> + - rockchip,rk3328-dw-hdmi
> >>>>>>> + - rockchip,rk3399-dw-hdmi
> >>>>>>> +
> >>>>>>> + reg: true
> >>>>>>> +
> >>>>>>> + reg-io-width:
> >>>>>>> + const: 4
> >>>>>>> +
> >>>>>>> + clocks:
> >>>>>>> + minItems: 2
> >>>>>>> + maxItems: 5
> >>>>>>> + items:
> >>>>>>> + - description: The bus clock for either AHB and APB
> >>>>>>> + - description: The internal register configuration clock
> >>>>>>> + - description: The HDMI CEC controller main clock
> >>>>>>> + - description: Power for GRF IO
> >>>>>>> + - description: External clock for some HDMI PHY
> >>>>>>> +
> >>>>>>> + clock-names:
> >>>>>>> + minItems: 2
> >>>>>>> + maxItems: 5
> >>>>>>> + items:
> >>>>>>> + - const: iahb
> >>>>>>> + - const: isfr
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>
> >>>>>> IIRC Rob wanted us to standardize the order of the clocks if possible,
> >>>>>> since it's a pain to support properly here, and your description won't
> >>>>>> match what you describe here either (and in general it's just a best
> >>>>>> practice), so if all your DTs have the same order you should just set
> >>>>>> that order in stone.
> >>>>>
> >>>>> But how do we handle the case where any of the cec, grf and vpll clocks
> >>>>> can be set ? Assuming, for instance, that
> >>>>>
> >>>>> clock-names = "iahb", "isfr", "cec";
> >>>>> clock-names = "iahb", "isfr", "vpll";
> >>>>> clock-names = "iahb", "isfr", "cec", "vpll";
> >>>>>
> >>>>> would all be valid.
> >>>>
> >>>> It would be painful then...
> >>>>
> >>>> The easiest way to do so would be to simply use an enum there, and not
> >>>> bother checking the array at all. You'll get a warning if there's
> >>>> multiple occurences of the same string, and I guess that's what you
> >>>> would be really concerned about.
> >>>>
> >>>> However, now that I think about it, what's the interaction between the
> >>>> generic binding and this one when it comes to the third clock? The
> >>>> generic one expects it to be cec, and here you have other options?
> >>>
> >>> I'm not too familiar with the platform, but as far as I understand, any
> >>> of the cec, grf and vpll clock is optional (if someone could confirm
> >>> that, it would be useful). I don't care so much about the order, but
> >>> iahb and isfr are mandatory, and thus need to be specified as two const
> >>> items in the beginning as far as I understand. It would be nice to set
> >>> something along the lines of
> >>>
> >>> minItems: 2
> >>> maxItems: 5
> >>> items:
> >>> - const: iahb
> >>> - const: isfr
> >>> - enum:
> >>> - cec
> >>> - grf
> >>> - vpll
> >>
> >> I guess you could do something like:
> >>
> >> in the generic schema:
> >>
> >> clock-names:
> >> allOf:
> >> - minItems: 2
> >> - enum:
> >> - iahb
> >> - isfr
> >> - cec
> >> additonalItems: true
> >> - items:
> >> - iahb
> >> - isfr
> >>
> >> Or something along those lines, I haven't tested it, but the basic
> >> idea is that you want to enforce that:
> >> a) there's a minimum of two clocks
> >> b) valid clock names are iahb, isfr and cec, but we will allow more
> >> c) the first two clocks are iahb and isfr
> >
> > Interesting idea. I've tried
> >
> > clock-names:
> > allOf:
> > - minItems: 2
> > - enum:
> > - iahb
> > - isfr
> > - cec
> > additionalItems: true
> > - items:
> > - const: iahb
> > - const: isfr
> >
> > in the base synopsys,dw-hdmi.yaml schema, and
> >
> > clock-names:
> > maxItems: 2
> >
> > in renesas,dw-hdmi.yaml, which resulted in the following validation
> > errors:
> >
> > Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.example.dt.yaml: hdmi@fead0000: clock-names: ['iahb', 'isfr'] is too long
> >
> > This is caused by the enum entry.
>
> What happens if you have instead of
> - enum:
> ...
>
> - items:
> enum:
> ...
That works, but if I then specify a cec clock in the example in
renesas,dw-hdmi.yaml, I get
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.example.dt.yaml: hdmi@fead0000: clock-names: ['iahb', 'isfr', 'cec'] is too long
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.example.dt.yaml: hdmi@fead0000: clock-names: Additional items are not allowed ('cec' was unexpected)
which is caused by
- items:
- const: iahb
- const: isfr
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-08 11:45 ` Laurent Pinchart
2020-04-08 12:25 ` Maxime Ripard
@ 2020-04-14 23:10 ` Rob Herring
2020-04-15 1:06 ` Laurent Pinchart
1 sibling, 1 reply; 28+ messages in thread
From: Rob Herring @ 2020-04-14 23:10 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Maxime Ripard, Mark Yao
On Wed, Apr 08, 2020 at 02:45:52PM +0300, Laurent Pinchart wrote:
> Hi Maxime,
>
> On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> > On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> > > On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> > > > On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > > > > On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > > > > > On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > > > > > > Convert the Rockchip HDMI TX text binding to YAML.
> > > > > > >
> > > > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > > > > > > ---
> > > > > > > .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > > > > > > .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > > > > > > 2 files changed, 178 insertions(+), 74 deletions(-)
> > > > > > > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > >
> > > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > deleted file mode 100644
> > > > > > > index 3d32ce137e7f..000000000000
> > > > > > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > > > > > > +++ /dev/null
> > > > > > > @@ -1,74 +0,0 @@
> > > > > > > -Rockchip DWC HDMI TX Encoder
> > > > > > > -============================
> > > > > > > -
> > > > > > > -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > > -with a companion PHY IP.
> > > > > > > -
> > > > > > > -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > > > > > > -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > > > > > > -following device-specific properties.
> > > > > > > -
> > > > > > > -
> > > > > > > -Required properties:
> > > > > > > -
> > > > > > > -- compatible: should be one of the following:
> > > > > > > - "rockchip,rk3228-dw-hdmi"
> > > > > > > - "rockchip,rk3288-dw-hdmi"
> > > > > > > - "rockchip,rk3328-dw-hdmi"
> > > > > > > - "rockchip,rk3399-dw-hdmi"
> > > > > > > -- reg: See dw_hdmi.txt.
> > > > > > > -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > > > > > > -- interrupts: HDMI interrupt number
> > > > > > > -- clocks: See dw_hdmi.txt.
> > > > > > > -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > > > > > > -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > > > > > > - corresponding to the video input of the controller. The port shall have two
> > > > > > > - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > > > > > > -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > > > > > > -
> > > > > > > -Optional properties
> > > > > > > -
> > > > > > > -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > > > > > > - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > > > > > > - connected to a system I2C master this property contains a phandle to that
> > > > > > > - I2C master controller.
> > > > > > > -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > > > > > > -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > > > > > > -- clock-names: May contain "grf", power for grf io.
> > > > > > > -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > > > > > > -- phys: from general PHY binding: the phandle for the PHY device.
> > > > > > > -- phy-names: Should be "hdmi" if phys references an external phy.
> > > > > > > -
> > > > > > > -Optional pinctrl entry:
> > > > > > > -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > > > > > > - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > > > > > > - i2c timeout. It's intended that this unwedge pinctrl entry will
> > > > > > > - cause the SDA line to be driven low to work around a hardware
> > > > > > > - errata.
> > > > > > > -
> > > > > > > -Example:
> > > > > > > -
> > > > > > > -hdmi: hdmi@ff980000 {
> > > > > > > - compatible = "rockchip,rk3288-dw-hdmi";
> > > > > > > - reg = <0xff980000 0x20000>;
> > > > > > > - reg-io-width = <4>;
> > > > > > > - ddc-i2c-bus = <&i2c5>;
> > > > > > > - rockchip,grf = <&grf>;
> > > > > > > - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > > > > > > - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > > > > > > - clock-names = "iahb", "isfr";
> > > > > > > - ports {
> > > > > > > - hdmi_in: port {
> > > > > > > - #address-cells = <1>;
> > > > > > > - #size-cells = <0>;
> > > > > > > - hdmi_in_vopb: endpoint@0 {
> > > > > > > - reg = <0>;
> > > > > > > - remote-endpoint = <&vopb_out_hdmi>;
> > > > > > > - };
> > > > > > > - hdmi_in_vopl: endpoint@1 {
> > > > > > > - reg = <1>;
> > > > > > > - remote-endpoint = <&vopl_out_hdmi>;
> > > > > > > - };
> > > > > > > - };
> > > > > > > - };
> > > > > > > -};
> > > > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > > new file mode 100644
> > > > > > > index 000000000000..8ff544ae0ac2
> > > > > > > --- /dev/null
> > > > > > > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > > > > > > @@ -0,0 +1,178 @@
> > > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > > > > +%YAML 1.2
> > > > > > > +---
> > > > > > > +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > > > +
> > > > > > > +title: Rockchip DWC HDMI TX Encoder
> > > > > > > +
> > > > > > > +maintainers:
> > > > > > > + - Mark Yao <mark.yao@rock-chips.com>
> > > > > > > +
> > > > > > > +description: |
> > > > > > > + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > > > > > > + with a companion PHY IP.
> > > > > > > +
> > > > > > > +allOf:
> > > > > > > + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > > > > > > +
> > > > > > > +properties:
> > > > > > > + compatible:
> > > > > > > + enum:
> > > > > > > + - rockchip,rk3228-dw-hdmi
> > > > > > > + - rockchip,rk3288-dw-hdmi
> > > > > > > + - rockchip,rk3328-dw-hdmi
> > > > > > > + - rockchip,rk3399-dw-hdmi
> > > > > > > +
> > > > > > > + reg: true
> > > > > > > +
> > > > > > > + reg-io-width:
> > > > > > > + const: 4
> > > > > > > +
> > > > > > > + clocks:
> > > > > > > + minItems: 2
> > > > > > > + maxItems: 5
> > > > > > > + items:
> > > > > > > + - description: The bus clock for either AHB and APB
> > > > > > > + - description: The internal register configuration clock
> > > > > > > + - description: The HDMI CEC controller main clock
> > > > > > > + - description: Power for GRF IO
> > > > > > > + - description: External clock for some HDMI PHY
> > > > > > > +
> > > > > > > + clock-names:
> > > > > > > + minItems: 2
> > > > > > > + maxItems: 5
> > > > > > > + items:
> > > > > > > + - const: iahb
> > > > > > > + - const: isfr
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > > > + - enum:
> > > > > > > + - cec
> > > > > > > + - grf
> > > > > > > + - vpll
> > > > > >
> > > > > > IIRC Rob wanted us to standardize the order of the clocks if possible,
> > > > > > since it's a pain to support properly here, and your description won't
> > > > > > match what you describe here either (and in general it's just a best
> > > > > > practice), so if all your DTs have the same order you should just set
> > > > > > that order in stone.
> > > > >
> > > > > But how do we handle the case where any of the cec, grf and vpll clocks
> > > > > can be set ? Assuming, for instance, that
> > > > >
> > > > > clock-names = "iahb", "isfr", "cec";
> > > > > clock-names = "iahb", "isfr", "vpll";
> > > > > clock-names = "iahb", "isfr", "cec", "vpll";
> > > > >
> > > > > would all be valid.
> > > >
> > > > It would be painful then...
> > > >
> > > > The easiest way to do so would be to simply use an enum there, and not
> > > > bother checking the array at all. You'll get a warning if there's
> > > > multiple occurences of the same string, and I guess that's what you
> > > > would be really concerned about.
> > > >
> > > > However, now that I think about it, what's the interaction between the
> > > > generic binding and this one when it comes to the third clock? The
> > > > generic one expects it to be cec, and here you have other options?
> > >
> > > I'm not too familiar with the platform, but as far as I understand, any
> > > of the cec, grf and vpll clock is optional (if someone could confirm
> > > that, it would be useful). I don't care so much about the order, but
> > > iahb and isfr are mandatory, and thus need to be specified as two const
> > > items in the beginning as far as I understand. It would be nice to set
> > > something along the lines of
> > >
> > > minItems: 2
> > > maxItems: 5
> > > items:
> > > - const: iahb
> > > - const: isfr
> > > - enum:
> > > - cec
> > > - grf
> > > - vpll
> >
> > I guess you could do something like:
> >
> > in the generic schema:
> >
> > clock-names:
> > allOf:
> > - minItems: 2
> > - enum:
> > - iahb
> > - isfr
> > - cec
> > additonalItems: true
> > - items:
> > - iahb
> > - isfr
> >
> > Or something along those lines, I haven't tested it, but the basic
> > idea is that you want to enforce that:
> > a) there's a minimum of two clocks
> > b) valid clock names are iahb, isfr and cec, but we will allow more
> > c) the first two clocks are iahb and isfr
>
> Interesting idea. I've tried
>
> clock-names:
> allOf:
> - minItems: 2
> - enum:
> - iahb
> - isfr
> - cec
> additionalItems: true
Instead of these 2, you want:
items:
enum: [ iahb, isfr, cec ]
minItems: 2
maxItems: 3
Though I assume there's some others missing as with this and below, the
3rd clock can only be 'cec'.
> - items:
> - const: iahb
> - const: isfr
And this needs 'maxItems: 3' added.
Rob
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema
2020-04-05 23:39 ` [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema Laurent Pinchart
@ 2020-04-14 23:10 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2020-04-14 23:10 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Maxime Ripard, Mark Yao
On Mon, 6 Apr 2020 02:39:34 +0300, Laurent Pinchart wrote:
> Replace the reference to the DWC HDMI text DT binding with a reference
> to the YAML equivalent.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> .../bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt
2020-04-05 23:39 ` [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt Laurent Pinchart
@ 2020-04-14 23:11 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2020-04-14 23:11 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Sandy Huang, dri-devel, linux-renesas-soc,
Chen-Yu Tsai, Maxime Ripard, Mark Yao
On Mon, 6 Apr 2020 02:39:35 +0300, Laurent Pinchart wrote:
> dw_hdmi.txt has been replaced with synopsys,dw-hdmi.yaml, and all
> references to the old file have been converted. Remove it.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> .../bindings/display/bridge/dw_hdmi.txt | 33 -------------------
> 1 file changed, 33 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt
>
Acked-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-14 23:10 ` Rob Herring
@ 2020-04-15 1:06 ` Laurent Pinchart
2020-04-15 13:50 ` Rob Herring
0 siblings, 1 reply; 28+ messages in thread
From: Laurent Pinchart @ 2020-04-15 1:06 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
linux-renesas-soc, Chen-Yu Tsai, Maxime Ripard, Mark Yao
Hi Rob,
On Tue, Apr 14, 2020 at 06:10:05PM -0500, Rob Herring wrote:
> On Wed, Apr 08, 2020 at 02:45:52PM +0300, Laurent Pinchart wrote:
> > On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> >> On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> >>> On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> >>>> On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> >>>>> On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> >>>>>> On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> >>>>>>> Convert the Rockchip HDMI TX text binding to YAML.
> >>>>>>>
> >>>>>>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> >>>>>>> ---
> >>>>>>> .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> >>>>>>> .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> >>>>>>> 2 files changed, 178 insertions(+), 74 deletions(-)
> >>>>>>> delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>>
> >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> deleted file mode 100644
> >>>>>>> index 3d32ce137e7f..000000000000
> >>>>>>> --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> >>>>>>> +++ /dev/null
> >>>>>>> @@ -1,74 +0,0 @@
> >>>>>>> -Rockchip DWC HDMI TX Encoder
> >>>>>>> -============================
> >>>>>>> -
> >>>>>>> -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> >>>>>>> -with a companion PHY IP.
> >>>>>>> -
> >>>>>>> -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> >>>>>>> -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> >>>>>>> -following device-specific properties.
> >>>>>>> -
> >>>>>>> -
> >>>>>>> -Required properties:
> >>>>>>> -
> >>>>>>> -- compatible: should be one of the following:
> >>>>>>> - "rockchip,rk3228-dw-hdmi"
> >>>>>>> - "rockchip,rk3288-dw-hdmi"
> >>>>>>> - "rockchip,rk3328-dw-hdmi"
> >>>>>>> - "rockchip,rk3399-dw-hdmi"
> >>>>>>> -- reg: See dw_hdmi.txt.
> >>>>>>> -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> >>>>>>> -- interrupts: HDMI interrupt number
> >>>>>>> -- clocks: See dw_hdmi.txt.
> >>>>>>> -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> >>>>>>> -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> >>>>>>> - corresponding to the video input of the controller. The port shall have two
> >>>>>>> - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> >>>>>>> -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> >>>>>>> -
> >>>>>>> -Optional properties
> >>>>>>> -
> >>>>>>> -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> >>>>>>> - or the functionally-reduced I2C master contained in the DWC HDMI. When
> >>>>>>> - connected to a system I2C master this property contains a phandle to that
> >>>>>>> - I2C master controller.
> >>>>>>> -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> >>>>>>> -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> >>>>>>> -- clock-names: May contain "grf", power for grf io.
> >>>>>>> -- clock-names: May contain "vpll", external clock for some hdmi phy.
> >>>>>>> -- phys: from general PHY binding: the phandle for the PHY device.
> >>>>>>> -- phy-names: Should be "hdmi" if phys references an external phy.
> >>>>>>> -
> >>>>>>> -Optional pinctrl entry:
> >>>>>>> -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> >>>>>>> - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> >>>>>>> - i2c timeout. It's intended that this unwedge pinctrl entry will
> >>>>>>> - cause the SDA line to be driven low to work around a hardware
> >>>>>>> - errata.
> >>>>>>> -
> >>>>>>> -Example:
> >>>>>>> -
> >>>>>>> -hdmi: hdmi@ff980000 {
> >>>>>>> - compatible = "rockchip,rk3288-dw-hdmi";
> >>>>>>> - reg = <0xff980000 0x20000>;
> >>>>>>> - reg-io-width = <4>;
> >>>>>>> - ddc-i2c-bus = <&i2c5>;
> >>>>>>> - rockchip,grf = <&grf>;
> >>>>>>> - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> >>>>>>> - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> >>>>>>> - clock-names = "iahb", "isfr";
> >>>>>>> - ports {
> >>>>>>> - hdmi_in: port {
> >>>>>>> - #address-cells = <1>;
> >>>>>>> - #size-cells = <0>;
> >>>>>>> - hdmi_in_vopb: endpoint@0 {
> >>>>>>> - reg = <0>;
> >>>>>>> - remote-endpoint = <&vopb_out_hdmi>;
> >>>>>>> - };
> >>>>>>> - hdmi_in_vopl: endpoint@1 {
> >>>>>>> - reg = <1>;
> >>>>>>> - remote-endpoint = <&vopl_out_hdmi>;
> >>>>>>> - };
> >>>>>>> - };
> >>>>>>> - };
> >>>>>>> -};
> >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>> new file mode 100644
> >>>>>>> index 000000000000..8ff544ae0ac2
> >>>>>>> --- /dev/null
> >>>>>>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> >>>>>>> @@ -0,0 +1,178 @@
> >>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>>>>> +%YAML 1.2
> >>>>>>> +---
> >>>>>>> +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> >>>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>>>>> +
> >>>>>>> +title: Rockchip DWC HDMI TX Encoder
> >>>>>>> +
> >>>>>>> +maintainers:
> >>>>>>> + - Mark Yao <mark.yao@rock-chips.com>
> >>>>>>> +
> >>>>>>> +description: |
> >>>>>>> + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> >>>>>>> + with a companion PHY IP.
> >>>>>>> +
> >>>>>>> +allOf:
> >>>>>>> + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> >>>>>>> +
> >>>>>>> +properties:
> >>>>>>> + compatible:
> >>>>>>> + enum:
> >>>>>>> + - rockchip,rk3228-dw-hdmi
> >>>>>>> + - rockchip,rk3288-dw-hdmi
> >>>>>>> + - rockchip,rk3328-dw-hdmi
> >>>>>>> + - rockchip,rk3399-dw-hdmi
> >>>>>>> +
> >>>>>>> + reg: true
> >>>>>>> +
> >>>>>>> + reg-io-width:
> >>>>>>> + const: 4
> >>>>>>> +
> >>>>>>> + clocks:
> >>>>>>> + minItems: 2
> >>>>>>> + maxItems: 5
> >>>>>>> + items:
> >>>>>>> + - description: The bus clock for either AHB and APB
> >>>>>>> + - description: The internal register configuration clock
> >>>>>>> + - description: The HDMI CEC controller main clock
> >>>>>>> + - description: Power for GRF IO
> >>>>>>> + - description: External clock for some HDMI PHY
> >>>>>>> +
> >>>>>>> + clock-names:
> >>>>>>> + minItems: 2
> >>>>>>> + maxItems: 5
> >>>>>>> + items:
> >>>>>>> + - const: iahb
> >>>>>>> + - const: isfr
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>> + - enum:
> >>>>>>> + - cec
> >>>>>>> + - grf
> >>>>>>> + - vpll
> >>>>>>
> >>>>>> IIRC Rob wanted us to standardize the order of the clocks if possible,
> >>>>>> since it's a pain to support properly here, and your description won't
> >>>>>> match what you describe here either (and in general it's just a best
> >>>>>> practice), so if all your DTs have the same order you should just set
> >>>>>> that order in stone.
> >>>>>
> >>>>> But how do we handle the case where any of the cec, grf and vpll clocks
> >>>>> can be set ? Assuming, for instance, that
> >>>>>
> >>>>> clock-names = "iahb", "isfr", "cec";
> >>>>> clock-names = "iahb", "isfr", "vpll";
> >>>>> clock-names = "iahb", "isfr", "cec", "vpll";
> >>>>>
> >>>>> would all be valid.
> >>>>
> >>>> It would be painful then...
> >>>>
> >>>> The easiest way to do so would be to simply use an enum there, and not
> >>>> bother checking the array at all. You'll get a warning if there's
> >>>> multiple occurences of the same string, and I guess that's what you
> >>>> would be really concerned about.
> >>>>
> >>>> However, now that I think about it, what's the interaction between the
> >>>> generic binding and this one when it comes to the third clock? The
> >>>> generic one expects it to be cec, and here you have other options?
> >>>
> >>> I'm not too familiar with the platform, but as far as I understand, any
> >>> of the cec, grf and vpll clock is optional (if someone could confirm
> >>> that, it would be useful). I don't care so much about the order, but
> >>> iahb and isfr are mandatory, and thus need to be specified as two const
> >>> items in the beginning as far as I understand. It would be nice to set
> >>> something along the lines of
> >>>
> >>> minItems: 2
> >>> maxItems: 5
> >>> items:
> >>> - const: iahb
> >>> - const: isfr
> >>> - enum:
> >>> - cec
> >>> - grf
> >>> - vpll
> >>
> >> I guess you could do something like:
> >>
> >> in the generic schema:
> >>
> >> clock-names:
> >> allOf:
> >> - minItems: 2
> >> - enum:
> >> - iahb
> >> - isfr
> >> - cec
> >> additonalItems: true
> >> - items:
> >> - iahb
> >> - isfr
> >>
> >> Or something along those lines, I haven't tested it, but the basic
> >> idea is that you want to enforce that:
> >> a) there's a minimum of two clocks
> >> b) valid clock names are iahb, isfr and cec, but we will allow more
> >> c) the first two clocks are iahb and isfr
> >
> > Interesting idea. I've tried
> >
> > clock-names:
> > allOf:
> > - minItems: 2
> > - enum:
> > - iahb
> > - isfr
> > - cec
> > additionalItems: true
>
> Instead of these 2, you want:
>
> items:
> enum: [ iahb, isfr, cec ]
> minItems: 2
> maxItems: 3
>
> Though I assume there's some others missing as with this and below, the
> 3rd clock can only be 'cec'.
But with this bindings that include this base schema and extend the
number of clocks will not validate :-( I'd like a way for the base
schema to provide an overridable check, but I don't think that's
possible. I then tried to specify a check that would be valid for
extensions too, and that would verify that
- There are at least two clocks and maybe more (that should be easy by
setting minItems: 2 and leaving maxItems unspecified, but the
dt-validate tool then adds a maxItems automatically :-()
- The first two clock names are 'iahb' and 'isfr', and additional clock
names can be anything.
Maybe YAML schemas can't support this, and I need to specify all
constraints explicitly in derived bindings ? The base
bridge/synopsys,dw-hdmi.yaml file would then be dropped completely, with
its contents copied to derived bindings. Or maybe I should selectively
include rules from the base schema in rockchip,dw-hdmi.yaml ? That's not
very user-friendly though.
> > - items:
> > - const: iahb
> > - const: isfr
>
> And this needs 'maxItems: 3' added.
--
Regards,
Laurent Pinchart
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^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
2020-04-15 1:06 ` Laurent Pinchart
@ 2020-04-15 13:50 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2020-04-15 13:50 UTC (permalink / raw)
To: Laurent Pinchart
Cc: devicetree, Laurent Pinchart, Sandy Huang, dri-devel,
open list:MEDIA DRIVERS FOR RENESAS - FCP, Chen-Yu Tsai,
Maxime Ripard, Mark Yao
On Tue, Apr 14, 2020 at 8:06 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Rob,
>
> On Tue, Apr 14, 2020 at 06:10:05PM -0500, Rob Herring wrote:
> > On Wed, Apr 08, 2020 at 02:45:52PM +0300, Laurent Pinchart wrote:
> > > On Tue, Apr 07, 2020 at 09:12:51AM +0200, Maxime Ripard wrote:
> > >> On Mon, Apr 06, 2020 at 08:50:28PM +0300, Laurent Pinchart wrote:
> > >>> On Mon, Apr 06, 2020 at 07:09:15PM +0200, Maxime Ripard wrote:
> > >>>> On Mon, Apr 06, 2020 at 02:19:27PM +0300, Laurent Pinchart wrote:
> > >>>>> On Mon, Apr 06, 2020 at 10:00:32AM +0200, Maxime Ripard wrote:
> > >>>>>> On Mon, Apr 06, 2020 at 02:39:33AM +0300, Laurent Pinchart wrote:
> > >>>>>>> Convert the Rockchip HDMI TX text binding to YAML.
> > >>>>>>>
> > >>>>>>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > >>>>>>> ---
> > >>>>>>> .../display/rockchip/dw_hdmi-rockchip.txt | 74 --------
> > >>>>>>> .../display/rockchip/rockchip,dw-hdmi.yaml | 178 ++++++++++++++++++
> > >>>>>>> 2 files changed, 178 insertions(+), 74 deletions(-)
> > >>>>>>> delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > >>>>>>> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > >>>>>>>
> > >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > >>>>>>> deleted file mode 100644
> > >>>>>>> index 3d32ce137e7f..000000000000
> > >>>>>>> --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
> > >>>>>>> +++ /dev/null
> > >>>>>>> @@ -1,74 +0,0 @@
> > >>>>>>> -Rockchip DWC HDMI TX Encoder
> > >>>>>>> -============================
> > >>>>>>> -
> > >>>>>>> -The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > >>>>>>> -with a companion PHY IP.
> > >>>>>>> -
> > >>>>>>> -These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
> > >>>>>>> -Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
> > >>>>>>> -following device-specific properties.
> > >>>>>>> -
> > >>>>>>> -
> > >>>>>>> -Required properties:
> > >>>>>>> -
> > >>>>>>> -- compatible: should be one of the following:
> > >>>>>>> - "rockchip,rk3228-dw-hdmi"
> > >>>>>>> - "rockchip,rk3288-dw-hdmi"
> > >>>>>>> - "rockchip,rk3328-dw-hdmi"
> > >>>>>>> - "rockchip,rk3399-dw-hdmi"
> > >>>>>>> -- reg: See dw_hdmi.txt.
> > >>>>>>> -- reg-io-width: See dw_hdmi.txt. Shall be 4.
> > >>>>>>> -- interrupts: HDMI interrupt number
> > >>>>>>> -- clocks: See dw_hdmi.txt.
> > >>>>>>> -- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
> > >>>>>>> -- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
> > >>>>>>> - corresponding to the video input of the controller. The port shall have two
> > >>>>>>> - endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
> > >>>>>>> -- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
> > >>>>>>> -
> > >>>>>>> -Optional properties
> > >>>>>>> -
> > >>>>>>> -- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
> > >>>>>>> - or the functionally-reduced I2C master contained in the DWC HDMI. When
> > >>>>>>> - connected to a system I2C master this property contains a phandle to that
> > >>>>>>> - I2C master controller.
> > >>>>>>> -- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
> > >>>>>>> -- clock-names: May contain "cec" as defined in dw_hdmi.txt.
> > >>>>>>> -- clock-names: May contain "grf", power for grf io.
> > >>>>>>> -- clock-names: May contain "vpll", external clock for some hdmi phy.
> > >>>>>>> -- phys: from general PHY binding: the phandle for the PHY device.
> > >>>>>>> -- phy-names: Should be "hdmi" if phys references an external phy.
> > >>>>>>> -
> > >>>>>>> -Optional pinctrl entry:
> > >>>>>>> -- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
> > >>>>>>> - will switch to the unwedge pinctrl state for 10ms if it ever gets an
> > >>>>>>> - i2c timeout. It's intended that this unwedge pinctrl entry will
> > >>>>>>> - cause the SDA line to be driven low to work around a hardware
> > >>>>>>> - errata.
> > >>>>>>> -
> > >>>>>>> -Example:
> > >>>>>>> -
> > >>>>>>> -hdmi: hdmi@ff980000 {
> > >>>>>>> - compatible = "rockchip,rk3288-dw-hdmi";
> > >>>>>>> - reg = <0xff980000 0x20000>;
> > >>>>>>> - reg-io-width = <4>;
> > >>>>>>> - ddc-i2c-bus = <&i2c5>;
> > >>>>>>> - rockchip,grf = <&grf>;
> > >>>>>>> - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> > >>>>>>> - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
> > >>>>>>> - clock-names = "iahb", "isfr";
> > >>>>>>> - ports {
> > >>>>>>> - hdmi_in: port {
> > >>>>>>> - #address-cells = <1>;
> > >>>>>>> - #size-cells = <0>;
> > >>>>>>> - hdmi_in_vopb: endpoint@0 {
> > >>>>>>> - reg = <0>;
> > >>>>>>> - remote-endpoint = <&vopb_out_hdmi>;
> > >>>>>>> - };
> > >>>>>>> - hdmi_in_vopl: endpoint@1 {
> > >>>>>>> - reg = <1>;
> > >>>>>>> - remote-endpoint = <&vopl_out_hdmi>;
> > >>>>>>> - };
> > >>>>>>> - };
> > >>>>>>> - };
> > >>>>>>> -};
> > >>>>>>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > >>>>>>> new file mode 100644
> > >>>>>>> index 000000000000..8ff544ae0ac2
> > >>>>>>> --- /dev/null
> > >>>>>>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
> > >>>>>>> @@ -0,0 +1,178 @@
> > >>>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > >>>>>>> +%YAML 1.2
> > >>>>>>> +---
> > >>>>>>> +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
> > >>>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > >>>>>>> +
> > >>>>>>> +title: Rockchip DWC HDMI TX Encoder
> > >>>>>>> +
> > >>>>>>> +maintainers:
> > >>>>>>> + - Mark Yao <mark.yao@rock-chips.com>
> > >>>>>>> +
> > >>>>>>> +description: |
> > >>>>>>> + The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
> > >>>>>>> + with a companion PHY IP.
> > >>>>>>> +
> > >>>>>>> +allOf:
> > >>>>>>> + - $ref: ../bridge/synopsys,dw-hdmi.yaml#
> > >>>>>>> +
> > >>>>>>> +properties:
> > >>>>>>> + compatible:
> > >>>>>>> + enum:
> > >>>>>>> + - rockchip,rk3228-dw-hdmi
> > >>>>>>> + - rockchip,rk3288-dw-hdmi
> > >>>>>>> + - rockchip,rk3328-dw-hdmi
> > >>>>>>> + - rockchip,rk3399-dw-hdmi
> > >>>>>>> +
> > >>>>>>> + reg: true
> > >>>>>>> +
> > >>>>>>> + reg-io-width:
> > >>>>>>> + const: 4
> > >>>>>>> +
> > >>>>>>> + clocks:
> > >>>>>>> + minItems: 2
> > >>>>>>> + maxItems: 5
> > >>>>>>> + items:
> > >>>>>>> + - description: The bus clock for either AHB and APB
> > >>>>>>> + - description: The internal register configuration clock
> > >>>>>>> + - description: The HDMI CEC controller main clock
> > >>>>>>> + - description: Power for GRF IO
> > >>>>>>> + - description: External clock for some HDMI PHY
> > >>>>>>> +
> > >>>>>>> + clock-names:
> > >>>>>>> + minItems: 2
> > >>>>>>> + maxItems: 5
> > >>>>>>> + items:
> > >>>>>>> + - const: iahb
> > >>>>>>> + - const: isfr
> > >>>>>>> + - enum:
> > >>>>>>> + - cec
> > >>>>>>> + - grf
> > >>>>>>> + - vpll
> > >>>>>>> + - enum:
> > >>>>>>> + - cec
> > >>>>>>> + - grf
> > >>>>>>> + - vpll
> > >>>>>>> + - enum:
> > >>>>>>> + - cec
> > >>>>>>> + - grf
> > >>>>>>> + - vpll
> > >>>>>>
> > >>>>>> IIRC Rob wanted us to standardize the order of the clocks if possible,
> > >>>>>> since it's a pain to support properly here, and your description won't
> > >>>>>> match what you describe here either (and in general it's just a best
> > >>>>>> practice), so if all your DTs have the same order you should just set
> > >>>>>> that order in stone.
> > >>>>>
> > >>>>> But how do we handle the case where any of the cec, grf and vpll clocks
> > >>>>> can be set ? Assuming, for instance, that
> > >>>>>
> > >>>>> clock-names = "iahb", "isfr", "cec";
> > >>>>> clock-names = "iahb", "isfr", "vpll";
> > >>>>> clock-names = "iahb", "isfr", "cec", "vpll";
> > >>>>>
> > >>>>> would all be valid.
> > >>>>
> > >>>> It would be painful then...
> > >>>>
> > >>>> The easiest way to do so would be to simply use an enum there, and not
> > >>>> bother checking the array at all. You'll get a warning if there's
> > >>>> multiple occurences of the same string, and I guess that's what you
> > >>>> would be really concerned about.
> > >>>>
> > >>>> However, now that I think about it, what's the interaction between the
> > >>>> generic binding and this one when it comes to the third clock? The
> > >>>> generic one expects it to be cec, and here you have other options?
> > >>>
> > >>> I'm not too familiar with the platform, but as far as I understand, any
> > >>> of the cec, grf and vpll clock is optional (if someone could confirm
> > >>> that, it would be useful). I don't care so much about the order, but
> > >>> iahb and isfr are mandatory, and thus need to be specified as two const
> > >>> items in the beginning as far as I understand. It would be nice to set
> > >>> something along the lines of
> > >>>
> > >>> minItems: 2
> > >>> maxItems: 5
> > >>> items:
> > >>> - const: iahb
> > >>> - const: isfr
> > >>> - enum:
> > >>> - cec
> > >>> - grf
> > >>> - vpll
> > >>
> > >> I guess you could do something like:
> > >>
> > >> in the generic schema:
> > >>
> > >> clock-names:
> > >> allOf:
> > >> - minItems: 2
> > >> - enum:
> > >> - iahb
> > >> - isfr
> > >> - cec
> > >> additonalItems: true
> > >> - items:
> > >> - iahb
> > >> - isfr
> > >>
> > >> Or something along those lines, I haven't tested it, but the basic
> > >> idea is that you want to enforce that:
> > >> a) there's a minimum of two clocks
> > >> b) valid clock names are iahb, isfr and cec, but we will allow more
> > >> c) the first two clocks are iahb and isfr
> > >
> > > Interesting idea. I've tried
> > >
> > > clock-names:
> > > allOf:
> > > - minItems: 2
> > > - enum:
> > > - iahb
> > > - isfr
> > > - cec
> > > additionalItems: true
> >
> > Instead of these 2, you want:
> >
> > items:
> > enum: [ iahb, isfr, cec ]
> > minItems: 2
> > maxItems: 3
> >
> > Though I assume there's some others missing as with this and below, the
> > 3rd clock can only be 'cec'.
>
> But with this bindings that include this base schema and extend the
> number of clocks will not validate :-( I'd like a way for the base
> schema to provide an overridable check, but I don't think that's
> possible. I then tried to specify a check that would be valid for
> extensions too, and that would verify that
But this is not the base schema?
> - There are at least two clocks and maybe more (that should be easy by
> setting minItems: 2 and leaving maxItems unspecified, but the
> dt-validate tool then adds a maxItems automatically :-()
That's to avoid boilerplate in the vast majority of cases.
Can't you just do 'maxItems: 1000' or some sane limit?
>
> - The first two clock names are 'iahb' and 'isfr', and additional clock
> names can be anything.
So, in the base schema:
items:
- const: iahb
- const: isfr
minItems: 2
maxItems: 10
additionalItems: true
In the device schema you can do something like:
items:
- {}
- {}
- enum: [ a, b, c ]
- enum: [ a, b, c ]
If there's no order of the last items. Or you can use the schema
flavor (rather than list) of 'items' and list iahb and isfr again.
> Maybe YAML schemas can't support this, and I need to specify all
> constraints explicitly in derived bindings ? The base
> bridge/synopsys,dw-hdmi.yaml file would then be dropped completely, with
> its contents copied to derived bindings. Or maybe I should selectively
> include rules from the base schema in rockchip,dw-hdmi.yaml ? That's not
> very user-friendly though.
You could get into using definitions and referencing those
individually, but I wouldn't recommend it.
My hope is in new bindings the difficulty in expressing all the schema
variations will prevent some of this needless variation. The reality
is for the same IP block, the clocks and other resources shouldn't
vary so much. :)
Rob
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^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2020-04-15 13:50 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-05 23:39 [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 1/6] dt-bindings: display: bridge: Add YAML schema for Synopsys DW-HDMI Laurent Pinchart
2020-04-06 7:50 ` Maxime Ripard
2020-04-05 23:39 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas, dw-hdmi: Convert binding to YAML Laurent Pinchart
2020-04-06 7:57 ` [PATCH/RFC 2/6] dt-bindings: display: bridge: renesas,dw-hdmi: " Maxime Ripard
2020-04-06 11:28 ` Laurent Pinchart
2020-04-06 11:32 ` Laurent Pinchart
2020-04-06 17:04 ` Maxime Ripard
2020-04-06 17:06 ` Maxime Ripard
2020-04-06 8:51 ` Geert Uytterhoeven
2020-04-05 23:39 ` [PATCH/RFC 3/6] dt-bindings: display: imx: hdmi: " Laurent Pinchart
2020-04-05 23:39 ` [PATCH/RFC 4/6] dt-bindings: display: rockchip: dw-hdmi: " Laurent Pinchart
2020-04-06 8:00 ` Maxime Ripard
2020-04-06 11:19 ` Laurent Pinchart
2020-04-06 17:09 ` Maxime Ripard
2020-04-06 17:50 ` Laurent Pinchart
2020-04-07 7:12 ` Maxime Ripard
2020-04-08 11:45 ` Laurent Pinchart
2020-04-08 12:25 ` Maxime Ripard
2020-04-08 14:01 ` Laurent Pinchart
2020-04-14 23:10 ` Rob Herring
2020-04-15 1:06 ` Laurent Pinchart
2020-04-15 13:50 ` Rob Herring
2020-04-05 23:39 ` [PATCH/RFC 5/6] dt-bindings: display: sun8i-a83t-dw-hdmi: Reference dw-hdmi YAML schema Laurent Pinchart
2020-04-14 23:10 ` Rob Herring
2020-04-05 23:39 ` [PATCH/RFC 6/6] dt-bindings: display: bridge: Remove deprecated dw_hdmi.txt Laurent Pinchart
2020-04-14 23:11 ` Rob Herring
2020-04-05 23:55 ` [PATCH/RFC 0/6] dt-bindings: display: Convert DWC HDMI TX bindings to YAML Laurent Pinchart
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