From: Frieder Schrempf <frieder.schrempf@kontron.de>
To: Marek Vasut <marex@denx.de>, dri-devel@lists.freedesktop.org
Cc: ch@denx.de, Douglas Anderson <dianders@chromium.org>,
Stephen Boyd <swboyd@chromium.org>,
Philippe Schenker <philippe.schenker@toradex.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Valentin Raevsky <valentin@compulab.co.il>,
Sam Ravnborg <sam@ravnborg.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: Re: [PATCH V2 2/2] drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 driver
Date: Wed, 28 Apr 2021 09:51:32 +0200 [thread overview]
Message-ID: <f3b55e0b-20d2-0add-e097-e03a675a1169@kontron.de> (raw)
In-Reply-To: <20210421223122.112736-2-marex@denx.de>
On 22.04.21 00:31, Marek Vasut wrote:
> Add driver for TI SN65DSI83 Single-link DSI to Single-link LVDS bridge
> and TI SN65DSI84 Single-link DSI to Dual-link or 2x Single-link LVDS
> bridge. TI SN65DSI85 is unsupported due to lack of hardware to test on,
> but easy to add.
>
> The driver operates the chip via I2C bus. Currently the LVDS clock are
> always derived from DSI clock lane, which is the usual mode of operation.
> Support for clock from external oscillator is not implemented, but it is
> easy to add if ever needed. Only RGB888 pixel format is implemented, the
> LVDS666 is not supported, but could be added if needed.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Douglas Anderson <dianders@chromium.org>
> Cc: Jagan Teki <jagan@amarulasolutions.com>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Philippe Schenker <philippe.schenker@toradex.com>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Valentin Raevsky <valentin@compulab.co.il>
> To: dri-devel@lists.freedesktop.org
> Tested-by: Loic Poulain <loic.poulain@linaro.org>
> ---
> V2: - Use dev_err_probe()
> - Set REG_RC_RESET as volatile
> - Wait for PLL stabilization by polling REG_RC_LVDS_PLL
> - Use ctx->mode = *adj instead of *mode in sn65dsi83_mode_set
> - Add tested DSI84 support in dual-link mode
> - Correctly set VCOM
> - Fill in missing DSI CHB and LVDS CHB bits from DSI84 and DSI85
> datasheets, with that all the reserved bits make far more sense
> as the DSI83 and DSI84 seems to be reduced version of DSI85
> ---
> drivers/gpu/drm/bridge/Kconfig | 10 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/ti-sn65dsi83.c | 617 ++++++++++++++++++++++++++
> 3 files changed, 628 insertions(+)
> create mode 100644 drivers/gpu/drm/bridge/ti-sn65dsi83.c
>
[...]
> +static int sn65dsi83_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct device *dev = &client->dev;
> + enum sn65dsi83_model model;
> + struct sn65dsi83 *ctx;
> + int ret;
> +
> + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
> + if (!ctx)
> + return -ENOMEM;
> +
> + ctx->dev = dev;
> +
> + if (dev->of_node)
> + model = (enum sn65dsi83_model)of_device_get_match_data(dev);
> + else
> + model = id->driver_data;
> +
> + /* Default to dual-link LVDS on all but DSI83. */
> + if (model != MODEL_SN65DSI83)
> + ctx->lvds_dual_link = true;
What if I use the DSI84 with a single link LVDS? I can't see any way to
configure that right now.
> +
> + ctx->enable_gpio = devm_gpiod_get(ctx->dev, "enable", GPIOD_OUT_LOW);
> + if (IS_ERR(ctx->enable_gpio))
> + return PTR_ERR(ctx->enable_gpio);
> +
> + ret = sn65dsi83_parse_dt(ctx);
> + if (ret)
> + return ret;
> +
> + ctx->regmap = devm_regmap_init_i2c(client, &sn65dsi83_regmap_config);
> + if (IS_ERR(ctx->regmap))
> + return PTR_ERR(ctx->regmap);
> +
> + dev_set_drvdata(dev, ctx);
> + i2c_set_clientdata(client, ctx);
> +
> + ctx->bridge.funcs = &sn65dsi83_funcs;
> + ctx->bridge.of_node = dev->of_node;
> + drm_bridge_add(&ctx->bridge);
> +
> + return 0;
> +}
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next prev parent reply other threads:[~2021-04-28 7:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-21 22:31 [PATCH V2 1/2] dt-bindings: drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 bindings Marek Vasut
2021-04-21 22:31 ` [PATCH V2 2/2] drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 driver Marek Vasut
2021-04-23 16:03 ` Loic Poulain
2021-04-28 7:51 ` Frieder Schrempf [this message]
2021-04-28 8:13 ` Frieder Schrempf
2021-04-28 9:26 ` Loic Poulain
2021-04-28 9:24 ` Neil Armstrong
2021-04-28 9:49 ` Jagan Teki
2021-04-28 14:18 ` Marek Vasut
2021-04-28 14:16 ` Marek Vasut
2021-04-29 16:27 ` Frieder Schrempf
2021-04-30 8:34 ` Neil Armstrong
2021-04-21 22:56 ` [PATCH V2 1/2] dt-bindings: drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 bindings Laurent Pinchart
2021-04-22 8:38 ` Neil Armstrong
2021-04-22 16:16 ` Marek Vasut
2021-04-22 8:43 ` Jagan Teki
2021-04-22 16:22 ` Marek Vasut
2021-04-28 7:56 ` Frieder Schrempf
2021-04-28 14:19 ` Marek Vasut
2021-04-27 12:15 [PATCH V2 2/2] drm/bridge: ti-sn65dsi83: Add TI SN65DSI83 and SN65DSI84 driver Felix Radensky
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