* [PATCH 1/4] media: uapi: hevc: Add scaling matrix control
2019-10-26 17:46 [PATCH 0/4] media: cedrus: hevc: Add support for scaling matrix and multi-slice frames Jernej Skrabec
@ 2019-10-26 17:47 ` Jernej Skrabec
2019-10-26 17:47 ` [PATCH 2/4] media: cedrus: hevc: Add support for scaling matrix Jernej Skrabec
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Jernej Skrabec @ 2019-10-26 17:47 UTC (permalink / raw)
To: mripard, paul.kocialkowski
Cc: devel, gregkh, linux-sunxi, linux-kernel, wens, boris.brezillon,
p.zabel, hverkuil-cisco, mchehab, ezequiel, linux-arm-kernel,
linux-media
HEVC has a scaling matrix concept. Add support for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
.../media/uapi/v4l/ext-ctrls-codec.rst | 41 +++++++++++++++++++
.../media/uapi/v4l/pixfmt-compressed.rst | 1 +
drivers/media/v4l2-core/v4l2-ctrls.c | 10 +++++
include/media/hevc-ctrls.h | 11 +++++
4 files changed, 63 insertions(+)
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
index a1209f68c5e8..382e85e16444 100644
--- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
@@ -4176,6 +4176,47 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
- ``padding[6]``
- Applications and drivers must set this to zero.
+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)``
+ Specifies the scaling matrix (as extracted from the bitstream) for
+ the associated HEVC slice data. The bitstream parameters are
+ defined according to :ref:`hevc`, section 7.4.5 "Scaling list
+ data semantics". For further documentation, refer to the above
+ specification, unless there is an explicit comment stating
+ otherwise.
+
+ .. note::
+
+ This compound control is not yet part of the public kernel API and
+ it is expected to change.
+
+.. c:type:: v4l2_ctrl_hevc_scaling_matrix
+
+.. cssclass:: longtable
+
+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix
+ :header-rows: 0
+ :stub-columns: 0
+ :widths: 1 1 2
+
+ * - __u8
+ - ``scaling_list_4x4[6][16]``
+ -
+ * - __u8
+ - ``scaling_list_8x8[6][64]``
+ -
+ * - __u8
+ - ``scaling_list_16x16[6][64]``
+ -
+ * - __u8
+ - ``scaling_list_32x32[2][64]``
+ -
+ * - __u8
+ - ``scaling_list_dc_coef_16x16[6]``
+ -
+ * - __u8
+ - ``scaling_list_dc_coef_32x32[2]``
+ -
+
``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)``
Specifies the decoding mode to use. Currently exposes slice-based and
frame-based decoding but new modes might be added later on.
diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
index 561bda112809..3aabc322daa4 100644
--- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
@@ -207,6 +207,7 @@ Compressed Formats
* ``V4L2_CID_MPEG_VIDEO_HEVC_SPS``
* ``V4L2_CID_MPEG_VIDEO_HEVC_PPS``
* ``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS``
+ * ``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX``
See the :ref:`associated Codec Control IDs <v4l2-mpeg-hevc>`.
Buffers associated with this pixel format must contain the appropriate
number of macroblocks to decode a full corresponding frame.
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index b4caf2d4d076..2803165cbc6a 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -975,6 +975,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_HEVC_SPS: return "HEVC Sequence Parameter Set";
case V4L2_CID_MPEG_VIDEO_HEVC_PPS: return "HEVC Picture Parameter Set";
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: return "HEVC Slice Parameters";
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX: return "HEVC Scaling Matrix";
case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode";
case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code";
@@ -1407,6 +1408,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS:
*type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS;
break;
+ case V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX:
+ *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX;
+ break;
case V4L2_CID_UNIT_CELL_SIZE:
*type = V4L2_CTRL_TYPE_AREA;
*flags |= V4L2_CTRL_FLAG_READ_ONLY;
@@ -1856,6 +1860,9 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx,
zero_padding(*p_hevc_slice_params);
break;
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
+ break;
+
case V4L2_CTRL_TYPE_AREA:
area = p;
if (!area->width || !area->height)
@@ -2545,6 +2552,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS:
elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params);
break;
+ case V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX:
+ elem_size = sizeof(struct v4l2_ctrl_hevc_scaling_matrix);
+ break;
case V4L2_CTRL_TYPE_AREA:
elem_size = sizeof(struct v4l2_area);
break;
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index 1009cf0891cc..1592e52c3614 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -19,6 +19,7 @@
#define V4L2_CID_MPEG_VIDEO_HEVC_SPS (V4L2_CID_MPEG_BASE + 1008)
#define V4L2_CID_MPEG_VIDEO_HEVC_PPS (V4L2_CID_MPEG_BASE + 1009)
#define V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS (V4L2_CID_MPEG_BASE + 1010)
+#define V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (V4L2_CID_MPEG_BASE + 1011)
#define V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (V4L2_CID_MPEG_BASE + 1015)
#define V4L2_CID_MPEG_VIDEO_HEVC_START_CODE (V4L2_CID_MPEG_BASE + 1016)
@@ -26,6 +27,7 @@
#define V4L2_CTRL_TYPE_HEVC_SPS 0x0120
#define V4L2_CTRL_TYPE_HEVC_PPS 0x0121
#define V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS 0x0122
+#define V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX 0x0123
enum v4l2_mpeg_video_hevc_decode_mode {
V4L2_MPEG_VIDEO_HEVC_DECODE_MODE_SLICE_BASED,
@@ -209,4 +211,13 @@ struct v4l2_ctrl_hevc_slice_params {
__u64 flags;
};
+struct v4l2_ctrl_hevc_scaling_matrix {
+ __u8 scaling_list_4x4[6][16];
+ __u8 scaling_list_8x8[6][64];
+ __u8 scaling_list_16x16[6][64];
+ __u8 scaling_list_32x32[2][64];
+ __u8 scaling_list_dc_coef_16x16[6];
+ __u8 scaling_list_dc_coef_32x32[2];
+};
+
#endif
--
2.23.0
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/4] media: cedrus: hevc: Add support for scaling matrix
2019-10-26 17:46 [PATCH 0/4] media: cedrus: hevc: Add support for scaling matrix and multi-slice frames Jernej Skrabec
2019-10-26 17:47 ` [PATCH 1/4] media: uapi: hevc: Add scaling matrix control Jernej Skrabec
@ 2019-10-26 17:47 ` Jernej Skrabec
2019-10-26 17:47 ` [PATCH 3/4] media: uapi: hevc: Add segment address field Jernej Skrabec
2019-10-26 17:47 ` [PATCH 4/4] media: cedrus: hevc: Add support for multiple slices Jernej Skrabec
3 siblings, 0 replies; 6+ messages in thread
From: Jernej Skrabec @ 2019-10-26 17:47 UTC (permalink / raw)
To: mripard, paul.kocialkowski
Cc: devel, gregkh, linux-sunxi, linux-kernel, wens, boris.brezillon,
p.zabel, hverkuil-cisco, mchehab, ezequiel, linux-arm-kernel,
linux-media
HEVC frames may use scaling list feature. Add support for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 7 ++
drivers/staging/media/sunxi/cedrus/cedrus.h | 1 +
.../staging/media/sunxi/cedrus/cedrus_dec.c | 2 +
.../staging/media/sunxi/cedrus/cedrus_h265.c | 70 ++++++++++++++++++-
.../staging/media/sunxi/cedrus/cedrus_regs.h | 2 +
5 files changed, 81 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
index c6ddd46eff82..bf68bc6b20c8 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
@@ -116,6 +116,13 @@ static const struct cedrus_control cedrus_controls[] = {
.codec = CEDRUS_CODEC_H265,
.required = true,
},
+ {
+ .cfg = {
+ .id = V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX,
+ },
+ .codec = CEDRUS_CODEC_H265,
+ .required = true,
+ },
{
.cfg = {
.id = V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE,
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
index 96765555ab8a..d945f4f0ff2d 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
@@ -73,6 +73,7 @@ struct cedrus_h265_run {
const struct v4l2_ctrl_hevc_sps *sps;
const struct v4l2_ctrl_hevc_pps *pps;
const struct v4l2_ctrl_hevc_slice_params *slice_params;
+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix;
};
struct cedrus_run {
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
index 4a2fc33a1d79..327ed6c264dc 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
@@ -66,6 +66,8 @@ void cedrus_device_run(void *priv)
V4L2_CID_MPEG_VIDEO_HEVC_PPS);
run.h265.slice_params = cedrus_find_control_data(ctx,
V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS);
+ run.h265.scaling_matrix = cedrus_find_control_data(ctx,
+ V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX);
break;
default:
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 6945dc74e1d7..888bfd5ca224 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -220,6 +220,69 @@ static void cedrus_h265_pred_weight_write(struct cedrus_dev *dev,
}
}
+static void cedrus_h265_write_scaling_list(struct cedrus_ctx *ctx,
+ struct cedrus_run *run)
+{
+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling;
+ struct cedrus_dev *dev = ctx->dev;
+ u32 i, j, k, val;
+
+ scaling = run->h265.scaling_matrix;
+
+ cedrus_write(dev, VE_DEC_H265_SCALING_LIST_DC_COEF0,
+ (scaling->scaling_list_dc_coef_32x32[1] << 24) |
+ (scaling->scaling_list_dc_coef_32x32[0] << 16) |
+ (scaling->scaling_list_dc_coef_16x16[1] << 8) |
+ (scaling->scaling_list_dc_coef_16x16[0] << 0));
+
+ cedrus_write(dev, VE_DEC_H265_SCALING_LIST_DC_COEF1,
+ (scaling->scaling_list_dc_coef_16x16[5] << 24) |
+ (scaling->scaling_list_dc_coef_16x16[4] << 16) |
+ (scaling->scaling_list_dc_coef_16x16[3] << 8) |
+ (scaling->scaling_list_dc_coef_16x16[2] << 0));
+
+ cedrus_h265_sram_write_offset(dev, VE_DEC_H265_SRAM_OFFSET_SCALING_LISTS);
+
+ for (i = 0; i < 6; i++)
+ for (j = 0; j < 8; j++)
+ for (k = 0; k < 8; k += 4) {
+ val = ((u32)scaling->scaling_list_8x8[i][j + (k + 3) * 8] << 24) |
+ ((u32)scaling->scaling_list_8x8[i][j + (k + 2) * 8] << 16) |
+ ((u32)scaling->scaling_list_8x8[i][j + (k + 1) * 8] << 8) |
+ scaling->scaling_list_8x8[i][j + k * 8];
+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val);
+ }
+
+ for (i = 0; i < 2; i++)
+ for (j = 0; j < 8; j++)
+ for (k = 0; k < 8; k += 4) {
+ val = ((u32)scaling->scaling_list_32x32[i][j + (k + 3) * 8] << 24) |
+ ((u32)scaling->scaling_list_32x32[i][j + (k + 2) * 8] << 16) |
+ ((u32)scaling->scaling_list_32x32[i][j + (k + 1) * 8] << 8) |
+ scaling->scaling_list_32x32[i][j + k * 8];
+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val);
+ }
+
+ for (i = 0; i < 6; i++)
+ for (j = 0; j < 8; j++)
+ for (k = 0; k < 8; k += 4) {
+ val = ((u32)scaling->scaling_list_16x16[i][j + (k + 3) * 8] << 24) |
+ ((u32)scaling->scaling_list_16x16[i][j + (k + 2) * 8] << 16) |
+ ((u32)scaling->scaling_list_16x16[i][j + (k + 1) * 8] << 8) |
+ scaling->scaling_list_16x16[i][j + k * 8];
+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val);
+ }
+
+ for (i = 0; i < 6; i++)
+ for (j = 0; j < 4; j++) {
+ val = ((u32)scaling->scaling_list_4x4[i][j + 12] << 24) |
+ ((u32)scaling->scaling_list_4x4[i][j + 8] << 16) |
+ ((u32)scaling->scaling_list_4x4[i][j + 4] << 8) |
+ scaling->scaling_list_4x4[i][j];
+ cedrus_write(dev, VE_DEC_H265_SRAM_DATA, val);
+ }
+}
+
static void cedrus_h265_setup(struct cedrus_ctx *ctx,
struct cedrus_run *run)
{
@@ -499,7 +562,12 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
/* Scaling list. */
- reg = VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT;
+ if (sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED) {
+ cedrus_h265_write_scaling_list(ctx, run);
+ reg = VE_DEC_H265_SCALING_LIST_CTRL0_FLAG_ENABLED;
+ } else {
+ reg = VE_DEC_H265_SCALING_LIST_CTRL0_DEFAULT;
+ }
cedrus_write(dev, VE_DEC_H265_SCALING_LIST_CTRL0, reg);
/* Neightbor information address. */
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
index 7beb03d3bb39..0d9449fe2b28 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_regs.h
@@ -492,6 +492,8 @@
#define VE_DEC_H265_ENTRY_POINT_OFFSET_ADDR (VE_ENGINE_DEC_H265 + 0x64)
#define VE_DEC_H265_TILE_START_CTB (VE_ENGINE_DEC_H265 + 0x68)
#define VE_DEC_H265_TILE_END_CTB (VE_ENGINE_DEC_H265 + 0x6c)
+#define VE_DEC_H265_SCALING_LIST_DC_COEF0 (VE_ENGINE_DEC_H265 + 0x78)
+#define VE_DEC_H265_SCALING_LIST_DC_COEF1 (VE_ENGINE_DEC_H265 + 0x7c)
#define VE_DEC_H265_LOW_ADDR (VE_ENGINE_DEC_H265 + 0x80)
--
2.23.0
_______________________________________________
devel mailing list
devel@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 3/4] media: uapi: hevc: Add segment address field
2019-10-26 17:46 [PATCH 0/4] media: cedrus: hevc: Add support for scaling matrix and multi-slice frames Jernej Skrabec
2019-10-26 17:47 ` [PATCH 1/4] media: uapi: hevc: Add scaling matrix control Jernej Skrabec
2019-10-26 17:47 ` [PATCH 2/4] media: cedrus: hevc: Add support for scaling matrix Jernej Skrabec
@ 2019-10-26 17:47 ` Jernej Skrabec
2019-10-26 17:47 ` [PATCH 4/4] media: cedrus: hevc: Add support for multiple slices Jernej Skrabec
3 siblings, 0 replies; 6+ messages in thread
From: Jernej Skrabec @ 2019-10-26 17:47 UTC (permalink / raw)
To: mripard, paul.kocialkowski
Cc: devel, gregkh, linux-sunxi, linux-kernel, wens, boris.brezillon,
p.zabel, hverkuil-cisco, mchehab, ezequiel, linux-arm-kernel,
linux-media
If HEVC frame consists of multiple slices, segment address has to be
known in order to properly decode it.
Add segment address field to slice parameters.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
Documentation/media/uapi/v4l/ext-ctrls-codec.rst | 5 ++++-
include/media/hevc-ctrls.h | 5 ++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
index 382e85e16444..99e4a7099614 100644
--- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst
@@ -3971,6 +3971,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
* - __u32
- ``data_bit_offset``
- Offset (in bits) to the video data in the current slice data.
+ * - __u32
+ - ``slice_segment_addr``
+ -
* - __u8
- ``nal_unit_type``
-
@@ -4048,7 +4051,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
- ``num_rps_poc_lt_curr``
- The number of reference pictures in the long-term set.
* - __u8
- - ``padding[7]``
+ - ``padding[5]``
- Applications and drivers must set this to zero.
* - struct :c:type:`v4l2_hevc_dpb_entry`
- ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]``
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index 1592e52c3614..3e2e32098312 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -167,6 +167,9 @@ struct v4l2_ctrl_hevc_slice_params {
__u32 bit_size;
__u32 data_bit_offset;
+ /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
+ __u32 slice_segment_addr;
+
/* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */
__u8 nal_unit_type;
__u8 nuh_temporal_id_plus1;
@@ -200,7 +203,7 @@ struct v4l2_ctrl_hevc_slice_params {
__u8 num_rps_poc_st_curr_after;
__u8 num_rps_poc_lt_curr;
- __u8 padding;
+ __u8 padding[5];
/* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
--
2.23.0
_______________________________________________
devel mailing list
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http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 4/4] media: cedrus: hevc: Add support for multiple slices
2019-10-26 17:46 [PATCH 0/4] media: cedrus: hevc: Add support for scaling matrix and multi-slice frames Jernej Skrabec
` (2 preceding siblings ...)
2019-10-26 17:47 ` [PATCH 3/4] media: uapi: hevc: Add segment address field Jernej Skrabec
@ 2019-10-26 17:47 ` Jernej Skrabec
2019-10-27 21:56 ` [linux-sunxi] " Jernej Škrabec
3 siblings, 1 reply; 6+ messages in thread
From: Jernej Skrabec @ 2019-10-26 17:47 UTC (permalink / raw)
To: mripard, paul.kocialkowski
Cc: devel, gregkh, linux-sunxi, linux-kernel, wens, boris.brezillon,
p.zabel, hverkuil-cisco, mchehab, ezequiel, linux-arm-kernel,
linux-media
Now that segment address is available, support for multi-slice frames
can be easily added.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
.../staging/media/sunxi/cedrus/cedrus_h265.c | 21 +++++++++++++++----
.../staging/media/sunxi/cedrus/cedrus_video.c | 1 +
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 888bfd5ca224..e909adf6f30f 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -366,15 +366,28 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
reg = VE_DEC_H265_BITS_END_ADDR_BASE(src_buf_end_addr);
cedrus_write(dev, VE_DEC_H265_BITS_END_ADDR, reg);
- /* Coding tree block address: start at the beginning. */
+ /* Coding tree block address */
reg = VE_DEC_H265_DEC_CTB_ADDR_X(0) | VE_DEC_H265_DEC_CTB_ADDR_Y(0);
+ if (!ctx->fh.m2m_ctx->new_frame) {
+ unsigned int log2_max_luma_coding_block_size =
+ sps->log2_min_luma_coding_block_size_minus3 + 3 +
+ sps->log2_diff_max_min_luma_coding_block_size;
+ unsigned int ctb_size_luma =
+ 1UL << log2_max_luma_coding_block_size;
+ unsigned int width_in_ctb_luma =
+ DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma);
+
+ reg = VE_DEC_H265_DEC_CTB_ADDR_X(slice_params->slice_segment_addr % width_in_ctb_luma);
+ reg |= VE_DEC_H265_DEC_CTB_ADDR_Y(slice_params->slice_segment_addr / width_in_ctb_luma);
+ }
cedrus_write(dev, VE_DEC_H265_DEC_CTB_ADDR, reg);
cedrus_write(dev, VE_DEC_H265_TILE_START_CTB, 0);
cedrus_write(dev, VE_DEC_H265_TILE_END_CTB, 0);
/* Clear the number of correctly-decoded coding tree blocks. */
- cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
+ if (ctx->fh.m2m_ctx->new_frame)
+ cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
/* Initialize bitstream access. */
cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC);
@@ -523,8 +536,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT,
pps->flags);
- /* FIXME: For multi-slice support. */
- reg |= VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
+ if (ctx->fh.m2m_ctx->new_frame)
+ reg |= VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
cedrus_write(dev, VE_DEC_H265_DEC_SLICE_HDR_INFO0, reg);
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
index 15cf1f10221b..497b1199d3fe 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
@@ -311,6 +311,7 @@ static int cedrus_s_fmt_vid_out(struct file *file, void *priv,
switch (ctx->src_fmt.pixelformat) {
case V4L2_PIX_FMT_H264_SLICE:
+ case V4L2_PIX_FMT_HEVC_SLICE:
vq->subsystem_flags |=
VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF;
break;
--
2.23.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [linux-sunxi] [PATCH 4/4] media: cedrus: hevc: Add support for multiple slices
2019-10-26 17:47 ` [PATCH 4/4] media: cedrus: hevc: Add support for multiple slices Jernej Skrabec
@ 2019-10-27 21:56 ` Jernej Škrabec
0 siblings, 0 replies; 6+ messages in thread
From: Jernej Škrabec @ 2019-10-27 21:56 UTC (permalink / raw)
To: linux-sunxi
Cc: devel, gregkh, linux-kernel, mripard, paul.kocialkowski, wens,
boris.brezillon, p.zabel, hverkuil-cisco, mchehab, ezequiel,
linux-arm-kernel, linux-media
Dne sobota, 26. oktober 2019 ob 19:47:03 CET je Jernej Skrabec napisal(a):
> Now that segment address is available, support for multi-slice frames
> can be easily added.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
> .../staging/media/sunxi/cedrus/cedrus_h265.c | 21 +++++++++++++++----
> .../staging/media/sunxi/cedrus/cedrus_video.c | 1 +
> 2 files changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index
> 888bfd5ca224..e909adf6f30f 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> @@ -366,15 +366,28 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
> reg = VE_DEC_H265_BITS_END_ADDR_BASE(src_buf_end_addr);
> cedrus_write(dev, VE_DEC_H265_BITS_END_ADDR, reg);
>
> - /* Coding tree block address: start at the beginning. */
> + /* Coding tree block address */
> reg = VE_DEC_H265_DEC_CTB_ADDR_X(0) |
VE_DEC_H265_DEC_CTB_ADDR_Y(0);
> + if (!ctx->fh.m2m_ctx->new_frame) {
There is no reason why would this block be guarded by above if clause. I'll
remove it in next revision. However, it uncovered a bug where new_frame is set
to true for every slice. I have to debug this further. At this point I can't
say for sure if it is in kernel or in ffmpeg.
Best regards,
Jernej
> + unsigned int log2_max_luma_coding_block_size =
> + sps->log2_min_luma_coding_block_size_minus3 +
3 +
> + sps->log2_diff_max_min_luma_coding_block_size;
> + unsigned int ctb_size_luma =
> + 1UL << log2_max_luma_coding_block_size;
> + unsigned int width_in_ctb_luma =
> + DIV_ROUND_UP(sps->pic_width_in_luma_samples,
ctb_size_luma);
> +
> + reg = VE_DEC_H265_DEC_CTB_ADDR_X(slice_params-
>slice_segment_addr %
> width_in_ctb_luma); + reg |=
> VE_DEC_H265_DEC_CTB_ADDR_Y(slice_params->slice_segment_addr /
> width_in_ctb_luma); + }
> cedrus_write(dev, VE_DEC_H265_DEC_CTB_ADDR, reg);
>
> cedrus_write(dev, VE_DEC_H265_TILE_START_CTB, 0);
> cedrus_write(dev, VE_DEC_H265_TILE_END_CTB, 0);
>
> /* Clear the number of correctly-decoded coding tree blocks. */
> - cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
> + if (ctx->fh.m2m_ctx->new_frame)
> + cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
>
> /* Initialize bitstream access. */
> cedrus_write(dev, VE_DEC_H265_TRIGGER,
VE_DEC_H265_TRIGGER_INIT_SWDEC);
> @@ -523,8 +536,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
>
V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT,
> pps->flags);
>
> - /* FIXME: For multi-slice support. */
> - reg |=
VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
> + if (ctx->fh.m2m_ctx->new_frame)
> + reg |=
VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
>
> cedrus_write(dev, VE_DEC_H265_DEC_SLICE_HDR_INFO0, reg);
>
> diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> b/drivers/staging/media/sunxi/cedrus/cedrus_video.c index
> 15cf1f10221b..497b1199d3fe 100644
> --- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> +++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
> @@ -311,6 +311,7 @@ static int cedrus_s_fmt_vid_out(struct file *file, void
> *priv,
>
> switch (ctx->src_fmt.pixelformat) {
> case V4L2_PIX_FMT_H264_SLICE:
> + case V4L2_PIX_FMT_HEVC_SLICE:
> vq->subsystem_flags |=
> VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF;
> break;
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^ permalink raw reply [flat|nested] 6+ messages in thread