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From: Stephen Boyd <sboyd@kernel.org>
To: Shubhrajyoti Datta <shubhrajyoti.datta@gmail.com>
Cc: devel@driverdev.osuosl.org, Mark Rutland <mark.rutland@arm.com>,
	list@osuosl.org,
	OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
	<devicetree@vger.kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Mike Turquette <mturquette@baylibre.com>,
	Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	open@osuosl.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v3 07/10] clk: clock-wizard: Update the fixed factor divisors
Date: Sun, 05 Jan 2020 22:10:43 -0800
Message-ID: <20200106061044.7A73C215A4@mail.kernel.org> (raw)
In-Reply-To: <CAKfKVtGZGw7FydE+3PJxbYW_JHB3hi_Mr144A+gvUfX24ffaDg@mail.gmail.com>

Quoting Shubhrajyoti Datta (2020-01-05 20:17:16)
> On Mon, Jan 6, 2020 at 1:30 AM Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting shubhrajyoti.datta@gmail.com (2019-11-27 22:36:14)
> > > From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > >
> > > Update the fixed factor clock registration to register the divisors.
> > >
> > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > > ---
> > >  drivers/clk/clk-xlnx-clock-wizard.c | 17 +++++++++++------
> > >  1 file changed, 11 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/clk/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c
> > > index 4c6155b..75ea745 100644
> > > --- a/drivers/clk/clk-xlnx-clock-wizard.c
> > > +++ b/drivers/clk/clk-xlnx-clock-wizard.c
> > > @@ -491,9 +491,11 @@ static int clk_wzrd_probe(struct platform_device *pdev)
> > >         u32 reg, reg_f, mult;
> > >         unsigned long rate;
> > >         const char *clk_name;
> > > +       void __iomem *ctrl_reg;
> > >         struct clk_wzrd *clk_wzrd;
> > >         struct resource *mem;
> > >         int outputs;
> > > +       unsigned long flags = 0;
> > >         struct device_node *np = pdev->dev.of_node;
> > >
> > >         clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL);
> > > @@ -564,19 +566,22 @@ static int clk_wzrd_probe(struct platform_device *pdev)
> > >                 goto err_disable_clk;
> > >         }
> > >
> > > -       /* register div */
> > > -       reg = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(0)) &
> > > -                       WZRD_DIVCLK_DIVIDE_MASK) >> WZRD_DIVCLK_DIVIDE_SHIFT;
> > > +       outputs = of_property_count_strings(np, "clock-output-names");
> > > +       if (outputs == 1)
> > > +               flags = CLK_SET_RATE_PARENT;
> >
> > What does the number of clk outputs have to do with the ability to
> > change the rate of a parent clk? The commit text doesn't inform me of
> > what this is for either. Please help us understand.
> 
> If there are multiple clocks then changing the rate of the parent
> changes the rate of all the
> outputs so we donot allow changing the rate of the parent if there are
> multiple clocks.
> If there is only one output then that is not an issue.

Maybe your downstream consumers should use the rate locking APIs instead
of having this restriction in the provider driver? Look at
clk_set_rate_exclusive() and associated APIs.

> 
> I will update the description in the next version.
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Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-28  6:36 [PATCH v3 00/10] clk: clk-wizard: clock-wizard: Driver updates shubhrajyoti.datta
2019-11-28  6:36 ` [PATCH v3 01/10] dt-bindings: add documentation of xilinx clocking wizard shubhrajyoti.datta
2019-12-13 19:52   ` Rob Herring
2019-11-28  6:36 ` [PATCH v3 02/10] clk: clock-wizard: Move the clockwizard to clk shubhrajyoti.datta
2019-12-13 19:49   ` Rob Herring
2019-11-28  6:36 ` [PATCH v3 03/10] clk: clock-wizard: Fix kernel-doc warning shubhrajyoti.datta
2020-01-05 19:48   ` Stephen Boyd
2019-11-28  6:36 ` [PATCH v3 04/10] clk: clock-wizard: Add support for dynamic reconfiguration shubhrajyoti.datta
2020-01-05 19:54   ` Stephen Boyd
2019-11-28  6:36 ` [PATCH v3 05/10] clk: clock-wizard: Add support for fractional support shubhrajyoti.datta
2019-11-28  6:36 ` [PATCH v3 06/10] clk: clock-wizard: Remove the hardcoding of the clock outputs shubhrajyoti.datta
2020-01-05 19:56   ` Stephen Boyd
2019-11-28  6:36 ` [PATCH v3 07/10] clk: clock-wizard: Update the fixed factor divisors shubhrajyoti.datta
2020-01-05 20:00   ` Stephen Boyd
2020-01-06  4:17     ` Shubhrajyoti Datta
2020-01-06  6:10       ` Stephen Boyd [this message]
2019-11-28  6:36 ` [PATCH v3 08/10] clk: clock-wizard: Make the output names unique shubhrajyoti.datta
2019-11-28  7:45   ` Dan Carpenter
2019-11-29 12:07     ` Shubhrajyoti Datta
2019-11-29 19:02       ` Dan Carpenter
2019-11-28  6:36 ` [PATCH v3 09/10] staging: clocking-wizard: Delete the driver from the staging shubhrajyoti.datta
2020-01-05 19:45   ` Stephen Boyd
2019-11-28  6:36 ` [PATCH v3 10/10] clk: clock-wizard: Fix the compilation failure shubhrajyoti.datta
2020-01-05 19:46   ` Stephen Boyd

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