[PATCH 0/2] staging: mt7621-pci: make gpios 8 and 9 vendor specific

[PATCH 0/2] staging: mt7621-pci: make gpios 8 and 9 vendor specific

[Sergio Paracuellos]

According to this:
* http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2020-March/142533.html

Gpio's 8 and 9 must be vendor specific and properly be set up
in device tree specific vendor file.

After this changes release part in the driver is not needed anymore
because we rely in the fact that device tree is correct.

This changes have been tested in a gnubee pc1.

Sergio Paracuellos (2):
  staging: mt7621-dts: gpio 8 and 9 are vendor specific
  staging: mt7621-pci: delete release gpios related code

 drivers/staging/mt7621-dts/gbpc1.dts    |  4 ++++
 drivers/staging/mt7621-dts/mt7621.dtsi  |  4 +---
 drivers/staging/mt7621-pci/pci-mt7621.c | 27 +++++++------------------
 3 files changed, 12 insertions(+), 23 deletions(-)

-- 
2.25.1

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[PATCH 1/2] staging: mt7621-dts: gpio 8 and 9 are vendor specific

[Sergio Paracuellos]

There are three pins that can be used for reset gpios.
As mentioned in the application note, there are two
possible way of wiring pcie reset:
* connect gpio19 to all pcie reset pins
* connect gpio19 to pcie0 reset and pick two other
gpios for pcie1 and pcie2

gpio7 and gpio8 may not be used as pcie reset and are
vendor specific. Hence, maintain common mt7621.dtsi with
only gpio19 which is common and make an overlay for gnubee
board which uses all gpio's as resets for pcie. After this
changes release gpios in driver code is not needed anymore.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-dts/gbpc1.dts   | 4 ++++
 drivers/staging/mt7621-dts/mt7621.dtsi | 4 +---
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/mt7621-dts/gbpc1.dts b/drivers/staging/mt7621-dts/gbpc1.dts
index 1fb560ff059c..a7c0d3115d72 100644
--- a/drivers/staging/mt7621-dts/gbpc1.dts
+++ b/drivers/staging/mt7621-dts/gbpc1.dts
@@ -114,6 +114,10 @@ &cpuclock {
 &pcie {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_pins>;
+
+	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
+			<&gpio 8 GPIO_ACTIVE_LOW>,
+			<&gpio 7 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
 
diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi
index 10fb497cf81a..9e5cf68731bb 100644
--- a/drivers/staging/mt7621-dts/mt7621.dtsi
+++ b/drivers/staging/mt7621-dts/mt7621.dtsi
@@ -538,9 +538,7 @@ pcie: pcie@1e140000 {
 		phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
 		phy-names = "pcie-phy0", "pcie-phy2";
 
-		reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
-				<&gpio 8 GPIO_ACTIVE_LOW>,
-				<&gpio 7 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
 
 		pcie@0,0 {
 			reg = <0x0000 0 0 0 0>;
-- 
2.25.1

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[PATCH 2/2] staging: mt7621-pci: delete release gpios related code

[Sergio Paracuellos]

Making gpio8 and gpio9 vendor specific and putting them
into the specific dts file makes not needed to release
gpios anymore because we are not occupying those pins
in the first place if it is not necessary. When the
device tree is parsed we can also check and return for
the error because we rely in the fact that the related
device for the board is correct.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 drivers/staging/mt7621-pci/pci-mt7621.c | 27 +++++++------------------
 1 file changed, 7 insertions(+), 20 deletions(-)

diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index 23b51789f72e..1a76968b70c3 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -364,8 +364,8 @@ static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie,
 	port->gpio_rst = devm_gpiod_get_index_optional(dev, "reset", slot,
 						       GPIOD_OUT_LOW);
 	if (IS_ERR(port->gpio_rst)) {
-		dev_notice(dev, "Failed to get GPIO for PCIe%d\n", slot);
-		port->gpio_rst = NULL;
+		dev_err(dev, "Failed to get GPIO for PCIe%d\n", slot);
+		return PTR_ERR(port->gpio_rst);
 	}
 
 	port->slot = slot;
@@ -474,15 +474,6 @@ static void mt7621_pcie_reset_ep_deassert(struct mt7621_pcie *pcie)
 	mdelay(PERST_DELAY_MS);
 }
 
-static void mt7621_pcie_release_gpios(struct mt7621_pcie *pcie)
-{
-	struct mt7621_pcie_port *port;
-
-	list_for_each_entry(port, &pcie->ports, list)
-		if (port->gpio_rst)
-			gpiod_put(port->gpio_rst);
-}
-
 static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
 {
 	struct device *dev = pcie->dev;
@@ -684,7 +675,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
 	err = mt7621_pci_parse_request_of_pci_ranges(pcie);
 	if (err) {
 		dev_err(dev, "Error requesting pci resources from ranges");
-		goto out_release_gpios;
+		return err;
 	}
 
 	/* set resources limits */
@@ -698,8 +689,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
 	err = mt7621_pcie_init_virtual_bridges(pcie);
 	if (err) {
 		dev_err(dev, "Nothing is connected in virtual bridges. Exiting...");
-		err = 0;
-		goto out_release_gpios;
+		return 0;
 	}
 
 	mt7621_pcie_enable_ports(pcie);
@@ -709,19 +699,16 @@ static int mt7621_pci_probe(struct platform_device *pdev)
 	err = mt7621_pcie_request_resources(pcie, &res);
 	if (err) {
 		dev_err(dev, "Error requesting resources\n");
-		goto out_release_gpios;
+		return err;
 	}
 
 	err = mt7621_pcie_register_host(bridge, &res);
 	if (err) {
 		dev_err(dev, "Error registering host\n");
-		goto out_release_gpios;
+		return err;
 	}
 
-out_release_gpios:
-	mt7621_pcie_release_gpios(pcie);
-
-	return err;
+	return 0;
 }
 
 static const struct of_device_id mt7621_pci_ids[] = {
-- 
2.25.1

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