From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Andy Yan <andy.yan@rock-chips.com>,
Algea Cao <algea.cao@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver
Date: Fri, 19 Jan 2024 23:47:18 +0100 [thread overview]
Message-ID: <eodlujrytdm6gugcbaz3efnjvgg7sbvsqedwllmleh4ar6e7cr@3ejicokdjzcd> (raw)
In-Reply-To: <20240119193806.1030214-4-cristian.ciocaltea@collabora.com>
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Hi Cristian,
On Fri, Jan 19, 2024 at 09:38:03PM +0200, Cristian Ciocaltea wrote:
> Add driver for the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC.
>
> The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL
> and eDP links. The maximum data rate is 12Gbps (HDMI 2.1 FRL), while
> the minimum is 250Mbps (HDMI 2.1 TMDS).
>
> Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
The driver has multiple sequences looking like this (this is just one
example of many):
> + hdptx_write(hdptx, CMN_REG0087, 0x04);
> + hdptx_write(hdptx, CMN_REG0089, 0x00);
> + hdptx_write(hdptx, CMN_REG008A, 0x55);
> + hdptx_write(hdptx, CMN_REG008B, 0x25);
> + hdptx_write(hdptx, CMN_REG008C, 0x2c);
> + hdptx_write(hdptx, CMN_REG008D, 0x22);
> + hdptx_write(hdptx, CMN_REG008E, 0x14);
> + hdptx_write(hdptx, CMN_REG008F, 0x20);
> + hdptx_write(hdptx, CMN_REG0090, 0x00);
> + hdptx_write(hdptx, CMN_REG0091, 0x00);
> + hdptx_write(hdptx, CMN_REG0092, 0x00);
> + hdptx_write(hdptx, CMN_REG0093, 0x00);
> + hdptx_write(hdptx, CMN_REG0095, 0x00);
> + hdptx_write(hdptx, CMN_REG0097, 0x02);
> + hdptx_write(hdptx, CMN_REG0099, 0x04);
> + hdptx_write(hdptx, CMN_REG009A, 0x11);
> + hdptx_write(hdptx, CMN_REG009B, 0x00);
Instead of the repetitive calls to regmap_write, it's better to do
it like this:
static const struct reg_sequence some_init_seq[] = {
REG_SEQ0(CMN_REG0087, 0x04),
REG_SEQ0(CMN_REG0089, 0x00),
REG_SEQ0(CMN_REG008A, 0x55),
REG_SEQ0(CMN_REG008B, 0x25),
REG_SEQ0(CMN_REG008C, 0x2c),
REG_SEQ0(CMN_REG008D, 0x22),
REG_SEQ0(CMN_REG008E, 0x14),
REG_SEQ0(CMN_REG008F, 0x20),
REG_SEQ0(CMN_REG0090, 0x00),
REG_SEQ0(CMN_REG0091, 0x00),
REG_SEQ0(CMN_REG0092, 0x00),
REG_SEQ0(CMN_REG0093, 0x00),
REG_SEQ0(CMN_REG0095, 0x00),
REG_SEQ0(CMN_REG0097, 0x02),
REG_SEQ0(CMN_REG0099, 0x04),
REG_SEQ0(CMN_REG009A, 0x11),
REG_SEQ0(CMN_REG009B, 0x00),
};
regmap_multi_reg_write(hdptx->regmap, some_init_seq, ARRAY_SIZE(some_init_seq));
> +static const struct of_device_id rockchip_hdptx_phy_of_match[] = {
> + { .compatible = "rockchip,rk3588-hdptx-phy", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, rockchip_hdptx_phy_of_match);
> +
> +static struct platform_driver rockchip_hdptx_phy_driver = {
> + .probe = rockchip_hdptx_phy_probe,
> + .driver = {
> + .name = "rockchip-hdptx-phy",
> + .pm = &rockchip_hdptx_phy_pm_ops,
> + .of_match_table = of_match_ptr(rockchip_hdptx_phy_of_match),
Remove of_match_ptr(). It's a nop, since the driver depends on OF.
Greetings,
-- Sebastian
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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Andy Yan <andy.yan@rock-chips.com>,
Algea Cao <algea.cao@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver
Date: Fri, 19 Jan 2024 23:47:18 +0100 [thread overview]
Message-ID: <eodlujrytdm6gugcbaz3efnjvgg7sbvsqedwllmleh4ar6e7cr@3ejicokdjzcd> (raw)
In-Reply-To: <20240119193806.1030214-4-cristian.ciocaltea@collabora.com>
[-- Attachment #1.1: Type: text/plain, Size: 2715 bytes --]
Hi Cristian,
On Fri, Jan 19, 2024 at 09:38:03PM +0200, Cristian Ciocaltea wrote:
> Add driver for the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC.
>
> The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL
> and eDP links. The maximum data rate is 12Gbps (HDMI 2.1 FRL), while
> the minimum is 250Mbps (HDMI 2.1 TMDS).
>
> Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
The driver has multiple sequences looking like this (this is just one
example of many):
> + hdptx_write(hdptx, CMN_REG0087, 0x04);
> + hdptx_write(hdptx, CMN_REG0089, 0x00);
> + hdptx_write(hdptx, CMN_REG008A, 0x55);
> + hdptx_write(hdptx, CMN_REG008B, 0x25);
> + hdptx_write(hdptx, CMN_REG008C, 0x2c);
> + hdptx_write(hdptx, CMN_REG008D, 0x22);
> + hdptx_write(hdptx, CMN_REG008E, 0x14);
> + hdptx_write(hdptx, CMN_REG008F, 0x20);
> + hdptx_write(hdptx, CMN_REG0090, 0x00);
> + hdptx_write(hdptx, CMN_REG0091, 0x00);
> + hdptx_write(hdptx, CMN_REG0092, 0x00);
> + hdptx_write(hdptx, CMN_REG0093, 0x00);
> + hdptx_write(hdptx, CMN_REG0095, 0x00);
> + hdptx_write(hdptx, CMN_REG0097, 0x02);
> + hdptx_write(hdptx, CMN_REG0099, 0x04);
> + hdptx_write(hdptx, CMN_REG009A, 0x11);
> + hdptx_write(hdptx, CMN_REG009B, 0x00);
Instead of the repetitive calls to regmap_write, it's better to do
it like this:
static const struct reg_sequence some_init_seq[] = {
REG_SEQ0(CMN_REG0087, 0x04),
REG_SEQ0(CMN_REG0089, 0x00),
REG_SEQ0(CMN_REG008A, 0x55),
REG_SEQ0(CMN_REG008B, 0x25),
REG_SEQ0(CMN_REG008C, 0x2c),
REG_SEQ0(CMN_REG008D, 0x22),
REG_SEQ0(CMN_REG008E, 0x14),
REG_SEQ0(CMN_REG008F, 0x20),
REG_SEQ0(CMN_REG0090, 0x00),
REG_SEQ0(CMN_REG0091, 0x00),
REG_SEQ0(CMN_REG0092, 0x00),
REG_SEQ0(CMN_REG0093, 0x00),
REG_SEQ0(CMN_REG0095, 0x00),
REG_SEQ0(CMN_REG0097, 0x02),
REG_SEQ0(CMN_REG0099, 0x04),
REG_SEQ0(CMN_REG009A, 0x11),
REG_SEQ0(CMN_REG009B, 0x00),
};
regmap_multi_reg_write(hdptx->regmap, some_init_seq, ARRAY_SIZE(some_init_seq));
> +static const struct of_device_id rockchip_hdptx_phy_of_match[] = {
> + { .compatible = "rockchip,rk3588-hdptx-phy", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, rockchip_hdptx_phy_of_match);
> +
> +static struct platform_driver rockchip_hdptx_phy_driver = {
> + .probe = rockchip_hdptx_phy_probe,
> + .driver = {
> + .name = "rockchip-hdptx-phy",
> + .pm = &rockchip_hdptx_phy_pm_ops,
> + .of_match_table = of_match_ptr(rockchip_hdptx_phy_of_match),
Remove of_match_ptr(). It's a nop, since the driver depends on OF.
Greetings,
-- Sebastian
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_______________________________________________
Linux-rockchip mailing list
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Andy Yan <andy.yan@rock-chips.com>,
Algea Cao <algea.cao@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver
Date: Fri, 19 Jan 2024 23:47:18 +0100 [thread overview]
Message-ID: <eodlujrytdm6gugcbaz3efnjvgg7sbvsqedwllmleh4ar6e7cr@3ejicokdjzcd> (raw)
In-Reply-To: <20240119193806.1030214-4-cristian.ciocaltea@collabora.com>
[-- Attachment #1.1: Type: text/plain, Size: 2715 bytes --]
Hi Cristian,
On Fri, Jan 19, 2024 at 09:38:03PM +0200, Cristian Ciocaltea wrote:
> Add driver for the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC.
>
> The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL
> and eDP links. The maximum data rate is 12Gbps (HDMI 2.1 FRL), while
> the minimum is 250Mbps (HDMI 2.1 TMDS).
>
> Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
The driver has multiple sequences looking like this (this is just one
example of many):
> + hdptx_write(hdptx, CMN_REG0087, 0x04);
> + hdptx_write(hdptx, CMN_REG0089, 0x00);
> + hdptx_write(hdptx, CMN_REG008A, 0x55);
> + hdptx_write(hdptx, CMN_REG008B, 0x25);
> + hdptx_write(hdptx, CMN_REG008C, 0x2c);
> + hdptx_write(hdptx, CMN_REG008D, 0x22);
> + hdptx_write(hdptx, CMN_REG008E, 0x14);
> + hdptx_write(hdptx, CMN_REG008F, 0x20);
> + hdptx_write(hdptx, CMN_REG0090, 0x00);
> + hdptx_write(hdptx, CMN_REG0091, 0x00);
> + hdptx_write(hdptx, CMN_REG0092, 0x00);
> + hdptx_write(hdptx, CMN_REG0093, 0x00);
> + hdptx_write(hdptx, CMN_REG0095, 0x00);
> + hdptx_write(hdptx, CMN_REG0097, 0x02);
> + hdptx_write(hdptx, CMN_REG0099, 0x04);
> + hdptx_write(hdptx, CMN_REG009A, 0x11);
> + hdptx_write(hdptx, CMN_REG009B, 0x00);
Instead of the repetitive calls to regmap_write, it's better to do
it like this:
static const struct reg_sequence some_init_seq[] = {
REG_SEQ0(CMN_REG0087, 0x04),
REG_SEQ0(CMN_REG0089, 0x00),
REG_SEQ0(CMN_REG008A, 0x55),
REG_SEQ0(CMN_REG008B, 0x25),
REG_SEQ0(CMN_REG008C, 0x2c),
REG_SEQ0(CMN_REG008D, 0x22),
REG_SEQ0(CMN_REG008E, 0x14),
REG_SEQ0(CMN_REG008F, 0x20),
REG_SEQ0(CMN_REG0090, 0x00),
REG_SEQ0(CMN_REG0091, 0x00),
REG_SEQ0(CMN_REG0092, 0x00),
REG_SEQ0(CMN_REG0093, 0x00),
REG_SEQ0(CMN_REG0095, 0x00),
REG_SEQ0(CMN_REG0097, 0x02),
REG_SEQ0(CMN_REG0099, 0x04),
REG_SEQ0(CMN_REG009A, 0x11),
REG_SEQ0(CMN_REG009B, 0x00),
};
regmap_multi_reg_write(hdptx->regmap, some_init_seq, ARRAY_SIZE(some_init_seq));
> +static const struct of_device_id rockchip_hdptx_phy_of_match[] = {
> + { .compatible = "rockchip,rk3588-hdptx-phy", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, rockchip_hdptx_phy_of_match);
> +
> +static struct platform_driver rockchip_hdptx_phy_driver = {
> + .probe = rockchip_hdptx_phy_probe,
> + .driver = {
> + .name = "rockchip-hdptx-phy",
> + .pm = &rockchip_hdptx_phy_pm_ops,
> + .of_match_table = of_match_ptr(rockchip_hdptx_phy_of_match),
Remove of_match_ptr(). It's a nop, since the driver depends on OF.
Greetings,
-- Sebastian
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WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Andy Yan <andy.yan@rock-chips.com>,
Algea Cao <algea.cao@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@collabora.com
Subject: Re: [PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver
Date: Fri, 19 Jan 2024 23:47:18 +0100 [thread overview]
Message-ID: <eodlujrytdm6gugcbaz3efnjvgg7sbvsqedwllmleh4ar6e7cr@3ejicokdjzcd> (raw)
In-Reply-To: <20240119193806.1030214-4-cristian.ciocaltea@collabora.com>
[-- Attachment #1.1: Type: text/plain, Size: 2715 bytes --]
Hi Cristian,
On Fri, Jan 19, 2024 at 09:38:03PM +0200, Cristian Ciocaltea wrote:
> Add driver for the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC.
>
> The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL
> and eDP links. The maximum data rate is 12Gbps (HDMI 2.1 FRL), while
> the minimum is 250Mbps (HDMI 2.1 TMDS).
>
> Co-developed-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
> ---
The driver has multiple sequences looking like this (this is just one
example of many):
> + hdptx_write(hdptx, CMN_REG0087, 0x04);
> + hdptx_write(hdptx, CMN_REG0089, 0x00);
> + hdptx_write(hdptx, CMN_REG008A, 0x55);
> + hdptx_write(hdptx, CMN_REG008B, 0x25);
> + hdptx_write(hdptx, CMN_REG008C, 0x2c);
> + hdptx_write(hdptx, CMN_REG008D, 0x22);
> + hdptx_write(hdptx, CMN_REG008E, 0x14);
> + hdptx_write(hdptx, CMN_REG008F, 0x20);
> + hdptx_write(hdptx, CMN_REG0090, 0x00);
> + hdptx_write(hdptx, CMN_REG0091, 0x00);
> + hdptx_write(hdptx, CMN_REG0092, 0x00);
> + hdptx_write(hdptx, CMN_REG0093, 0x00);
> + hdptx_write(hdptx, CMN_REG0095, 0x00);
> + hdptx_write(hdptx, CMN_REG0097, 0x02);
> + hdptx_write(hdptx, CMN_REG0099, 0x04);
> + hdptx_write(hdptx, CMN_REG009A, 0x11);
> + hdptx_write(hdptx, CMN_REG009B, 0x00);
Instead of the repetitive calls to regmap_write, it's better to do
it like this:
static const struct reg_sequence some_init_seq[] = {
REG_SEQ0(CMN_REG0087, 0x04),
REG_SEQ0(CMN_REG0089, 0x00),
REG_SEQ0(CMN_REG008A, 0x55),
REG_SEQ0(CMN_REG008B, 0x25),
REG_SEQ0(CMN_REG008C, 0x2c),
REG_SEQ0(CMN_REG008D, 0x22),
REG_SEQ0(CMN_REG008E, 0x14),
REG_SEQ0(CMN_REG008F, 0x20),
REG_SEQ0(CMN_REG0090, 0x00),
REG_SEQ0(CMN_REG0091, 0x00),
REG_SEQ0(CMN_REG0092, 0x00),
REG_SEQ0(CMN_REG0093, 0x00),
REG_SEQ0(CMN_REG0095, 0x00),
REG_SEQ0(CMN_REG0097, 0x02),
REG_SEQ0(CMN_REG0099, 0x04),
REG_SEQ0(CMN_REG009A, 0x11),
REG_SEQ0(CMN_REG009B, 0x00),
};
regmap_multi_reg_write(hdptx->regmap, some_init_seq, ARRAY_SIZE(some_init_seq));
> +static const struct of_device_id rockchip_hdptx_phy_of_match[] = {
> + { .compatible = "rockchip,rk3588-hdptx-phy", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, rockchip_hdptx_phy_of_match);
> +
> +static struct platform_driver rockchip_hdptx_phy_driver = {
> + .probe = rockchip_hdptx_phy_probe,
> + .driver = {
> + .name = "rockchip-hdptx-phy",
> + .pm = &rockchip_hdptx_phy_pm_ops,
> + .of_match_table = of_match_ptr(rockchip_hdptx_phy_of_match),
Remove of_match_ptr(). It's a nop, since the driver depends on OF.
Greetings,
-- Sebastian
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next prev parent reply other threads:[~2024-01-19 22:47 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 19:38 [PATCH 0/3] Add support for RK3588 HDMI/DP Combo PHY Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` [PATCH 1/3] dt-bindings: soc: rockchip: Add rk3588 hdptxphy syscon Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-25 9:10 ` Krzysztof Kozlowski
2024-01-25 9:10 ` Krzysztof Kozlowski
2024-01-25 9:10 ` Krzysztof Kozlowski
2024-01-25 9:10 ` Krzysztof Kozlowski
2024-01-19 19:38 ` [PATCH 2/3] dt-bindings: phy: Add Rockchip HDMI/DP Combo PHY schema Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-25 9:11 ` Krzysztof Kozlowski
2024-01-25 9:11 ` Krzysztof Kozlowski
2024-01-25 9:11 ` Krzysztof Kozlowski
2024-01-25 9:11 ` Krzysztof Kozlowski
2024-01-25 9:39 ` Cristian Ciocaltea
2024-01-25 9:39 ` Cristian Ciocaltea
2024-01-25 9:39 ` Cristian Ciocaltea
2024-01-25 9:39 ` Cristian Ciocaltea
2024-01-19 19:38 ` [PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 19:38 ` Cristian Ciocaltea
2024-01-19 22:47 ` Sebastian Reichel [this message]
2024-01-19 22:47 ` Sebastian Reichel
2024-01-19 22:47 ` Sebastian Reichel
2024-01-19 22:47 ` Sebastian Reichel
2024-01-19 23:22 ` Cristian Ciocaltea
2024-01-19 23:22 ` Cristian Ciocaltea
2024-01-19 23:22 ` Cristian Ciocaltea
2024-01-19 23:22 ` Cristian Ciocaltea
2024-01-20 16:00 ` Alex Bee
2024-01-20 16:00 ` Alex Bee
2024-01-20 16:00 ` Alex Bee
2024-01-20 16:00 ` Alex Bee
2024-01-22 10:17 ` Andy Yan
2024-01-22 10:17 ` Andy Yan
2024-01-22 10:17 ` Andy Yan
2024-01-22 10:17 ` Andy Yan
2024-01-24 0:24 ` Cristian Ciocaltea
2024-01-24 0:24 ` Cristian Ciocaltea
2024-01-24 0:24 ` Cristian Ciocaltea
2024-01-24 0:24 ` Cristian Ciocaltea
2024-01-22 12:14 ` Sascha Hauer
2024-01-22 12:14 ` Sascha Hauer
2024-01-22 12:14 ` Sascha Hauer
2024-01-22 12:14 ` Sascha Hauer
2024-01-24 0:58 ` Cristian Ciocaltea
2024-01-24 0:58 ` Cristian Ciocaltea
2024-01-24 0:58 ` Cristian Ciocaltea
2024-01-24 0:58 ` Cristian Ciocaltea
2024-01-24 2:42 ` Andy Yan
2024-01-24 2:42 ` Andy Yan
2024-01-24 2:42 ` Andy Yan
2024-01-24 2:42 ` Andy Yan
2024-01-24 7:30 ` Andy Yan
2024-01-24 7:30 ` Andy Yan
2024-01-24 7:30 ` Andy Yan
2024-01-24 7:30 ` Andy Yan
2024-01-24 9:16 ` Jonas Karlman
2024-01-24 9:16 ` Jonas Karlman
2024-01-24 9:16 ` Jonas Karlman
2024-01-24 9:16 ` Jonas Karlman
2024-01-24 23:08 ` Cristian Ciocaltea
2024-01-24 23:08 ` Cristian Ciocaltea
2024-01-24 23:08 ` Cristian Ciocaltea
2024-01-24 23:08 ` Cristian Ciocaltea
2024-01-19 23:41 ` [PATCH 0/3] Add support for RK3588 HDMI/DP Combo PHY Cristian Ciocaltea
2024-01-19 23:41 ` Cristian Ciocaltea
2024-01-19 23:41 ` Cristian Ciocaltea
2024-01-19 23:41 ` Cristian Ciocaltea
2024-01-22 10:10 ` Andy Yan
2024-01-22 10:10 ` Andy Yan
2024-01-22 10:10 ` Andy Yan
2024-01-22 10:10 ` Andy Yan
2024-01-24 1:03 ` Cristian Ciocaltea
2024-01-24 1:03 ` Cristian Ciocaltea
2024-01-24 1:03 ` Cristian Ciocaltea
2024-01-24 1:03 ` Cristian Ciocaltea
2024-01-25 19:56 ` (subset) " Heiko Stuebner
2024-01-25 19:56 ` Heiko Stuebner
2024-01-25 19:56 ` Heiko Stuebner
2024-01-25 19:56 ` Heiko Stuebner
2024-01-25 20:00 ` Cristian Ciocaltea
2024-01-25 20:00 ` Cristian Ciocaltea
2024-01-25 20:00 ` Cristian Ciocaltea
2024-01-25 20:00 ` Cristian Ciocaltea
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