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From: Viresh Kumar <viresh.kumar@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Nishanth Menon <nm@ti.com>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	linux-pm@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Rafael Wysocki <rjw@rjwysocki.net>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org
Subject: [PATCH 14/31] drm/msm: Migrate to dev_pm_opp_set_config()
Date: Thu, 26 May 2022 17:12:13 +0530	[thread overview]
Message-ID: <f6a74bce04534144719ee4811a663dac85056815.1653564321.git.viresh.kumar@linaro.org> (raw)
In-Reply-To: <cover.1653564321.git.viresh.kumar@linaro.org>

The OPP core now provides a unified API for setting all configuration
types, i.e. dev_pm_opp_set_config().

Lets start using it.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  8 ++++++--
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 10 +++++-----
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  5 ++++-
 drivers/gpu/drm/msm/dp/dp_ctrl.c        |  5 ++++-
 drivers/gpu/drm/msm/dsi/dsi_host.c      |  5 ++++-
 5 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 407f50a15faa..c39fb085a762 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1728,10 +1728,14 @@ static void check_speed_bin(struct device *dev)
 {
 	struct nvmem_cell *cell;
 	u32 val;
+	struct dev_pm_opp_config config = {
+		.supported_hw = &val,
+		.supported_hw_count = 1,
+	};
 
 	/*
 	 * If the OPP table specifies a opp-supported-hw property then we have
-	 * to set something with dev_pm_opp_set_supported_hw() or the table
+	 * to set something with dev_pm_opp_set_config() or the table
 	 * doesn't get populated so pick an arbitrary value that should
 	 * ensure the default frequencies are selected but not conflict with any
 	 * actual bins
@@ -1753,7 +1757,7 @@ static void check_speed_bin(struct device *dev)
 		nvmem_cell_put(cell);
 	}
 
-	devm_pm_opp_set_supported_hw(dev, &val, 1);
+	devm_pm_opp_set_config(dev, &config);
 }
 
 struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 83c31b2ad865..ddb2812b1ff7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1805,6 +1805,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
 	u32 supp_hw = UINT_MAX;
 	u32 speedbin;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.supported_hw = &supp_hw,
+		.supported_hw_count = 1,
+	};
 
 	ret = adreno_read_speedbin(dev, &speedbin);
 	/*
@@ -1823,11 +1827,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
 	supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
 
 done:
-	ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
-	if (ret)
-		return ret;
-
-	return 0;
+	return devm_pm_opp_set_config(dev, &config);
 }
 
 static const struct adreno_gpu_funcs funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..43f943fdfde5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1203,12 +1203,15 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
 	struct drm_device *ddev = priv->dev;
 	struct dpu_kms *dpu_kms;
 	int ret = 0;
+	struct dev_pm_opp_config config = {
+		.clk_name = "core",
+	};
 
 	dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
 	if (!dpu_kms)
 		return -ENOMEM;
 
-	ret = devm_pm_opp_set_clkname(dev, "core");
+	ret = devm_pm_opp_set_config(dev, &config);
 	if (ret)
 		return ret;
 	/* OPP table is optional */
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 53568567e05b..54bdb33eef45 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1974,6 +1974,9 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
 {
 	struct dp_ctrl_private *ctrl;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.clk_name = "ctrl_link",
+	};
 
 	if (!dev || !panel || !aux ||
 	    !link || !catalog) {
@@ -1987,7 +1990,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
 		return ERR_PTR(-ENOMEM);
 	}
 
-	ret = devm_pm_opp_set_clkname(dev, "ctrl_link");
+	ret = devm_pm_opp_set_config(dev, &config);
 	if (ret) {
 		dev_err(dev, "invalid DP OPP table in device tree\n");
 		/* caller do PTR_ERR(opp_table) */
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index d51e70fab93d..7d5b027629d2 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1801,6 +1801,9 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
 	struct msm_dsi_host *msm_host = NULL;
 	struct platform_device *pdev = msm_dsi->pdev;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.clk_name = "byte",
+	};
 
 	msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL);
 	if (!msm_host) {
@@ -1862,7 +1865,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
 		goto fail;
 	}
 
-	ret = devm_pm_opp_set_clkname(&pdev->dev, "byte");
+	ret = devm_pm_opp_set_config(&pdev->dev, &config);
 	if (ret)
 		return ret;
 	/* OPP table is optional */
-- 
2.31.1.272.g89b43f80a514


WARNING: multiple messages have this Message-ID (diff)
From: Viresh Kumar <viresh.kumar@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>,
	linux-pm@vger.kernel.org,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Rafael Wysocki <rjw@rjwysocki.net>,
	Stephen Boyd <sboyd@kernel.org>, Nishanth Menon <nm@ti.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 14/31] drm/msm: Migrate to dev_pm_opp_set_config()
Date: Thu, 26 May 2022 17:12:13 +0530	[thread overview]
Message-ID: <f6a74bce04534144719ee4811a663dac85056815.1653564321.git.viresh.kumar@linaro.org> (raw)
In-Reply-To: <cover.1653564321.git.viresh.kumar@linaro.org>

The OPP core now provides a unified API for setting all configuration
types, i.e. dev_pm_opp_set_config().

Lets start using it.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  8 ++++++--
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 10 +++++-----
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  5 ++++-
 drivers/gpu/drm/msm/dp/dp_ctrl.c        |  5 ++++-
 drivers/gpu/drm/msm/dsi/dsi_host.c      |  5 ++++-
 5 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 407f50a15faa..c39fb085a762 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1728,10 +1728,14 @@ static void check_speed_bin(struct device *dev)
 {
 	struct nvmem_cell *cell;
 	u32 val;
+	struct dev_pm_opp_config config = {
+		.supported_hw = &val,
+		.supported_hw_count = 1,
+	};
 
 	/*
 	 * If the OPP table specifies a opp-supported-hw property then we have
-	 * to set something with dev_pm_opp_set_supported_hw() or the table
+	 * to set something with dev_pm_opp_set_config() or the table
 	 * doesn't get populated so pick an arbitrary value that should
 	 * ensure the default frequencies are selected but not conflict with any
 	 * actual bins
@@ -1753,7 +1757,7 @@ static void check_speed_bin(struct device *dev)
 		nvmem_cell_put(cell);
 	}
 
-	devm_pm_opp_set_supported_hw(dev, &val, 1);
+	devm_pm_opp_set_config(dev, &config);
 }
 
 struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 83c31b2ad865..ddb2812b1ff7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1805,6 +1805,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
 	u32 supp_hw = UINT_MAX;
 	u32 speedbin;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.supported_hw = &supp_hw,
+		.supported_hw_count = 1,
+	};
 
 	ret = adreno_read_speedbin(dev, &speedbin);
 	/*
@@ -1823,11 +1827,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
 	supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
 
 done:
-	ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
-	if (ret)
-		return ret;
-
-	return 0;
+	return devm_pm_opp_set_config(dev, &config);
 }
 
 static const struct adreno_gpu_funcs funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..43f943fdfde5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1203,12 +1203,15 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
 	struct drm_device *ddev = priv->dev;
 	struct dpu_kms *dpu_kms;
 	int ret = 0;
+	struct dev_pm_opp_config config = {
+		.clk_name = "core",
+	};
 
 	dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
 	if (!dpu_kms)
 		return -ENOMEM;
 
-	ret = devm_pm_opp_set_clkname(dev, "core");
+	ret = devm_pm_opp_set_config(dev, &config);
 	if (ret)
 		return ret;
 	/* OPP table is optional */
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 53568567e05b..54bdb33eef45 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1974,6 +1974,9 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
 {
 	struct dp_ctrl_private *ctrl;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.clk_name = "ctrl_link",
+	};
 
 	if (!dev || !panel || !aux ||
 	    !link || !catalog) {
@@ -1987,7 +1990,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link,
 		return ERR_PTR(-ENOMEM);
 	}
 
-	ret = devm_pm_opp_set_clkname(dev, "ctrl_link");
+	ret = devm_pm_opp_set_config(dev, &config);
 	if (ret) {
 		dev_err(dev, "invalid DP OPP table in device tree\n");
 		/* caller do PTR_ERR(opp_table) */
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index d51e70fab93d..7d5b027629d2 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1801,6 +1801,9 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
 	struct msm_dsi_host *msm_host = NULL;
 	struct platform_device *pdev = msm_dsi->pdev;
 	int ret;
+	struct dev_pm_opp_config config = {
+		.clk_name = "byte",
+	};
 
 	msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL);
 	if (!msm_host) {
@@ -1862,7 +1865,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
 		goto fail;
 	}
 
-	ret = devm_pm_opp_set_clkname(&pdev->dev, "byte");
+	ret = devm_pm_opp_set_config(&pdev->dev, &config);
 	if (ret)
 		return ret;
 	/* OPP table is optional */
-- 
2.31.1.272.g89b43f80a514


  parent reply	other threads:[~2022-05-26 11:44 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-26 11:41 [PATCH 00/31] OPP: Add new configuration interface: dev_pm_opp_set_config() Viresh Kumar
2022-05-26 11:41 ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 01/31] OPP: Track if clock name is configured by platform Viresh Kumar
2022-05-26 11:42 ` [PATCH 02/31] OPP: Add dev_pm_opp_set_config() and friends Viresh Kumar
2022-06-21 15:09   ` Dmitry Osipenko
2022-06-21 15:34     ` Viresh Kumar
2022-06-22  6:13       ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 03/31] cpufreq: dt: Migrate to dev_pm_opp_set_config() Viresh Kumar
2022-05-26 11:42 ` [PATCH 04/31] cpufreq: imx: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 05/31] cpufreq: qcom-nvmem: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 06/31] cpufreq: sti: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 07/31] cpufreq: sun50i: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 08/31] cpufreq: tegra20: " Viresh Kumar
2022-05-29 16:19   ` Dmitry Osipenko
2022-05-29 16:59     ` Dmitry Osipenko
2022-05-30  7:52       ` Viresh Kumar
2022-06-07  8:43         ` Viresh Kumar
2022-06-17 12:09           ` Dmitry Osipenko
2022-06-24  5:38       ` Viresh Kumar
2022-06-24  9:41         ` Jon Hunter
2022-05-26 11:42 ` [PATCH 09/31] cpufreq: ti: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 10/31] devfreq: exynos: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-30  9:45   ` Chanwoo Choi
2022-05-30  9:45     ` Chanwoo Choi
2022-05-31  4:12     ` Chanwoo Choi
2022-05-31  4:12       ` Chanwoo Choi
2022-05-31  4:15       ` Viresh Kumar
2022-05-31  4:15         ` Viresh Kumar
2022-05-31  4:38         ` Viresh Kumar
2022-05-31  4:38           ` Viresh Kumar
2022-05-31  5:05           ` Chanwoo Choi
2022-05-31  5:05             ` Chanwoo Choi
2022-05-31  5:12             ` Viresh Kumar
2022-05-31  5:12               ` Viresh Kumar
2022-05-31  5:03         ` Chanwoo Choi
2022-05-31  5:03           ` Chanwoo Choi
2022-05-26 11:42 ` [PATCH 11/31] devfreq: sun8i: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 12/31] devfreq: tegra30: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 13/31] drm/lima: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` Viresh Kumar [this message]
2022-05-26 11:42   ` [PATCH 14/31] drm/msm: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 15/31] drm/panfrost: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 13:45   ` Steven Price
2022-05-26 13:45     ` Steven Price
2022-05-26 11:42 ` [PATCH 16/31] drm/tegra: " Viresh Kumar
2022-05-26 11:42   ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 17/31] media: venus: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 18/31] media: tegra: " Viresh Kumar
2022-05-26 12:57   ` Krzysztof Kozlowski
2022-05-27  2:43     ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 19/31] mmc: sdhci-msm: " Viresh Kumar
2022-06-02  9:47   ` Ulf Hansson
2022-05-26 11:42 ` [PATCH 20/31] OPP: ti: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 21/31] soc/tegra: Remove the call to devm_pm_opp_set_clkname() Viresh Kumar
2022-05-26 17:57   ` Dmitry Osipenko
2022-05-27  2:52     ` Viresh Kumar
2022-06-23 21:15   ` Jon Hunter
2022-06-24  0:28     ` Viresh Kumar
2022-06-24  0:59       ` Viresh Kumar
2022-06-24 10:32         ` Jon Hunter
2022-05-26 11:42 ` [PATCH 22/31] soc/tegra: Migrate to dev_pm_opp_set_config() Viresh Kumar
2022-06-24  0:48   ` Viresh Kumar
2022-06-24  0:57     ` Viresh Kumar
2022-06-26 22:14       ` Dmitry Osipenko
2022-06-27  6:45         ` Viresh Kumar
2022-06-27  7:14           ` Dmitry Osipenko
2022-06-27  7:21             ` Viresh Kumar
2022-06-28  7:09               ` Viresh Kumar
2022-06-28 10:08                 ` Dmitry Osipenko
2022-06-28 10:11                   ` Viresh Kumar
2022-06-28 10:16                     ` Dmitry Osipenko
2022-06-28 11:00                       ` Viresh Kumar
2022-06-29 17:03                   ` Jon Hunter
2022-06-30  0:23                     ` Viresh Kumar
2022-05-26 11:42 ` [PATCH 23/31] spi: qcom: " Viresh Kumar
2022-05-26 12:41   ` Mark Brown
2022-05-26 11:42 ` [PATCH 24/31] serial: " Viresh Kumar
2022-05-26 11:42 ` [PATCH 25/31] OPP: Remove dev_pm_opp_set_regulators() and friends Viresh Kumar
2022-05-26 11:42 ` [PATCH 26/31] OPP: Remove dev_pm_opp_set_supported_hw() " Viresh Kumar
2022-05-26 11:42 ` [PATCH 27/31] OPP: Remove dev_pm_opp_set_clkname() " Viresh Kumar
2022-05-26 11:42 ` [PATCH 28/31] OPP: Remove dev_pm_opp_register_set_opp_helper() " Viresh Kumar
2022-05-26 11:42 ` [PATCH 29/31] OPP: Remove dev_pm_opp_attach_genpd() " Viresh Kumar
2022-05-26 11:42 ` [PATCH 30/31] OPP: Remove dev_pm_opp_set_prop_name() " Viresh Kumar
2022-05-26 11:42 ` [PATCH 31/31] OPP: Rearrange dev_pm_opp_set_config() " Viresh Kumar

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