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From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH v5 09/11] TAAv5 9
Date: Mon, 7 Oct 2019 23:01:56 -0700	[thread overview]
Message-ID: <20191008060156.GG5154@guptapadev.amr> (raw)
In-Reply-To: <20191006170646.GA147859@kroah.com>

> > +static DEFINE_MUTEX(tsx_mutex);
> 
> I think I asked this before, but in looking at the code I still can't
> figure it out.  What exactly is this protecting?
> 
> It looks like you want to keep only one "writer" out of the sysfs store
> function at a time, but:
> 
> > +ssize_t hw_tx_mem_store(struct device *dev, struct device_attribute *attr,
> > +			const char *buf, size_t count)
> > +{
> > +	enum tsx_ctrl_states requested_state;
> > +	ssize_t ret;
> > +	bool val;
> > +
> > +	ret = kstrtobool(buf, &val);
> > +	if (ret)
> > +		return ret;
> > +
> > +	mutex_lock(&tsx_mutex);
> > +
> > +	if (val) {
> > +		tsx_user_cmd = TSX_USER_CMD_ON;
> > +		requested_state = TSX_CTRL_ENABLE;
> > +	} else {
> > +		tsx_user_cmd = TSX_USER_CMD_OFF;
> > +		requested_state = TSX_CTRL_DISABLE;
> > +	}
> > +
> > +	/* Current state is same as the reqested state, do nothing */
> > +	if (tsx_ctrl_state == requested_state)
> > +		goto exit;
> > +
> > +	tsx_ctrl_state = requested_state;
> > +
> > +	tsx_update_on_each_cpu(val);
> > +exit:
> > +	mutex_unlock(&tsx_mutex);
> 
> What I think you want to do is just protect the tsx_update_on_each_cpu()
> function, right?

Also I believe below two operations needs to be under a lock. Without
the lock if there are two writers and one is preempted in between these
operations there is a possibility that tsx_ctrl_state and TSX hardware
state could go out of sync.

	tsx_ctrl_state = requested_state;

	// 1st writer gets preempted here
	// 2nd writer flips tsx_ctrl_state and writes to the MSR.
	// 1st writer wakes up and only writes to the MSR

	tsx_update_on_each_cpu(val);
	// tsx_ctrl_state and hardware state would be different here.

Chances of this happening is rare but still a possibility. The lock
would prevent such a condition.

> 
> So, you are locking _outside_ of a function call?  That's a sure way to
> madness over time.  If this function is so special that it can not be
> called multiple times at once, then put the lock _inside_ the function,
> right?
> 
> Otherwise you could have other places call that function, and this
> single lock is not going to protect anything :(

Future caller from other places should also take the lock and also
update tsx_ctrl_state. Worth mentioning in the comment.

> And why is tsx_user_cmd needed, and global?

This was added because cmdline_find_option() uses __initdata and can't
be called inside tsx_init() without it being an __init function.
tsx_init() is in S3/S5 and cpu hotplug path so it can't be __init in its
current callsite. With tsx=auto not translating to any of the
tsx_ctrl_state state, I added tsx_user_cmd. Anyways, I will drop this.

I hope it is okay to move tsx_init() to identify_boot_cpu() to avoid
adding new enum and writing to globals from percpu function. This way
tsx_init() is only called by boot cpu and secondary cpus call
tsx_en/disable().

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6b25039aa8ae..a4ce9e3a622c 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1576,6 +1575,8 @@ void __init identify_boot_cpu(void)
 #endif
 	cpu_detect_tlb(&boot_cpu_data);
 	setup_cr_pinning();
+
+	tsx_init();
 }
 
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b1d6c96f6b88..96039b5cda7c 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -762,7 +762,10 @@ static void init_intel(struct cpuinfo_x86 *c)
 
 	init_intel_misc_features(c);
 
-	tsx_init(c);
+	if (tsx_ctrl_state == TSX_CTRL_ENABLE)
+		tsx_enable();
+	else if (tsx_ctrl_state == TSX_CTRL_DISABLE)
+		tsx_disable();
 }

------------------

tsx_init() can now be __init and use cmdline_find_option().

void __init tsx_init(void)
{
	char arg[20];
	int ret;

	if (!tsx_ctrl_is_supported())
		return;

	ret = cmdline_find_option(boot_command_line, "tsx", arg, sizeof(arg));
	if (ret >= 0) {
		if (!strcmp(arg, "on")) {
			tsx_ctrl_state = TSX_CTRL_ENABLE;
		} else if (!strcmp(arg, "off")) {
			tsx_ctrl_state = TSX_CTRL_DISABLE;
		} else if (!strcmp(arg, "auto")) {
			if (boot_cpu_has_bug(X86_BUG_TAA))
				tsx_ctrl_state = TSX_CTRL_DISABLE;
			else
				tsx_ctrl_state = TSX_CTRL_ENABLE;
		} else {
			tsx_ctrl_state = TSX_CTRL_DISABLE;
			pr_info("tsx: invalid option, defaulting to off\n");
		}
	} else {
		/* tsx= not provided, defaulting to off */
		tsx_ctrl_state = TSX_CTRL_DISABLE;
	}

	if (tsx_ctrl_state == TSX_CTRL_DISABLE) {
		tsx_disable();
		setup_clear_cpu_cap(X86_FEATURE_RTM);
	} else if (tsx_ctrl_state == TSX_CTRL_ENABLE) {
		tsx_enable();
		setup_force_cpu_cap(X86_FEATURE_RTM);
	}
}

I am hoping it is okay to use setup_clear_cpu_cap() in tsx_init().

Thanks,
Pawan

  reply	other threads:[~2019-10-08  6:07 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-05  6:17 [MODERATED] [PATCH v5 00/11] TAAv5 0 Pawan Gupta
2019-10-05  6:26 ` [MODERATED] [PATCH v5 01/11] TAAv5 1 Pawan Gupta
2019-10-05  6:27 ` [MODERATED] [PATCH v5 02/11] TAAv5 2 Pawan Gupta
2019-10-05  6:28 ` [MODERATED] [PATCH v5 03/11] TAAv5 3 Pawan Gupta
2019-10-05  6:29 ` [MODERATED] [PATCH v5 04/11] TAAv5 4 Pawan Gupta
2019-10-05  6:30 ` [MODERATED] [PATCH v5 05/11] TAAv5 5 Pawan Gupta
2019-10-05  6:31 ` [MODERATED] [PATCH v5 06/11] TAAv5 6 Pawan Gupta
2019-10-05  6:32 ` [MODERATED] [PATCH v5 07/11] TAAv5 7 Pawan Gupta
2019-10-05  6:33 ` [MODERATED] [PATCH v5 08/11] TAAv5 8 Pawan Gupta
2019-10-05  6:34 ` [MODERATED] [PATCH v5 09/11] TAAv5 9 Pawan Gupta
2019-10-05  6:35 ` [MODERATED] [PATCH v5 10/11] TAAv5 10 Pawan Gupta
2019-10-05  6:36 ` [MODERATED] [PATCH v5 11/11] TAAv5 11 Pawan Gupta
2019-10-05 10:54 ` [MODERATED] Re: [PATCH v5 02/11] TAAv5 2 Borislav Petkov
2019-10-07 17:48   ` Pawan Gupta
     [not found] ` <5d98396a.1c69fb81.6c7a8.23b1SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-05 21:43   ` [MODERATED] Re: [PATCH v5 03/11] TAAv5 3 Andy Lutomirski
2019-10-07 17:50     ` Pawan Gupta
     [not found] ` <5d9839a4.1c69fb81.238e9.8312SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-05 21:45   ` [MODERATED] Re: [PATCH v5 04/11] TAAv5 4 Andy Lutomirski
     [not found] ` <5d983ad2.1c69fb81.63edd.6575SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-05 21:49   ` [MODERATED] Re: [PATCH v5 09/11] TAAv5 9 Andy Lutomirski
2019-10-07 18:35     ` Pawan Gupta
     [not found] ` <5d9838f1.1c69fb81.f1bab.d886SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-05 21:49   ` [MODERATED] Re: [PATCH v5 01/11] TAAv5 1 Andy Lutomirski
2019-10-06 17:40     ` Andrew Cooper
     [not found] ` <5d983ad2.1c69fb81.e6640.8f51SMTPIN_ADDED_BROKEN@mx.google.com>
2019-10-06 17:06   ` [MODERATED] Re: [PATCH v5 09/11] TAAv5 9 Greg KH
2019-10-08  6:01     ` Pawan Gupta [this message]
2019-10-10 21:31       ` Pawan Gupta
2019-10-11  8:45         ` Greg KH
2019-10-21  8:00           ` Thomas Gleixner
2019-10-08  2:46 ` [MODERATED] Re: [PATCH v5 05/11] TAAv5 5 Josh Poimboeuf
2019-10-09  1:45   ` Pawan Gupta
2019-10-08  2:57 ` [MODERATED] Re: [PATCH v5 09/11] TAAv5 9 Josh Poimboeuf
2019-10-08  6:10   ` Pawan Gupta
2019-10-08 10:49     ` Jiri Kosina
2019-10-09 13:12 ` [MODERATED] Re: ***UNCHECKED*** [PATCH v5 08/11] TAAv5 8 Michal Hocko
2019-10-14 19:41   ` Thomas Gleixner
2019-10-14 19:51     ` [MODERATED] " Jiri Kosina
2019-10-14 21:04       ` [MODERATED] " Borislav Petkov
2019-10-14 21:31         ` Jiri Kosina
2019-10-15  8:01           ` Thomas Gleixner
2019-10-15 10:34             ` [MODERATED] Re: ***UNCHECKED*** " Michal Hocko
2019-10-15 13:06               ` Josh Poimboeuf
2019-10-15 13:10                 ` Jiri Kosina
2019-10-15 15:26                   ` Josh Poimboeuf
2019-10-15 15:32                     ` Jiri Kosina
2019-10-15 19:34                       ` Tyler Hicks
2019-10-15 20:00                       ` Josh Poimboeuf
2019-10-15 20:15                         ` Jiri Kosina
2019-10-15 20:35                           ` Jiri Kosina
2019-10-15 20:54                             ` Josh Poimboeuf
2019-10-15 20:56                             ` [MODERATED] " Pawan Gupta
2019-10-15 21:14                               ` Jiri Kosina
2019-10-15 23:12                                 ` Josh Poimboeuf
2019-10-15 23:13                                   ` [MODERATED] [AUTOREPLY] [MODERATED] [AUTOREPLY] Automatic reply: " James, Hengameh M
2019-10-16  4:52                                   ` [MODERATED] " Jiri Kosina
2019-10-16  5:05                                     ` Jiri Kosina
2019-10-21 21:15                                       ` Luck, Tony
2019-10-16  7:14                                     ` Josh Poimboeuf
2019-10-16  7:20                                       ` Jiri Kosina
2019-10-18  1:17                                   ` Ben Hutchings
2019-10-18  4:04                                     ` Pawan Gupta
2019-10-15 17:47               ` Borislav Petkov
2019-10-16  7:26               ` [MODERATED] Re: ***UNCHECKED*** " Jiri Kosina
2019-10-16  7:54                 ` [MODERATED] Re: ***UNCHECKED*** " Michal Hocko
2019-10-16  9:23                   ` [MODERATED] Re: ***UNCHECKED*** " Michal Hocko
2019-10-16 12:15                     ` Thomas Gleixner
2019-10-16 18:34                       ` [MODERATED] " Pawan Gupta
2019-10-18  0:14                       ` Pawan Gupta
2019-10-21  8:09                         ` Thomas Gleixner
2019-10-21 12:54                         ` [MODERATED] Re: ***UNCHECKED*** " Michal Hocko
2019-10-21 20:01                           ` [MODERATED] " Pawan Gupta
2019-10-21 20:33                             ` Josh Poimboeuf
2019-10-21 20:34                               ` Josh Poimboeuf
2019-10-21 20:33                                 ` Pawan Gupta
2019-10-21 23:01                                   ` Andrew Cooper
2019-10-21 23:37                                     ` Luck, Tony
2019-10-21 23:39                                       ` Andrew Cooper
2019-10-14 21:05       ` [MODERATED] Re: ***UNCHECKED*** " Michal Hocko

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