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From: Ben Widawsky <ben@bwidawsk.net>
To: intel-gfx@lists.freedesktop.org
Cc: mesa-dev@lists.freedesktop.org
Subject: [PATCH 02/11] i965: step message register allocation
Date: Fri, 24 Jun 2011 12:42:47 -0700	[thread overview]
Message-ID: <1308944576-12740-3-git-send-email-ben@bwidawsk.net> (raw)
In-Reply-To: <1308944576-12740-1-git-send-email-ben@bwidawsk.net>

The system routine requires m0 be reserved. for saving off architectural
state. Moved the allocation to start at 2 instead of 0.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b485787..d8957c5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1466,7 +1466,7 @@ fs_visitor::emit_dummy_fs()
 
    fs_inst *write;
    write = emit(FS_OPCODE_FB_WRITE, fs_reg(0), fs_reg(0));
-   write->base_mrf = 0;
+   write->base_mrf = 2;
 }
 
 /* The register location here is relative to the start of the URB
@@ -1627,7 +1627,7 @@ fs_visitor::emit_fb_writes()
 {
    this->current_annotation = "FB write header";
    GLboolean header_present = GL_TRUE;
-   int nr = 0;
+   int nr = 2;
    int reg_width = c->dispatch_width / 8;
 
    if (intel->gen >= 6 &&
@@ -1637,7 +1637,7 @@ fs_visitor::emit_fb_writes()
    }
 
    if (header_present) {
-      /* m0, m1 header */
+      /* m2, m3 header */
       nr += 2;
    }
 
@@ -1706,7 +1706,7 @@ fs_visitor::emit_fb_writes()
 
       fs_inst *inst = emit(FS_OPCODE_FB_WRITE);
       inst->target = target;
-      inst->base_mrf = 0;
+      inst->base_mrf = 2;
       inst->mlen = nr;
       if (target == c->key.nr_color_regions - 1)
 	 inst->eot = true;
@@ -1724,7 +1724,7 @@ fs_visitor::emit_fb_writes()
       }
 
       fs_inst *inst = emit(FS_OPCODE_FB_WRITE);
-      inst->base_mrf = 0;
+      inst->base_mrf = 2;
       inst->mlen = nr;
       inst->eot = true;
       inst->header_present = header_present;
-- 
1.7.5.2

  parent reply	other threads:[~2011-06-24 19:42 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-24 19:42 [PATCH 0/11] Fragment shader debugging Ben Widawsky
2011-06-24 19:42 ` [PATCH 01/11] intel: shared header for " Ben Widawsky
2011-06-24 19:42 ` Ben Widawsky [this message]
2011-06-25  0:29   ` [PATCH 02/11] i965: step message register allocation Eric Anholt
2011-06-24 19:42 ` [PATCH 03/11] i965: copy in system routine, reserve extra scratch Ben Widawsky
2011-06-25  0:37   ` Eric Anholt
2011-06-26  0:16     ` Ben Widawsky
2011-06-24 19:42 ` [PATCH 04/11] i965: Move register spill offsets Ben Widawsky
2011-06-24 19:42 ` [PATCH 05/11] i965: setup system routine Ben Widawsky
2011-06-25  0:39   ` Eric Anholt
2011-06-24 19:42 ` [PATCH 06/11] i965: emit breakpoints Ben Widawsky
2011-06-24 19:42 ` [PATCH 07/11] i965: attach to a listening debugger Ben Widawsky
2011-06-24 19:42 ` [PATCH 08/11] intel-gpu-tools: register range handling for forcewake hooks Ben Widawsky
2011-06-24 19:42 ` [PATCH 09/11] intel-gpu-tools/forcewaked: simple forcewake app Ben Widawsky
2011-06-24 19:42 ` [PATCH 10/11] debugging: add important debug regs Ben Widawsky
2011-06-24 19:42 ` [PATCH 11/11] debugging: shader debugging Ben Widawsky

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