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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ramalingam C" <ramalingam.c@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 TTM sync accelerated migration and clear (rev4)
Date: Thu, 17 Jun 2021 06:40:47 -0000	[thread overview]
Message-ID: <162391204747.3752.12653845612787422623@emeril.freedesktop.org> (raw)
In-Reply-To: <20210617063018.92802-1-thomas.hellstrom@linux.intel.com>

== Series Details ==

Series: i915 TTM sync accelerated migration and clear (rev4)
URL   : https://patchwork.freedesktop.org/series/91463/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
05e61818c510 drm/i915: Reference objects on the ww object list
b3d1124db2b3 drm/i915: Break out dma_resv ww locking utilities to separate files
-:141: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#141: 
new file mode 100644

-:166: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#166: FILE: drivers/gpu/drm/i915/i915_gem_ww.c:21:
+	while ((obj = list_first_entry_or_null(&ww->obj_list, struct drm_i915_gem_object, obj_link))) {

total: 0 errors, 2 warnings, 0 checks, 183 lines checked
3d2c4703e490 drm/i915: Introduce a ww transaction helper
-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_ww' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/i915_gem_ww.h:46:
+#define for_i915_gem_ww(_ww, _err, _intr)			\
+	for (__i915_gem_ww_init(_ww, _intr); (_ww)->loop;	\
+	     _err = __i915_gem_ww_fini(_ww, _err))

-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_err' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/i915_gem_ww.h:46:
+#define for_i915_gem_ww(_ww, _err, _intr)			\
+	for (__i915_gem_ww_init(_ww, _intr); (_ww)->loop;	\
+	     _err = __i915_gem_ww_fini(_ww, _err))

total: 0 errors, 0 warnings, 2 checks, 41 lines checked
55d91f54ea63 drm/i915/gt: Add an insert_entry for gen8_ppgtt
63732fd3b3dd drm/i915/gt: Add a routine to iterate over the pagetables of a GTT
dafe4c39f77d drm/i915/gt: Export the pinned context constructor and destructor
1348ed66563c drm/i915/gt: Pipelined page migration
-:67: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#67: 
new file mode 100644

-:879: WARNING:LINE_SPACING: Missing a blank line after declarations
#879: FILE: drivers/gpu/drm/i915/gt/selftest_migrate.c:176:
+	struct drm_i915_private *i915 = migrate->context->engine->i915;
+	I915_RND_STATE(prng);

-:908: WARNING:LINE_SPACING: Missing a blank line after declarations
#908: FILE: drivers/gpu/drm/i915/gt/selftest_migrate.c:205:
+	struct threaded_migrate *thread;
+	I915_RND_STATE(prng);

-:933: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.rst
#933: FILE: drivers/gpu/drm/i915/gt/selftest_migrate.c:230:
+	msleep(10); /* start all threads before we kthread_stop() */

total: 0 errors, 4 warnings, 0 checks, 931 lines checked
50c44cdbf0dc drm/i915/gt: Pipelined clear
-:356: WARNING:LINE_SPACING: Missing a blank line after declarations
#356: FILE: drivers/gpu/drm/i915/gt/selftest_migrate.c:311:
+	struct drm_i915_private *i915 = migrate->context->engine->i915;
+	I915_RND_STATE(prng);

total: 0 errors, 1 warnings, 0 checks, 380 lines checked
af79c48203b1 drm/i915/gt: Setup a default migration context on the GT
44bc96f6062f drm/i915/ttm: accelerated move implementation
f96ba67920e0 drm/i915/gem: Zap the client blt code
-:35: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#35: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 146 lines checked
0c1b355b98b0 drm/i915/gem: Zap the i915_gem_object_blt code
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#29: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 66 lines checked


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  parent reply	other threads:[~2021-06-17  6:40 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-17  6:30 [Intel-gfx] [PATCH v5 00/12] i915 TTM sync accelerated migration and clear Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 01/12] drm/i915: Reference objects on the ww object list Thomas Hellström
2021-06-17 19:13   ` Daniel Vetter
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 02/12] drm/i915: Break out dma_resv ww locking utilities to separate files Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 03/12] drm/i915: Introduce a ww transaction helper Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 04/12] drm/i915/gt: Add an insert_entry for gen8_ppgtt Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 05/12] drm/i915/gt: Add a routine to iterate over the pagetables of a GTT Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 06/12] drm/i915/gt: Export the pinned context constructor and destructor Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 07/12] drm/i915/gt: Pipelined page migration Thomas Hellström
2021-08-05 10:05   ` Daniel Vetter
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 08/12] drm/i915/gt: Pipelined clear Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 09/12] drm/i915/gt: Setup a default migration context on the GT Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 10/12] drm/i915/ttm: accelerated move implementation Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 11/12] drm/i915/gem: Zap the client blt code Thomas Hellström
2021-06-17  6:30 ` [Intel-gfx] [PATCH v5 12/12] drm/i915/gem: Zap the i915_gem_object_blt code Thomas Hellström
2021-06-17  6:40 ` Patchwork [this message]
2021-06-17  7:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915 TTM sync accelerated migration and clear (rev4) Patchwork
2021-06-17  8:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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