From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
matthew.auld@intel.com
Subject: [Intel-gfx] [PATCH v5 03/12] drm/i915: Introduce a ww transaction helper
Date: Thu, 17 Jun 2021 08:30:09 +0200 [thread overview]
Message-ID: <20210617063018.92802-4-thomas.hellstrom@linux.intel.com> (raw)
In-Reply-To: <20210617063018.92802-1-thomas.hellstrom@linux.intel.com>
Introduce a for_i915_gem_ww(){} utility to help make the code
around a ww transaction more readable.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/i915_gem_ww.h | 31 +++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_ww.h b/drivers/gpu/drm/i915/i915_gem_ww.h
index f2d8769e4118..f6b1a796667b 100644
--- a/drivers/gpu/drm/i915/i915_gem_ww.h
+++ b/drivers/gpu/drm/i915/i915_gem_ww.h
@@ -11,11 +11,40 @@ struct i915_gem_ww_ctx {
struct ww_acquire_ctx ctx;
struct list_head obj_list;
struct drm_i915_gem_object *contended;
- bool intr;
+ unsigned short intr;
+ unsigned short loop;
};
void i915_gem_ww_ctx_init(struct i915_gem_ww_ctx *ctx, bool intr);
void i915_gem_ww_ctx_fini(struct i915_gem_ww_ctx *ctx);
int __must_check i915_gem_ww_ctx_backoff(struct i915_gem_ww_ctx *ctx);
void i915_gem_ww_unlock_single(struct drm_i915_gem_object *obj);
+
+/* Internal functions used by the inlines! Don't use. */
+static inline int __i915_gem_ww_fini(struct i915_gem_ww_ctx *ww, int err)
+{
+ ww->loop = 0;
+ if (err == -EDEADLK) {
+ err = i915_gem_ww_ctx_backoff(ww);
+ if (!err)
+ ww->loop = 1;
+ }
+
+ if (!ww->loop)
+ i915_gem_ww_ctx_fini(ww);
+
+ return err;
+}
+
+static inline void
+__i915_gem_ww_init(struct i915_gem_ww_ctx *ww, bool intr)
+{
+ i915_gem_ww_ctx_init(ww, intr);
+ ww->loop = 1;
+}
+
+#define for_i915_gem_ww(_ww, _err, _intr) \
+ for (__i915_gem_ww_init(_ww, _intr); (_ww)->loop; \
+ _err = __i915_gem_ww_fini(_ww, _err))
+
#endif
--
2.31.1
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next prev parent reply other threads:[~2021-06-17 6:30 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 6:30 [Intel-gfx] [PATCH v5 00/12] i915 TTM sync accelerated migration and clear Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 01/12] drm/i915: Reference objects on the ww object list Thomas Hellström
2021-06-17 19:13 ` Daniel Vetter
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 02/12] drm/i915: Break out dma_resv ww locking utilities to separate files Thomas Hellström
2021-06-17 6:30 ` Thomas Hellström [this message]
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 04/12] drm/i915/gt: Add an insert_entry for gen8_ppgtt Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 05/12] drm/i915/gt: Add a routine to iterate over the pagetables of a GTT Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 06/12] drm/i915/gt: Export the pinned context constructor and destructor Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 07/12] drm/i915/gt: Pipelined page migration Thomas Hellström
2021-08-05 10:05 ` Daniel Vetter
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 08/12] drm/i915/gt: Pipelined clear Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 09/12] drm/i915/gt: Setup a default migration context on the GT Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 10/12] drm/i915/ttm: accelerated move implementation Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 11/12] drm/i915/gem: Zap the client blt code Thomas Hellström
2021-06-17 6:30 ` [Intel-gfx] [PATCH v5 12/12] drm/i915/gem: Zap the i915_gem_object_blt code Thomas Hellström
2021-06-17 6:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 TTM sync accelerated migration and clear (rev4) Patchwork
2021-06-17 7:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-17 8:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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