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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 25/25] drm/i915: finish removal of CNL
Date: Wed, 28 Jul 2021 14:59:46 -0700	[thread overview]
Message-ID: <20210728215946.1573015-26-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20210728215946.1573015-1-lucas.demarchi@intel.com>

With all the users removed, finish removing the CNL platform definitions.
We will leave the PCI IDs around as those are exposed to userspace.
Even if mesa doesn't support CNL anymore, let's avoid build breakages
due to changing the headers.

Also, due to drm/i915/gt still using IS_CANNONLAKE() let's just redefine
it instead of removing.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          |  8 ++------
 drivers/gpu/drm/i915/i915_pci.c          | 23 +++++------------------
 drivers/gpu/drm/i915/i915_perf.c         |  1 -
 drivers/gpu/drm/i915/intel_device_info.c |  2 --
 drivers/gpu/drm/i915/intel_device_info.h |  2 --
 5 files changed, 7 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5d5cf5ad0513..6ac90ccbee0b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1380,7 +1380,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_GEMINILAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_GEMINILAKE)
 #define IS_COFFEELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COFFEELAKE)
 #define IS_COMETLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_COMETLAKE)
-#define IS_CANNONLAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_CANNONLAKE)
+#define IS_CANNONLAKE(dev_priv)	0
 #define IS_ICELAKE(dev_priv)	IS_PLATFORM(dev_priv, INTEL_ICELAKE)
 #define IS_JSL_EHL(dev_priv)	(IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) || \
 				IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE))
@@ -1446,8 +1446,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_CML_GT2(dev_priv)	(IS_COMETLAKE(dev_priv) && \
 				 INTEL_INFO(dev_priv)->gt == 2)
 
-#define IS_CNL_WITH_PORT_F(dev_priv) \
-	IS_SUBPLATFORM(dev_priv, INTEL_CANNONLAKE, INTEL_SUBPLATFORM_PORTF)
 #define IS_ICL_WITH_PORT_F(dev_priv) \
 	IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
 
@@ -1592,9 +1590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 /* WaRsDisableCoarsePowerGating:skl,cnl */
 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv)			\
-	(IS_CANNONLAKE(dev_priv) ||					\
-	 IS_SKL_GT3(dev_priv) ||					\
-	 IS_SKL_GT4(dev_priv))
+	(IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))
 
 #define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4)
 #define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11 || \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ec80cd1cd00c..cb4a46174513 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -787,27 +787,13 @@ static const struct intel_device_info cml_gt2_info = {
 	.gt = 2,
 };
 
-#define GEN10_FEATURES \
-	GEN9_FEATURES, \
-	GEN(10), \
-	.dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ \
-	.display.has_dsc = 1, \
-	.has_coherent_ggtt = false, \
-	GLK_COLORS
-
-static const struct intel_device_info cnl_info = {
-	GEN10_FEATURES,
-	PLATFORM(INTEL_CANNONLAKE),
-	.gt = 2,
-};
-
 #define GEN11_DEFAULT_PAGE_SIZES \
 	.page_sizes = I915_GTT_PAGE_SIZE_4K | \
 		      I915_GTT_PAGE_SIZE_64K | \
 		      I915_GTT_PAGE_SIZE_2M
 
 #define GEN11_FEATURES \
-	GEN10_FEATURES, \
+	GEN9_FEATURES, \
 	GEN11_DEFAULT_PAGE_SIZES, \
 	.abox_mask = BIT(0), \
 	.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
@@ -830,10 +816,12 @@ static const struct intel_device_info cnl_info = {
 		[TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
 	}, \
 	GEN(11), \
+	.color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }, \
 	.dbuf.size = 2048, \
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
-	.has_logical_ring_elsq = 1, \
-	.color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }
+	.display.has_dsc = 1, \
+	.has_coherent_ggtt = false, \
+	.has_logical_ring_elsq = 1
 
 static const struct intel_device_info icl_info = {
 	GEN11_FEATURES,
@@ -1123,7 +1111,6 @@ static const struct pci_device_id pciidlist[] = {
 	INTEL_CML_GT2_IDS(&cml_gt2_info),
 	INTEL_CML_U_GT1_IDS(&cml_gt1_info),
 	INTEL_CML_U_GT2_IDS(&cml_gt2_info),
-	INTEL_CNL_IDS(&cnl_info),
 	INTEL_ICL_11_IDS(&icl_info),
 	INTEL_EHL_IDS(&ehl_info),
 	INTEL_JSL_IDS(&jsl_info),
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 05e941cd1065..efef89e53440 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4309,7 +4309,6 @@ static void oa_init_supported_formats(struct i915_perf *perf)
 	case INTEL_GEMINILAKE:
 	case INTEL_COFFEELAKE:
 	case INTEL_COMETLAKE:
-	case INTEL_CANNONLAKE:
 	case INTEL_ICELAKE:
 	case INTEL_ELKHARTLAKE:
 	case INTEL_JASPERLAKE:
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 1ccaeb03ad6d..305facedd284 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -59,7 +59,6 @@ static const char * const platform_names[] = {
 	PLATFORM_NAME(GEMINILAKE),
 	PLATFORM_NAME(COFFEELAKE),
 	PLATFORM_NAME(COMETLAKE),
-	PLATFORM_NAME(CANNONLAKE),
 	PLATFORM_NAME(ICELAKE),
 	PLATFORM_NAME(ELKHARTLAKE),
 	PLATFORM_NAME(JASPERLAKE),
@@ -175,7 +174,6 @@ static const u16 subplatform_ulx_ids[] = {
 };
 
 static const u16 subplatform_portf_ids[] = {
-	INTEL_CNL_PORT_F_IDS(0),
 	INTEL_ICL_PORT_F_IDS(0),
 };
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 316edad22eb0..ef1eecd259e0 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -76,8 +76,6 @@ enum intel_platform {
 	INTEL_GEMINILAKE,
 	INTEL_COFFEELAKE,
 	INTEL_COMETLAKE,
-	/* gen10 */
-	INTEL_CANNONLAKE,
 	/* gen11 */
 	INTEL_ICELAKE,
 	INTEL_ELKHARTLAKE,
-- 
2.31.1

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  parent reply	other threads:[~2021-07-28 22:00 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-28 21:59 [Intel-gfx] [PATCH 00/25] Remove CNL - for drm-intel-next Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 01/25] drm/i915/display: remove PORT_F workaround for CNL Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 02/25] drm/i915/display: remove explicit CNL handling from intel_cdclk.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 03/25] drm/i915/display: remove explicit CNL handling from intel_color.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 04/25] drm/i915/display: remove explicit CNL handling from intel_combo_phy.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 05/25] drm/i915/display: remove explicit CNL handling from intel_crtc.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 06/25] drm/i915/display: remove explicit CNL handling from intel_ddi.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 07/25] drm/i915/display: remove explicit CNL handling from intel_display_debugfs.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 08/25] drm/i915/display: remove explicit CNL handling from intel_dmc.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 09/25] drm/i915/display: remove explicit CNL handling from intel_dp.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 10/25] drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.c Lucas De Marchi
2021-07-29 23:39   ` [Intel-gfx] [PATCH v1.1 " Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 11/25] drm/i915/display: remove explicit CNL handling from intel_vdsc.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 12/25] drm/i915/display: remove explicit CNL handling from skl_universal_plane.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 13/25] drm/i915/display: remove explicit CNL handling from intel_display_power.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 14/25] drm/i915/display: remove CNL ddi buf translation tables Lucas De Marchi
2021-07-29 16:23   ` [Intel-gfx] [PATCH v1.1 " Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 15/25] drm/i915/display: rename CNL references in skl_scaler.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 16/25] drm/i915: remove explicit CNL handling from i915_irq.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 17/25] drm/i915: remove explicit CNL handling from intel_pm.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 18/25] drm/i915: remove explicit CNL handling from intel_pch.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 19/25] drm/i915: remove explicit CNL handling from intel_wopcm.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 20/25] drm/i915: rename CNL references in intel_dram.c Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 21/25] drm/i915: replace random CNL comments Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 22/25] drm/i915: switch num_scalers/num_sprites to consider DISPLAY_VER Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 23/25] drm/i915: remove GRAPHICS_VER == 10 Lucas De Marchi
2021-07-28 21:59 ` [Intel-gfx] [PATCH 24/25] drm/i915: rename/remove CNL registers Lucas De Marchi
2021-07-28 21:59 ` Lucas De Marchi [this message]
2021-07-29  0:32   ` [Intel-gfx] [PATCH 25/25] drm/i915: finish removal of CNL Lucas De Marchi
2021-07-29 21:56     ` Vivi, Rodrigo
2021-07-28 23:20 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Remove CNL - for drm-intel-next Patchwork
2021-07-29 20:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Remove CNL - for drm-intel-next (rev2) Patchwork
2021-07-30  0:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remove CNL - for drm-intel-next (rev3) Patchwork
2021-07-30  0:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-30 10:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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