From: "Souza, Jose" <jose.souza@intel.com>
To: "Roper, Matthew D" <matthew.d.roper@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v4] drm/i915/tgl: Add Wa_1606054188:tgl
Date: Wed, 26 Feb 2020 22:47:24 +0000 [thread overview]
Message-ID: <4dbedbcb4202dc473038367129de1a5b1e5e9e17.camel@intel.com> (raw)
In-Reply-To: <20200224223651.3801646-1-matthew.d.roper@intel.com>
On Mon, 2020-02-24 at 14:36 -0800, Matt Roper wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
>
> On Tiger Lake we do not support source keying in the pixel formats
> P010,
> P012, P016.
>
> v2: Move WA to end of function. Create helper function for format
> check. Less verbose debugging messaging.
>
> v3: whitespace
>
> v4(MattR):
> - Actually return EINVAL to reject this combination.
> - Pass format parameter as u32.
> - Make test TGL-specific for now.
> - Switch to per-device logging.
> - Shorten/simplify comment.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Bspec: 52890
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 21
> +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 7abeefe8dce5..dc7d3f3f4eb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2077,6 +2077,18 @@ vlv_sprite_check(struct intel_crtc_state
> *crtc_state,
> return 0;
> }
>
> +static bool intel_format_is_p01x(u32 format)
> +{
> + switch (format) {
> + case DRM_FORMAT_P010:
> + case DRM_FORMAT_P012:
> + case DRM_FORMAT_P016:
> + return true;
> + default:
> + return false;
> + }
> +}
> +
> static int skl_plane_check_fb(const struct intel_crtc_state
> *crtc_state,
> const struct intel_plane_state
> *plane_state)
> {
> @@ -2155,6 +2167,15 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> return -EINVAL;
> }
>
> + /* Wa_1606054188:tgl */
> + if (IS_TIGERLAKE(dev_priv) &&
> + plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
> + intel_format_is_p01x(fb->format->format)) {
> + drm_dbg_kms(&dev_priv->drm,
> + "Source color keying not supported with
> P01x formats\n");
> + return -EINVAL;
> + }
> +
> return 0;
> }
>
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next prev parent reply other threads:[~2020-02-26 22:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-01 8:28 [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl Matt Atwood
2020-02-01 1:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Add Wa_1606054188:tgl (rev2) Patchwork
2020-02-01 2:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-03 5:53 ` [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl kbuild test robot
2020-02-03 9:24 ` kbuild test robot
2020-02-04 21:10 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1606054188:tgl (rev2) Patchwork
2020-02-15 6:49 ` [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl Matt Atwood
2020-02-24 22:36 ` [Intel-gfx] [PATCH v4] " Matt Roper
2020-02-26 22:47 ` Souza, Jose [this message]
2020-02-26 23:10 ` Matt Roper
2020-02-25 0:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1606054188:tgl (rev3) Patchwork
2020-02-26 10:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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