From: Matt Atwood <matthew.s.atwood@intel.com> To: intel-gfx@lists.freedesktop.org Cc: "Ville Syrjälä" <ville.syrjala@intel.com> Subject: [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl Date: Sat, 1 Feb 2020 03:28:34 -0500 [thread overview] Message-ID: <20200201082834.10163-1-matthew.s.atwood@intel.com> (raw) On Tiger Lake we do not support source keying in the pixel formats P010, P012, P016. v2: Move WA to end of function. Create helper function for format check. Less verbose debugging messaging. v3: whitespace Bspec: 52890 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> CC: Ville Syrjälä <ville.syrjala@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> --- drivers/gpu/drm/i915/display/intel_sprite.c | 22 +++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 2f277d1fc6f1..71ff9849b5c0 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -2070,6 +2070,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return 0; } +static bool intel_format_is_p01x(int format) +{ + switch (format) { + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return true; + default: + return false; + } +} + static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { @@ -2143,6 +2155,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, return -EINVAL; } + /* Wa_1606054188:tgl + * + * TODO: Add format RGB64i when implemented. + * + */ + if (IS_GEN(dev_priv, 12) && + plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && + intel_format_is_p01x(fb->format->format)) + DRM_DEBUG_KMS("Source color keying not supported with P01x formats\n"); + return 0; } -- 2.21.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Matt Atwood <matthew.s.atwood@intel.com> To: intel-gfx@lists.freedesktop.org Cc: "Ville Syrjälä" <ville.syrjala@intel.com> Subject: [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl Date: Sat, 15 Feb 2020 01:49:38 -0500 [thread overview] Message-ID: <20200201082834.10163-1-matthew.s.atwood@intel.com> (raw) Message-ID: <20200215064938.xKLNYssvqcAwMRsx-8P_7YoU1E0GuDZRY1sLTtUZ8T0@z> (raw) On Tiger Lake we do not support source keying in the pixel formats P010, P012, P016. v2: Move WA to end of function. Create helper function for format check. Less verbose debugging messaging. v3: whitespace Bspec: 52890 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> CC: Ville Syrjälä <ville.syrjala@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> --- drivers/gpu/drm/i915/display/intel_sprite.c | 22 +++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 2f277d1fc6f1..71ff9849b5c0 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -2070,6 +2070,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return 0; } +static bool intel_format_is_p01x(int format) +{ + switch (format) { + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return true; + default: + return false; + } +} + static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state) { @@ -2143,6 +2155,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, return -EINVAL; } + /* Wa_1606054188:tgl + * + * TODO: Add format RGB64i when implemented. + * + */ + if (IS_GEN(dev_priv, 12) && + plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && + intel_format_is_p01x(fb->format->format)) + DRM_DEBUG_KMS("Source color keying not supported with P01x formats\n"); + return 0; } _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2020-01-31 23:28 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-01 8:28 Matt Atwood [this message] 2020-02-01 1:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Add Wa_1606054188:tgl (rev2) Patchwork 2020-02-01 2:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-02-03 5:53 ` [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl kbuild test robot 2020-02-03 9:24 ` kbuild test robot 2020-02-04 21:10 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1606054188:tgl (rev2) Patchwork 2020-02-15 6:49 ` [Intel-gfx] [v3] drm/i915/tgl: Add Wa_1606054188:tgl Matt Atwood 2020-02-24 22:36 ` [Intel-gfx] [PATCH v4] " Matt Roper 2020-02-26 22:47 ` Souza, Jose 2020-02-26 23:10 ` Matt Roper 2020-02-25 0:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add Wa_1606054188:tgl (rev3) Patchwork 2020-02-26 10:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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