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 messages from 2020-03-16 11:42:53 to 2020-03-18 09:00:48 UTC [more...]

[Intel-gfx] [PATCH v1 0/3] Consider DBuf bandwidth when calculating CDCLK
 2020-03-18  9:00 UTC  (16+ messages)
` [Intel-gfx] [PATCH v1 1/3] drm/i915: Decouple cdclk calculation from modeset checks
` [Intel-gfx] [PATCH v1 3/3] drm/i915: Remove unneeded hack now for CDCLK
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Consider DBuf bandwidth when calculating CDCLK
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for Consider DBuf bandwidth when calculating CDCLK (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/edp: Ignore short pulse when panel powered off
 2020-03-18  8:18 UTC  (6+ messages)
` [Intel-gfx] [PATCH v2] "
  ` [Intel-gfx] [PATCH v3] "
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/edp: Ignore short pulse when panel powered off (rev2)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v5 0/7] DP Phy compliance auto test
 2020-03-18  8:01 UTC  (7+ messages)
` [Intel-gfx] [PATCH v5 6/7] drm/i915/dp: Register definition for DP compliance register
    ` [Intel-gfx] [PATCH v6 "
` [Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliance auto test (rev7)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliance auto test (rev8)

[Intel-gfx] [PATCH 1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
 2020-03-18  7:32 UTC  (5+ messages)
` [Intel-gfx] [PATCH 2/3] drm: Create a drm_connector_helper_funcs hook for Adaptive Sync support
` [Intel-gfx] [PATCH 3/3] drm/i915/dp: intel_dp connector hook for VRR support
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/dp: DRM DP helper for reading Ignore MSA from DPCD
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v9 00/11] Convert PWM period and duty cycle to u64
 2020-03-17 20:05 UTC  (2+ messages)
` [Intel-gfx] [PATCH v9 01/11] drm/i915: Use 64-bit division macro

[Intel-gfx] [PATCH] drm/i915/gem: Avoid gem_context->mutex for simple vma lookup
 2020-03-18  4:33 UTC  (18+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] [PATCH v2] drm/i915/gem: Avoid gem_context->mutex for simple vma lookup
  ` [Intel-gfx] [PATCH v3] "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev2)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev5)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev3)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Avoid gem_context->mutex for simple vma lookup (rev5)

[Intel-gfx] [PATCH] drm/i915/tgl: Add new PCI IDs to TGL
 2020-03-18  3:56 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/gt: Always reschedule the new heartbeat
 2020-03-18  1:22 UTC  (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 0/4] drm/i915/perf: add OA interrupt support
 2020-03-18  0:03 UTC  (11+ messages)
` [Intel-gfx] [PATCH 1/4] drm/i915/perf: rework aging tail workaround
` [Intel-gfx] [PATCH 2/4] drm/i915/perf: move pollin setup to non hw specific code
` [Intel-gfx] [PATCH 3/4] drm/i915/perf: only append status when data is available
` [Intel-gfx] [PATCH 4/4] drm/i915/perf: add new open param to configure polling of OA buffer

[Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2)
 2020-03-17 23:59 UTC  (10+ messages)
` [Intel-gfx] [PATCH 02/10] drm/i915: Adjust PM QoS response frequency based on GPU load
` [Intel-gfx] [PATCH 07/10] cpufreq: intel_pstate: Implement VLP controller for HWP parts

[Intel-gfx] [CI] drm/i915: Fix up documentation paths after file moving
 2020-03-17 22:53 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v9] drm/i915/color: Extract icl_read_luts()
 2020-03-17 20:30 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] Screen Flickering on DELL XPS-13-7390
 2020-03-17 19:07 UTC  (2+ messages)

[Intel-gfx] [PATCH] Revert "drm/i915/gem: Drop relocation slowpath"
 2020-03-17 18:50 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v7 1/3] drm/i915/perf: remove generated code
 2020-03-17 17:38 UTC  (7+ messages)
` [Intel-gfx] [PATCH v7 2/3] drm/i915/perf: remove redundant power configuration register override
` [Intel-gfx] [PATCH v7 3/3] drm/i915/perf: introduce global sseu pinning
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v7,1/3] drm/i915/perf: remove generated code
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [RESUBMIT PATCH 0/2] tests/gem_userptr_blits: Refresh other now MMAP_GTT dependent subtests
 2020-03-17 16:32 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
  ` [Intel-gfx] ✗ Fi.CI.IGT: failure for tests/gem_userptr_blits: Refresh other now MMAP_GTT dependent subtests (rev2)

[Intel-gfx] [PATCH 01/12] drm/i915/selftests: Add request throughput measurement to perf
 2020-03-17 14:58 UTC  (16+ messages)
` [Intel-gfx] [PATCH 02/12] drm/i915: Wrap i915_active in a simple kreffed struct
` [Intel-gfx] [PATCH 03/12] drm/i915/perf: Schedule oa_config after modifying the contexts
` [Intel-gfx] [PATCH 04/12] dma-buf: Prettify typecasts for dma-fence-chain
` [Intel-gfx] [PATCH 05/12] dma-buf: Report signaled links inside dma-fence-chain
` [Intel-gfx] [PATCH 06/12] dma-buf: Exercise dma-fence-chain under selftests
` [Intel-gfx] [PATCH 07/12] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 08/12] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 09/12] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 10/12] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 11/12] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 12/12] drm/i915/gt: Yield the timeslice if caught waiting on a user semaphore
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915/selftests: Add request throughput measurement to perf
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PULL] drm-misc-next
 2020-03-17  8:28 UTC 

[Intel-gfx] [PATCH v1 2/3] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
 2020-03-17 14:40 UTC  (4+ messages)
` [Intel-gfx] [PATCH v2 "

[Intel-gfx] [PATCH v8 1/3] drm/i915/perf: remove generated code
 2020-03-17 14:37 UTC  (4+ messages)
` [Intel-gfx] [PATCH v8 2/3] drm/i915/perf: remove redundant power configuration register override
` [Intel-gfx] [PATCH v8 3/3] drm/i915/perf: introduce global sseu pinning
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v8,1/3] drm/i915/perf: remove generated code

[Intel-gfx] [PATCH v8 0/3] Dynamic EU configuration of Slice/Sub-slice/EU
 2020-03-17 11:17 UTC  (8+ messages)
` [Intel-gfx] [PATCH v8 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v8 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v8 3/3] drm/i915: Predictive governor to control slice/subslice/eu
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Dynamic EU configuration of Slice/Sub-slice/EU (rev8)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.DOCS: warning "

[Intel-gfx] [PATCH v6 1/3] drm/i915/perf: remove generated code
 2020-03-17 10:36 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/3] "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [CI] drm/i915/gt: Restore check for invalid vma for fencing
 2020-03-17  8:33 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/gem: Check for a closed context when looking up an engine
 2020-03-17  8:30 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [V8 0/9] Add support for mipi dsi cmd mode
 2020-03-17  6:59 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev8)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/
 2020-03-17  4:34 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH v7 0/3] Dynamic EU configuration of Slice/Sub-slice/EU
 2020-03-17  3:42 UTC  (6+ messages)
` [Intel-gfx] [PATCH v7 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v7 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v7 3/3] drm/i915: Predictive governor to control slice/subslice/eu
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Dynamic EU configuration of Slice/Sub-slice/EU (rev7)

[Intel-gfx] [PATCH] drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017 (v3)
 2020-03-17  3:03 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017 (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Cast remain to unsigned long in eb_relocate_vma
 2020-03-17  0:13 UTC  (7+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Cast remain to unsigned long in eb_relocate_vma (rev2)

[Intel-gfx] [PATCH 0/7] drm/i915/gt: convert to struct drm_device based logging macros
 2020-03-17  0:01 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH] drm/i915/gem: Try allocating va from free space
 2020-03-16 23:19 UTC  (3+ messages)
` [Intel-gfx] ✗ Fi.CI.DOCS: warning for "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH v7 0/3] drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel
 2020-03-16 21:50 UTC  (6+ messages)
` [Intel-gfx] [PATCH v7 1/3] drm/i915: Get active pending request for given context
` [Intel-gfx] [PATCH v7 2/3] drm/i915: set optimum eu/slice/sub-slice configuration based on load type
` [Intel-gfx] [PATCH v7 3/3] drm/i915: Predictive governor to control slice/subslice/eu
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel (rev3)

[Intel-gfx] [PATCH 0/9] drm/edid: DisplayID parser fixes
 2020-03-16 21:44 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 01/15] drm/i915: Move GGTT fence registers under gt/
 2020-03-16 21:02 UTC  (15+ messages)
` [Intel-gfx] [PATCH 02/15] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
` [Intel-gfx] [PATCH 03/15] drm/i915: Remove manual save/resume of fence register state
` [Intel-gfx] [PATCH 04/15] drm/i915/gt: Allocate i915_fence_reg array
` [Intel-gfx] [PATCH 06/15] drm/i915/gt: Store the fence details on the fence
` [Intel-gfx] [PATCH 07/15] drm/i915/gt: Make fence revocation unequivocal
` [Intel-gfx] [PATCH 08/15] drm/i915/gem: Drop cached obj->bind_count
` [Intel-gfx] [PATCH 11/15] drm/i915: Export a preallocate variant of i915_active_acquire()
` [Intel-gfx] [PATCH 12/15] drm/i915/gem: Split eb_vma into its own allocation
` [Intel-gfx] [PATCH 13/15] drm/i915/gem: Separate the ww_mutex walker into its own list
` [Intel-gfx] [PATCH 14/15] drm/i915/gem: Asynchronous GTT unbinding
` [Intel-gfx] [PATCH 15/15] drm/i915/gem: Bind the fence async for execbuf
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/15] drm/i915: Move GGTT fence registers under gt/
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 1/2] drm/i915: use effective iDisp BCLK value for CDCLK calculation
 2020-03-16 17:28 UTC  (5+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: move audio CDCLK constraint setup to bind/unbind

[Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/
 2020-03-16 16:17 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] "
` [Intel-gfx] ✗ Fi.CI.DOCS: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [RFC][PATCH 0/5] Introduce drm scaling filter property
 2020-03-16 15:14 UTC  (5+ messages)
` [Intel-gfx] [RFC][PATCH 1/5] drm: Introduce "

[Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+
 2020-03-16 14:43 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "

[Intel-gfx] P2P for DMA-buf
 2020-03-16  9:52 UTC  (11+ messages)
` [Intel-gfx] [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function

[Intel-gfx] [PATCH] drm/i915/dp/mst : Get clock rate from sink's available PBN
 2020-03-16 13:56 UTC  (3+ messages)

[Intel-gfx] Fixes that failed to apply to v5.6-rc3
 2020-03-16 13:14 UTC  (2+ messages)

[Intel-gfx] [PATCH i-g-t 1/2] intel-ci: Tweak blacklist for very long running stability tests
 2020-03-16 12:46 UTC  (2+ messages)


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