From: Paulo Zanoni <przanoni@gmail.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: add comment about pch pll enabling rules
Date: Mon, 29 Oct 2012 10:02:17 -0200 [thread overview]
Message-ID: <CA+gsUGQy8fKOyAcBHY9W7fjdu=gLWMTkaaZ0F6BDx_iw1iTrVw@mail.gmail.com> (raw)
In-Reply-To: <1351356374-1584-1-git-send-email-daniel.vetter@ffwll.ch>
Hi
2012/10/27 Daniel Vetter <daniel.vetter@ffwll.ch>:
> Atm we have a few funny issues where we enable/disable shared
> pll clocks. To make it clear that we are not required to enable/
> disable the pch plls together with the other pch resources (and
> so should keep it running when it's used by another pipe in
> a shared pll configuration) add a comment.
>
> This note is lifted from "Graphics BSpec: vol4g North Display Engine
> Registers [IVB], Display Mode Set Sequence", step 9.d. of the enable
> sequence:
>
> "Configure and enable PCH DPLL, wait for PCH DPLL warmup (Can be
> done anytime before enabling PCH transcoder)."
>
> Since fixing the pll sharing code to no longer disable shared plls
> if they're still in use is more involved, let's just stick with the
> comment for now.
>
> v2: Make the comment in the code clearer, to address questions raised
> by Paulo Zanoni in review.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b19e3bb..bf2356c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3007,6 +3007,13 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
> /* For PCH output, training FDI link */
> dev_priv->display.fdi_link_train(crtc);
>
> + /* XXX: pch pll's can be enabled any time before we enable the PCH
> + * transcoder, and we actually should do this to not upset any PCH
> + * transcoder that already use the clock when we share it.
> + *
> + * Note that enable_pch_pll tries to do the right thing, but get_pch_pll
> + * unconditionally resets the pll - we need that to have the right LVDS
> + * enable sequence. */
> intel_enable_pch_pll(intel_crtc);
>
> if (HAS_PCH_LPT(dev)) {
> --
> 1.7.11.4
>
--
Paulo Zanoni
next prev parent reply other threads:[~2012-10-29 12:02 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-26 8:58 [PATCH 0/9] some ivb fdi b/c fixes Daniel Vetter
2012-10-26 8:58 ` [PATCH 1/9] drm/i915: shut up spurious message in intel_dp_get_hw_state Daniel Vetter
2012-10-26 14:01 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 2/9] drm/i915: Write the FDI RX TU size reg at the right time Daniel Vetter
2012-10-27 11:51 ` Paulo Zanoni
2012-10-27 12:59 ` Daniel Vetter
2012-10-27 13:03 ` Paulo Zanoni
2012-10-27 13:04 ` Daniel Vetter
2012-10-27 13:18 ` Paulo Zanoni
2012-10-27 13:50 ` Daniel Vetter
2012-10-27 13:20 ` [PATCH] " Daniel Vetter
2012-10-26 8:58 ` [PATCH 3/9] drm/i915: set FDI_RX_MISC to recommended values on CPT/PPT Daniel Vetter
2012-10-27 12:02 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 4/9] drm/i915: add comment about pch pll enabling rules Daniel Vetter
2012-10-27 12:15 ` Paulo Zanoni
2012-10-27 12:57 ` Daniel Vetter
2012-10-27 16:46 ` [PATCH] " Daniel Vetter
2012-10-29 12:02 ` Paulo Zanoni [this message]
2012-10-26 8:58 ` [PATCH 5/9] drm/i915: CPT/PPT pch dp transcoder workaround Daniel Vetter
2012-10-26 14:21 ` Paulo Zanoni
2012-10-29 15:38 ` Daniel Vetter
2012-10-29 17:02 ` Paulo Zanoni
2012-10-29 17:14 ` Daniel Vetter
2012-10-31 17:41 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 6/9] drm/i915: BUG on impossible pch dp port Daniel Vetter
2012-10-26 15:04 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 7/9] drm/i915: drop unnecessary check from fdi_link_train code Daniel Vetter
2012-10-26 15:32 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 8/9] drm/i915: add ->display.modeset_global_resources callback Daniel Vetter
2012-10-27 12:18 ` Paulo Zanoni
2012-10-26 8:58 ` [PATCH 9/9] drm/i915: check fdi B/C lane sharing constraint Daniel Vetter
2012-10-27 12:56 ` Paulo Zanoni
2012-10-27 13:03 ` Daniel Vetter
2012-10-27 13:58 ` [PATCH] " Daniel Vetter
2012-10-29 12:06 ` Paulo Zanoni
2012-10-29 17:42 ` Daniel Vetter
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