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From: Paulo Zanoni <przanoni@gmail.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/6] drm/i915/crt: don't set HOTPLUG bits on !PCH
Date: Thu, 11 Oct 2012 23:47:28 -0300
Message-ID: <CA+gsUGR5AXNPbbQwqN=9uzDCEUTc4WHQNdrSe+KpRJ-ZWC4haQ@mail.gmail.com> (raw)
In-Reply-To: <1349978908-7687-2-git-send-email-daniel.vetter@ffwll.ch>

2012/10/11 Daniel Vetter <daniel.vetter@ffwll.ch>:
> ... since they don't apply to pre-pch platforms and could actually be
> harmful.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Ok, so I checked the specs and yes, these bit definitions don't exist.
The problem here is that instead of "must-be-zero", the spec says
"Reserved. Software must preserve the contents of these bits" for bits
29:16 (and also some others). So maybe by setting everything to 0
instead of enabling bits 17, 18, 20-23 we could actually be breaking
things? Either way, both the old and new code don't follow the
specification.

Maybe on non-pch-split we could try to read ADPA and erase all the
bits except the "must-be-preserved" ones?

> ---
>  drivers/gpu/drm/i915/intel_crt.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index c42b980..46c90f5 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -235,7 +235,11 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
>                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
>         }
>
> -       adpa = ADPA_HOTPLUG_BITS;
> +       if (HAS_PCH_SPLIT(dev))
> +               adpa = ADPA_HOTPLUG_BITS;
> +       else
> +               adpa = 0;
> +
>         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
>                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
>         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
> --
> 1.7.11.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

  reply index

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-11 18:08 [PATCH 0/6] reduce register save/restoring accross suspend/resume Daniel Vetter
2012-10-11 18:08 ` [PATCH 1/6] drm/i915/crt: don't set HOTPLUG bits on !PCH Daniel Vetter
2012-10-12  2:47   ` Paulo Zanoni [this message]
2012-10-12  8:45     ` Daniel Vetter
2012-10-12 17:17       ` Paulo Zanoni
2012-10-12 17:26         ` Daniel Vetter
2012-10-17 21:31           ` Paulo Zanoni
2012-10-11 18:08 ` [PATCH 2/6] drm/i915/crt: explicitly set up HOTPLUG_BITS on resume Daniel Vetter
2012-10-17 21:42   ` Paulo Zanoni
2012-10-11 18:08 ` [PATCH 3/6] drm/i915: don't save/restor ADPA for kms Daniel Vetter
2012-10-17 21:49   ` Paulo Zanoni
2012-10-18 12:34     ` Daniel Vetter
2012-10-11 18:08 ` [PATCH 4/6] drm/i915: don't save/restore DP regs " Daniel Vetter
2012-10-11 18:08 ` [PATCH 5/6] drm/i915: don't save/restore irq " Daniel Vetter
2012-10-11 18:08 ` [PATCH 6/6] drm/i915: don't save/restore HWS_PGA reg " Daniel Vetter
2012-10-17  9:32   ` [PATCH 1/3] drm/i915: don't save/restore DP regs " Daniel Vetter
2012-10-17  9:32     ` [PATCH 2/3] drm/i915: don't save/restore irq " Daniel Vetter
2012-10-17  9:32     ` [PATCH 3/3] drm/i915: don't save/restore HWS_PGA reg " Daniel Vetter
2012-10-17 19:52     ` [PATCH 1/3] drm/i915: don't save/restore DP regs " Paulo Zanoni
2012-10-17 20:39       ` Daniel Vetter

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