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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	dri-devel@lists.freedesktop.org, Dave Airlie <airlied@redhat.com>
Subject: [Intel-xe] [PATCH 2/3] drm/xe: Fix platform order
Date: Thu, 23 Mar 2023 22:17:53 -0700	[thread overview]
Message-ID: <20230324051754.1346390-3-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20230324051754.1346390-1-lucas.demarchi@intel.com>

Platform order is important when looping through the list of guc
firmware blobs since we use it to prevent loading a blob for a newer
platform onto an older one. Move PVC after ADL.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_platform_types.h | 3 +--
 drivers/gpu/drm/xe/xe_uc_fw.c          | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_platform_types.h b/drivers/gpu/drm/xe/xe_platform_types.h
index 72612c832e88..10367f6cc75a 100644
--- a/drivers/gpu/drm/xe/xe_platform_types.h
+++ b/drivers/gpu/drm/xe/xe_platform_types.h
@@ -9,14 +9,13 @@
 /* Keep in gen based order, and chronological order within a gen */
 enum xe_platform {
 	XE_PLATFORM_UNINITIALIZED = 0,
-	/* gen12 */
 	XE_TIGERLAKE,
 	XE_ROCKETLAKE,
 	XE_DG1,
 	XE_DG2,
-	XE_PVC,
 	XE_ALDERLAKE_S,
 	XE_ALDERLAKE_P,
+	XE_PVC,
 	XE_METEORLAKE,
 };
 
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index e2c982b37e87..174c42873ebb 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -43,9 +43,9 @@ static struct xe_device *uc_fw_to_xe(struct xe_uc_fw *uc_fw)
  */
 #define XE_GUC_FIRMWARE_DEFS(fw_def, guc_def) \
 	fw_def(METEORLAKE,   guc_def(mtl,  70, 5, 2)) \
+	fw_def(PVC,          guc_def(pvc,  70, 5, 2)) \
 	fw_def(ALDERLAKE_P,  guc_def(adlp,  70, 5, 2)) \
 	fw_def(ALDERLAKE_S,  guc_def(tgl,  70, 5, 2)) \
-	fw_def(PVC,          guc_def(pvc,  70, 5, 2)) \
 	fw_def(DG2,          guc_def(dg2,  70, 5, 2)) \
 	fw_def(DG1,          guc_def(dg1,  70, 5, 2)) \
 	fw_def(TIGERLAKE,    guc_def(tgl,  70, 5, 2))
-- 
2.39.0


  parent reply	other threads:[~2023-03-24  5:19 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-24  5:17 [Intel-xe] [PATCH 0/3] drm/xe: Update GuC/HuC firmware autoselection Lucas De Marchi
2023-03-24  5:17 ` [Intel-xe] [PATCH 1/3] drm/xe: Remove unused revid from firmware name Lucas De Marchi
2023-03-27 16:59   ` Matt Roper
2023-03-31 21:35     ` Lucas De Marchi
2023-03-24  5:17 ` Lucas De Marchi [this message]
2023-03-27 17:02   ` [Intel-xe] [PATCH 2/3] drm/xe: Fix platform order Matt Roper
2023-03-31 13:22     ` Lucas De Marchi
2023-03-31 20:47       ` Matt Roper
2023-03-31 21:13         ` Lucas De Marchi
2023-03-24  5:17 ` [Intel-xe] [PATCH 3/3] drm/xe: Update GuC/HuC firmware autoselect logic Lucas De Marchi
2023-03-28 23:31   ` Srivatsa, Anusha
2023-03-30  3:46     ` Lucas De Marchi
2023-04-03 18:09       ` Srivatsa, Anusha
2023-04-04 18:59         ` Lucas De Marchi
2023-03-24  5:27 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: Update GuC/HuC firmware autoselection Patchwork
2023-03-24  5:28 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-03-24  5:32 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-03-24  5:54 ` [Intel-xe] ○ CI.BAT: info " Patchwork

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