From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Xiaoyao Li <xiaoyao.li@intel.com>
Subject: [PATCH v2 19/66] KVM: VMX: Add helpers to query Intel PT mode
Date: Mon, 2 Mar 2020 15:56:22 -0800 [thread overview]
Message-ID: <20200302235709.27467-20-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20200302235709.27467-1-sean.j.christopherson@intel.com>
Add helpers to query which of the (two) supported PT modes is active.
The primary motivation is to help document that there is a third PT mode
(host-only) that's currently not supported by KVM. As is, it's not
obvious that PT_MODE_SYSTEM != !PT_MODE_HOST_GUEST and vice versa, e.g.
that "pt_mode == PT_MODE_SYSTEM" and "pt_mode != PT_MODE_HOST_GUEST" are
two distinct checks.
No functional change intended.
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
arch/x86/kvm/vmx/capabilities.h | 18 ++++++++++++++++++
arch/x86/kvm/vmx/nested.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 26 +++++++++++++-------------
arch/x86/kvm/vmx/vmx.h | 4 ++--
4 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
index f486e2606247..80eec8cffbe2 100644
--- a/arch/x86/kvm/vmx/capabilities.h
+++ b/arch/x86/kvm/vmx/capabilities.h
@@ -354,4 +354,22 @@ static inline bool cpu_has_vmx_intel_pt(void)
(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
}
+/*
+ * Processor Trace can operate in one of three modes:
+ * a. system-wide: trace both host/guest and output to host buffer
+ * b. host-only: only trace host and output to host buffer
+ * c. host-guest: trace host and guest simultaneously and output to their
+ * respective buffer
+ *
+ * KVM currently only supports (a) and (c).
+ */
+static inline bool vmx_pt_mode_is_system(void)
+{
+ return pt_mode == PT_MODE_SYSTEM;
+}
+static inline bool vmx_pt_mode_is_host_guest(void)
+{
+ return pt_mode == PT_MODE_HOST_GUEST;
+}
+
#endif /* __KVM_X86_VMX_CAPS_H */
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 0946122a8d3b..ae84b3c66e0d 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -4602,7 +4602,7 @@ static int enter_vmx_operation(struct kvm_vcpu *vcpu)
vmx->nested.vmcs02_initialized = false;
vmx->nested.vmxon = true;
- if (pt_mode == PT_MODE_HOST_GUEST) {
+ if (vmx_pt_mode_is_host_guest()) {
vmx->pt_desc.guest.ctl = 0;
pt_update_intercept_for_msr(vmx);
}
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index a04017bdae05..2dcf27e3a7a6 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1059,7 +1059,7 @@ static unsigned long segment_base(u16 selector)
static inline bool pt_can_write_msr(struct vcpu_vmx *vmx)
{
- return (pt_mode == PT_MODE_HOST_GUEST) &&
+ return vmx_pt_mode_is_host_guest() &&
!(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN);
}
@@ -1093,7 +1093,7 @@ static inline void pt_save_msr(struct pt_ctx *ctx, u32 addr_range)
static void pt_guest_enter(struct vcpu_vmx *vmx)
{
- if (pt_mode == PT_MODE_SYSTEM)
+ if (vmx_pt_mode_is_system())
return;
/*
@@ -1110,7 +1110,7 @@ static void pt_guest_enter(struct vcpu_vmx *vmx)
static void pt_guest_exit(struct vcpu_vmx *vmx)
{
- if (pt_mode == PT_MODE_SYSTEM)
+ if (vmx_pt_mode_is_system())
return;
if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) {
@@ -1904,24 +1904,24 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
&msr_info->data);
break;
case MSR_IA32_RTIT_CTL:
- if (pt_mode != PT_MODE_HOST_GUEST)
+ if (!vmx_pt_mode_is_host_guest())
return 1;
msr_info->data = vmx->pt_desc.guest.ctl;
break;
case MSR_IA32_RTIT_STATUS:
- if (pt_mode != PT_MODE_HOST_GUEST)
+ if (!vmx_pt_mode_is_host_guest())
return 1;
msr_info->data = vmx->pt_desc.guest.status;
break;
case MSR_IA32_RTIT_CR3_MATCH:
- if ((pt_mode != PT_MODE_HOST_GUEST) ||
+ if (!vmx_pt_mode_is_host_guest() ||
!intel_pt_validate_cap(vmx->pt_desc.caps,
PT_CAP_cr3_filtering))
return 1;
msr_info->data = vmx->pt_desc.guest.cr3_match;
break;
case MSR_IA32_RTIT_OUTPUT_BASE:
- if ((pt_mode != PT_MODE_HOST_GUEST) ||
+ if (!vmx_pt_mode_is_host_guest() ||
(!intel_pt_validate_cap(vmx->pt_desc.caps,
PT_CAP_topa_output) &&
!intel_pt_validate_cap(vmx->pt_desc.caps,
@@ -1930,7 +1930,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
msr_info->data = vmx->pt_desc.guest.output_base;
break;
case MSR_IA32_RTIT_OUTPUT_MASK:
- if ((pt_mode != PT_MODE_HOST_GUEST) ||
+ if (!vmx_pt_mode_is_host_guest() ||
(!intel_pt_validate_cap(vmx->pt_desc.caps,
PT_CAP_topa_output) &&
!intel_pt_validate_cap(vmx->pt_desc.caps,
@@ -1940,7 +1940,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
break;
case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
index = msr_info->index - MSR_IA32_RTIT_ADDR0_A;
- if ((pt_mode != PT_MODE_HOST_GUEST) ||
+ if (!vmx_pt_mode_is_host_guest() ||
(index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps,
PT_CAP_num_address_ranges)))
return 1;
@@ -2146,7 +2146,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return 1;
return vmx_set_vmx_msr(vcpu, msr_index, data);
case MSR_IA32_RTIT_CTL:
- if ((pt_mode != PT_MODE_HOST_GUEST) ||
+ if (!vmx_pt_mode_is_host_guest() ||
vmx_rtit_ctl_check(vcpu, data) ||
vmx->nested.vmxon)
return 1;
@@ -4024,7 +4024,7 @@ static void vmx_compute_secondary_exec_control(struct vcpu_vmx *vmx)
u32 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
- if (pt_mode == PT_MODE_SYSTEM)
+ if (vmx_pt_mode_is_system())
exec_control &= ~(SECONDARY_EXEC_PT_USE_GPA | SECONDARY_EXEC_PT_CONCEAL_VMX);
if (!cpu_need_virtualize_apic_accesses(vcpu))
exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
@@ -4265,7 +4265,7 @@ static void init_vmcs(struct vcpu_vmx *vmx)
if (cpu_has_vmx_encls_vmexit())
vmcs_write64(ENCLS_EXITING_BITMAP, -1ull);
- if (pt_mode == PT_MODE_HOST_GUEST) {
+ if (vmx_pt_mode_is_host_guest()) {
memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc));
/* Bit[6~0] are forced to 1, writes are ignored. */
vmx->pt_desc.guest.output_mask = 0x7F;
@@ -6314,7 +6314,7 @@ static bool vmx_has_emulated_msr(int index)
static bool vmx_pt_supported(void)
{
- return pt_mode == PT_MODE_HOST_GUEST;
+ return vmx_pt_mode_is_host_guest();
}
static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index e64da06c7009..9a51a3a77233 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -452,7 +452,7 @@ static inline void vmx_segment_cache_clear(struct vcpu_vmx *vmx)
static inline u32 vmx_vmentry_ctrl(void)
{
u32 vmentry_ctrl = vmcs_config.vmentry_ctrl;
- if (pt_mode == PT_MODE_SYSTEM)
+ if (vmx_pt_mode_is_system())
vmentry_ctrl &= ~(VM_ENTRY_PT_CONCEAL_PIP |
VM_ENTRY_LOAD_IA32_RTIT_CTL);
/* Loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically */
@@ -463,7 +463,7 @@ static inline u32 vmx_vmentry_ctrl(void)
static inline u32 vmx_vmexit_ctrl(void)
{
u32 vmexit_ctrl = vmcs_config.vmexit_ctrl;
- if (pt_mode == PT_MODE_SYSTEM)
+ if (vmx_pt_mode_is_system())
vmexit_ctrl &= ~(VM_EXIT_PT_CONCEAL_PIP |
VM_EXIT_CLEAR_IA32_RTIT_CTL);
/* Loading of EFER and PERF_GLOBAL_CTRL are toggled dynamically */
--
2.24.1
next prev parent reply other threads:[~2020-03-03 0:00 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 23:56 [PATCH v2 00/66] KVM: x86: Introduce KVM cpu caps Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 01/66] KVM: x86: Return -E2BIG when KVM_GET_SUPPORTED_CPUID hits max entries Sean Christopherson
2020-03-03 14:16 ` Paolo Bonzini
2020-03-03 15:17 ` Sean Christopherson
2020-03-03 19:47 ` Jim Mattson
2020-03-02 23:56 ` [PATCH v2 02/66] KVM: x86: Refactor loop around do_cpuid_func() to separate helper Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 03/66] KVM: x86: Simplify handling of Centaur CPUID leafs Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 04/66] KVM: x86: Clean up error handling in kvm_dev_ioctl_get_cpuid() Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 05/66] KVM: x86: Check userapce CPUID array size after validating sub-leaf Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 06/66] KVM: x86: Move CPUID 0xD.1 handling out of the index>0 loop Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 07/66] KVM: x86: Check for CPUID 0xD.N support before validating array size Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 08/66] KVM: x86: Warn on zero-size save state for valid CPUID 0xD.N sub-leaf Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 09/66] KVM: x86: Refactor CPUID 0xD.N sub-leaf entry creation Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 10/66] KVM: x86: Clean up CPUID 0x7 sub-leaf loop Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 11/66] KVM: x86: Drop the explicit @index from do_cpuid_7_mask() Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 12/66] KVM: x86: Drop redundant boot cpu checks on SSBD feature bits Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 13/66] KVM: x86: Consolidate CPUID array max num entries checking Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 14/66] KVM: x86: Hoist loop counter and terminator to top of __do_cpuid_func() Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 15/66] KVM: x86: Refactor CPUID 0x4 and 0x8000001d handling Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 16/66] KVM: x86: Encapsulate CPUID entries and metadata in struct Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 17/66] KVM: x86: Drop redundant array size check Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 18/66] KVM: x86: Use common loop iterator when handling CPUID 0xD.N Sean Christopherson
2020-03-02 23:56 ` Sean Christopherson [this message]
2020-03-02 23:56 ` [PATCH v2 20/66] KVM: x86: Calculate the supported xcr0 mask at load time Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 21/66] KVM: x86: Use supported_xcr0 to detect MPX support Sean Christopherson
2020-03-03 14:34 ` Paolo Bonzini
2020-03-02 23:56 ` [PATCH v2 22/66] KVM: x86: Make kvm_mpx_supported() an inline function Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 23/66] KVM: x86: Clear output regs for CPUID 0x14 if PT isn't exposed to guest Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 24/66] KVM: x86: Drop explicit @func param from ->set_supported_cpuid() Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 25/66] KVM: x86: Use u32 for holding CPUID register value in helpers Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 26/66] KVM: x86: Replace bare "unsigned" with "unsigned int" in cpuid helpers Sean Christopherson
2020-03-03 15:43 ` Vitaly Kuznetsov
2020-03-02 23:56 ` [PATCH v2 27/66] KVM: x86: Introduce cpuid_entry_{get,has}() accessors Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 28/66] KVM: x86: Introduce cpuid_entry_{change,set,clear}() mutators Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 29/66] KVM: x86: Refactor cpuid_mask() to auto-retrieve the register Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 30/66] KVM: x86: Handle MPX CPUID adjustment in VMX code Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 31/66] KVM: x86: Handle INVPCID " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 32/66] KVM: x86: Handle UMIP emulation " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 33/66] KVM: x86: Handle PKU " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 34/66] KVM: x86: Handle RDTSCP " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 35/66] KVM: x86: Handle Intel PT " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 36/66] KVM: x86: Handle GBPAGE CPUID adjustment for EPT " Sean Christopherson
2020-03-03 14:59 ` Paolo Bonzini
2020-03-03 15:35 ` Sean Christopherson
2020-03-03 15:40 ` Paolo Bonzini
2020-03-03 15:44 ` Sean Christopherson
2020-03-03 15:47 ` Paolo Bonzini
2020-03-03 15:54 ` Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 37/66] KVM: x86: Refactor handling of XSAVES CPUID adjustment Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 38/66] KVM: x86: Introduce kvm_cpu_caps to replace runtime CPUID masking Sean Christopherson
2020-03-03 15:51 ` Vitaly Kuznetsov
2020-03-02 23:56 ` [PATCH v2 39/66] KVM: SVM: Convert feature updates from CPUID to KVM cpu caps Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 40/66] KVM: VMX: " Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 41/66] KVM: x86: Move XSAVES CPUID adjust to VMX's KVM cpu cap update Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 42/66] KVM: x86: Add a helper to check kernel support when setting cpu cap Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 43/66] KVM: x86: Use KVM cpu caps to mark CR4.LA57 as not-reserved Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 44/66] KVM: x86: Use KVM cpu caps to track UMIP emulation Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 45/66] KVM: x86: Fold CPUID 0x7 masking back into __do_cpuid_func() Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 46/66] KVM: x86: Remove the unnecessary loop on CPUID 0x7 sub-leafs Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 47/66] KVM: x86: Squash CPUID 0x2.0 insanity for modern CPUs Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 48/66] KVM: x86: Remove stateful CPUID handling Sean Christopherson
2020-03-03 15:59 ` Vitaly Kuznetsov
2020-03-03 19:23 ` Jim Mattson
2020-03-02 23:56 ` [PATCH v2 49/66] KVM: x86: Do host CPUID at load time to mask KVM cpu caps Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 50/66] KVM: x86: Override host CPUID results with kvm_cpu_caps Sean Christopherson
2020-03-03 15:22 ` Paolo Bonzini
2020-03-03 15:56 ` Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 51/66] KVM: x86: Set emulated/transmuted feature bits via kvm_cpu_caps Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 52/66] KVM: x86: Use kvm_cpu_caps to detect Intel PT support Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 53/66] KVM: x86: Do kvm_cpuid_array capacity checks in terminal functions Sean Christopherson
2020-03-03 16:03 ` Vitaly Kuznetsov
2020-03-02 23:56 ` [PATCH v2 54/66] KVM: x86: Use KVM cpu caps to detect MSR_TSC_AUX virt support Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 55/66] KVM: VMX: Directly use VMX capabilities helper to detect RDTSCP support Sean Christopherson
2020-03-02 23:56 ` [PATCH v2 56/66] KVM: x86: Check for Intel PT MSR virtualization using KVM cpu caps Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 57/66] KVM: VMX: Directly query Intel PT mode when refreshing PMUs Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 58/66] KVM: SVM: Refactor logging of NPT enabled/disabled Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 59/66] KVM: x86/mmu: Merge kvm_{enable,disable}_tdp() into a common function Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 60/66] KVM: x86/mmu: Configure max page level during hardware setup Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 61/66] KVM: x86: Don't propagate MMU lpage support to memslot.disallow_lpage Sean Christopherson
2020-03-03 15:31 ` Paolo Bonzini
2020-03-03 16:00 ` Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 62/66] KVM: Drop largepages_enabled and its accessor/mutator Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 63/66] KVM: x86: Move VMX's host_efer to common x86 code Sean Christopherson
2020-03-02 23:57 ` [PATCH v2 64/66] KVM: nSVM: Expose SVM features to L1 iff nested is enabled Sean Christopherson
2020-03-03 16:12 ` Vitaly Kuznetsov
2020-03-03 18:37 ` Jim Mattson
2020-03-02 23:57 ` [PATCH v2 65/66] KVM: nSVM: Advertise and enable NRIPS for L1 iff nrips " Sean Christopherson
2020-03-03 16:14 ` Vitaly Kuznetsov
2020-03-02 23:57 ` [PATCH v2 66/66] KVM: x86: Move nSVM CPUID 0x8000000A handing into common x86 code Sean Christopherson
2020-03-03 15:35 ` Paolo Bonzini
2020-03-03 15:37 ` Sean Christopherson
2020-03-03 16:48 ` [PATCH v2 00/66] KVM: x86: Introduce KVM cpu caps Vitaly Kuznetsov
2020-03-06 8:27 ` Paolo Bonzini
2020-03-09 20:11 ` Sean Christopherson
2020-03-11 18:37 ` Paolo Bonzini
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