From: Like Xu <like.xu.linux@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: Jim Mattson <jmattson@google.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Like Xu <likexu@tencent.com>
Subject: Re: [PATCH kvm/queue v2 2/3] perf: x86/core: Add interface to query perfmon_event_map[] directly
Date: Tue, 8 Feb 2022 19:52:40 +0800 [thread overview]
Message-ID: <319bd90e-5315-35c2-0d0c-32ced685a147@gmail.com> (raw)
In-Reply-To: <20220202144308.GB20638@worktop.programming.kicks-ass.net>
On 2/2/2022 10:43 pm, Peter Zijlstra wrote:
> On Mon, Jan 17, 2022 at 04:53:06PM +0800, Like Xu wrote:
>> From: Like Xu <likexu@tencent.com>
>>
>> Currently, we have [intel|knc|p4|p6]_perfmon_event_map on the Intel
>> platforms and amd_[f17h]_perfmon_event_map on the AMD platforms.
>>
>> Early clumsy KVM code or other potential perf_event users may have
>> hard-coded these perfmon_maps (e.g., arch/x86/kvm/svm/pmu.c), so
>> it would not make sense to program a common hardware event based
>> on the generic "enum perf_hw_id" once the two tables do not match.
>>
>> Let's provide an interface for callers outside the perf subsystem to get
>> the counter config based on the perfmon_event_map currently in use,
>> and it also helps to save bytes.
>>
>> Cc: Peter Zijlstra <peterz@infradead.org>
>> Signed-off-by: Like Xu <likexu@tencent.com>
>> ---
>> arch/x86/events/core.c | 9 +++++++++
>> arch/x86/include/asm/perf_event.h | 2 ++
>> 2 files changed, 11 insertions(+)
>>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 38b2c779146f..751048f4cc97 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -693,6 +693,15 @@ void x86_pmu_disable_all(void)
>> }
>> }
>>
>> +u64 perf_get_hw_event_config(int perf_hw_id)
>> +{
>> + if (perf_hw_id < x86_pmu.max_events)
>> + return x86_pmu.event_map(perf_hw_id);
>> +
>> + return 0;
>> +}
>
> Where does perf_hw_id come from? Does this need to be
> array_index_nospec() ?
A valid incoming parameter will be a member of the generic "enum perf_hw_id" table.
If array_index_nospec() helps, how about:
+u64 perf_get_hw_event_config(int hw_event)
+{
+ int max = x86_pmu.max_events;
+
+ if (hw_event < max)
+ return x86_pmu.event_map(array_index_nospec(hw_event, max));
+
+ return 0;
+}
>
>> +EXPORT_SYMBOL_GPL(perf_get_hw_event_config);
>
> Urgh... hate on kvm being a module again. We really need something like
> EXPORT_SYMBOL_KVM() or something.
As opposed to maintaining the obsolete {intel|amd}_event_mapping[] in the out
context of perf,
a more appropriate method is to set up the table in the KVM through the new perf
interface.
Well, I probably need Paolo's clarity to trigger more changes, whether it's
introducing EXPORT_SYMBOL_KVM or a built-in KVM as a necessary prerequisite for
vPMU.
>
>
>> struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
>> {
>> return static_call(x86_pmu_guest_get_msrs)(nr);
>> diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
>> index 8fc1b5003713..d1e325517b74 100644
>> --- a/arch/x86/include/asm/perf_event.h
>> +++ b/arch/x86/include/asm/perf_event.h
>> @@ -492,9 +492,11 @@ static inline void perf_check_microcode(void) { }
>>
>> #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
>> extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
>> +extern u64 perf_get_hw_event_config(int perf_hw_id);
>> extern int x86_perf_get_lbr(struct x86_pmu_lbr *lbr);
>> #else
>> struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
>> +u64 perf_get_hw_event_config(int perf_hw_id);
>
> I think Paolo already spotted this one.
Indeed, I will apply it.
>
>> static inline int x86_perf_get_lbr(struct x86_pmu_lbr *lbr)
>> {
>> return -1;
>> --
>> 2.33.1
>>
next prev parent reply other threads:[~2022-02-08 11:52 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-17 8:53 [PATCH kvm/queue v2 0/3] KVM: x86/pmu: Fix out-of-date AMD amd_event_mapping[] Like Xu
2022-01-17 8:53 ` [PATCH kvm/queue v2 1/3] KVM: x86/pmu: Replace pmu->available_event_types with a new BITMAP Like Xu
2022-02-01 12:26 ` Paolo Bonzini
2022-01-17 8:53 ` [PATCH kvm/queue v2 2/3] perf: x86/core: Add interface to query perfmon_event_map[] directly Like Xu
2022-02-01 12:27 ` Paolo Bonzini
2022-02-02 14:43 ` Peter Zijlstra
2022-02-02 22:35 ` Jim Mattson
2022-02-03 17:33 ` David Dunn
2022-02-09 8:10 ` KVM: x86: Reconsider the current approach of vPMU Like Xu
2022-02-09 13:33 ` Peter Zijlstra
2022-02-09 21:00 ` Sean Christopherson
2022-02-10 12:08 ` Like Xu
2022-02-10 17:12 ` Sean Christopherson
2022-02-16 3:33 ` Like Xu
2022-02-16 17:53 ` Jim Mattson
2022-02-09 13:21 ` [PATCH kvm/queue v2 2/3] perf: x86/core: Add interface to query perfmon_event_map[] directly Peter Zijlstra
2022-02-09 15:40 ` Dave Hansen
2022-02-09 18:47 ` Jim Mattson
2022-02-09 18:57 ` Dave Hansen
2022-02-09 19:24 ` David Dunn
2022-02-10 13:29 ` Like Xu
2022-02-10 15:34 ` Liang, Kan
2022-02-10 16:34 ` Jim Mattson
2022-02-10 18:30 ` Liang, Kan
2022-02-10 19:16 ` Jim Mattson
2022-02-10 19:46 ` Liang, Kan
2022-02-10 19:55 ` David Dunn
2022-02-11 14:11 ` Liang, Kan
2022-02-11 18:08 ` Jim Mattson
2022-02-11 21:47 ` Liang, Kan
2022-02-12 23:31 ` Jim Mattson
2022-02-14 21:55 ` Liang, Kan
2022-02-14 22:55 ` Jim Mattson
2022-02-16 7:36 ` Like Xu
2022-02-16 18:10 ` Jim Mattson
2022-02-16 7:30 ` Like Xu
2022-02-16 5:08 ` Like Xu
2022-02-10 12:55 ` Like Xu
2022-02-12 23:32 ` Jim Mattson
2022-02-08 11:52 ` Like Xu [this message]
2022-01-17 8:53 ` [PATCH kvm/queue v2 3/3] KVM: x86/pmu: Setup the {inte|amd}_event_mapping[] when hardware_setup Like Xu
2022-02-01 12:28 ` Paolo Bonzini
2022-02-08 10:10 ` Like Xu
2022-01-26 11:22 ` [PATCH kvm/queue v2 0/3] KVM: x86/pmu: Fix out-of-date AMD amd_event_mapping[] Like Xu
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