* [PATCH 0/3] RISC-V: KVM: Few assorted changes
@ 2021-10-26 17:01 Anup Patel
2021-10-26 17:01 ` [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module Anup Patel
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Anup Patel @ 2021-10-26 17:01 UTC (permalink / raw)
To: Palmer Dabbelt, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Paolo Bonzini, Atish Patra, Anup Patel, kvm, kvm-riscv,
linux-riscv, linux-kernel, Anup Patel
I had a few assorted KVM RISC-V changes which I wanted to sent after
KVM RISC-V was merged hence this series.
These patches can also be found in riscv_kvm_assorted_v1 branch at:
https://github.com/avpatel/linux.git
Anup Patel (3):
RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
RISC-V: KVM: Factor-out FP virtualization into separate sources
RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions
arch/riscv/configs/defconfig | 15 ++-
arch/riscv/configs/rv32_defconfig | 8 +-
arch/riscv/include/asm/kvm_host.h | 10 +-
arch/riscv/include/asm/kvm_vcpu_fp.h | 59 +++++++++
arch/riscv/kvm/Makefile | 1 +
arch/riscv/kvm/tlb.S | 4 +-
arch/riscv/kvm/vcpu.c | 172 ---------------------------
arch/riscv/kvm/vcpu_fp.c | 167 ++++++++++++++++++++++++++
8 files changed, 244 insertions(+), 192 deletions(-)
create mode 100644 arch/riscv/include/asm/kvm_vcpu_fp.h
create mode 100644 arch/riscv/kvm/vcpu_fp.c
--
2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
2021-10-26 17:01 [PATCH 0/3] RISC-V: KVM: Few assorted changes Anup Patel
@ 2021-10-26 17:01 ` Anup Patel
2021-10-27 22:12 ` Palmer Dabbelt
2021-10-26 17:01 ` [PATCH 2/3] RISC-V: KVM: Factor-out FP virtualization into separate sources Anup Patel
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Anup Patel @ 2021-10-26 17:01 UTC (permalink / raw)
To: Palmer Dabbelt, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Paolo Bonzini, Atish Patra, Anup Patel, kvm, kvm-riscv,
linux-riscv, linux-kernel, Anup Patel
Let's enable KVM RISC-V in RV64 and RV32 defconfigs as module
so that it always built along with the default kernel image.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/configs/defconfig | 15 +++++++--------
arch/riscv/configs/rv32_defconfig | 8 ++++----
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 4ebc80315f01..40506dfab5cf 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
@@ -13,12 +14,14 @@ CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
-CONFIG_BPF_SYSCALL=y
+# CONFIG_SYSFS_SYSCALL is not set
+CONFIG_SOC_MICROCHIP_POLARFIRE=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
-CONFIG_SOC_MICROCHIP_POLARFIRE=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=m
CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
@@ -68,14 +71,12 @@ CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_SPI=y
CONFIG_SPI_SIFIVE=y
+# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIOLIB=y
CONFIG_GPIO_SIFIVE=y
-# CONFIG_PTP_1588_CLOCK is not set
-CONFIG_POWER_RESET=y
CONFIG_DRM=y
CONFIG_DRM_RADEON=y
CONFIG_DRM_VIRTIO_GPU=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
@@ -85,10 +86,10 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
+CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_CADENCE=y
-CONFIG_MMC=y
CONFIG_MMC_SPI=y
CONFIG_RTC_CLASS=y
CONFIG_VIRTIO_PCI=y
@@ -139,5 +140,3 @@ CONFIG_RCU_EQS_DEBUG=y
# CONFIG_FTRACE is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_MEMTEST=y
-# CONFIG_SYSFS_SYSCALL is not set
-CONFIG_EFI=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 434ef5b64599..44022e048efd 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_CGROUPS=y
@@ -13,12 +14,14 @@ CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
-CONFIG_BPF_SYSCALL=y
+# CONFIG_SYSFS_SYSCALL is not set
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV32I=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=m
CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
@@ -67,11 +70,9 @@ CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_SPI=y
CONFIG_SPI_SIFIVE=y
# CONFIG_PTP_1588_CLOCK is not set
-CONFIG_POWER_RESET=y
CONFIG_DRM=y
CONFIG_DRM_RADEON=y
CONFIG_DRM_VIRTIO_GPU=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
@@ -130,4 +131,3 @@ CONFIG_RCU_EQS_DEBUG=y
# CONFIG_FTRACE is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_MEMTEST=y
-# CONFIG_SYSFS_SYSCALL is not set
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/3] RISC-V: KVM: Factor-out FP virtualization into separate sources
2021-10-26 17:01 [PATCH 0/3] RISC-V: KVM: Few assorted changes Anup Patel
2021-10-26 17:01 ` [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module Anup Patel
@ 2021-10-26 17:01 ` Anup Patel
2021-10-26 17:01 ` [PATCH 3/3] RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions Anup Patel
2021-10-28 14:07 ` [PATCH 0/3] RISC-V: KVM: Few assorted changes Paolo Bonzini
3 siblings, 0 replies; 9+ messages in thread
From: Anup Patel @ 2021-10-26 17:01 UTC (permalink / raw)
To: Palmer Dabbelt, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Paolo Bonzini, Atish Patra, Anup Patel, kvm, kvm-riscv,
linux-riscv, linux-kernel, Anup Patel
The timer and SBI virtualization is already in separate sources.
In future, we will have vector and AIA virtualization also added
as separate sources.
To align with above described modularity, we factor-out FP
virtualization into separate sources.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/include/asm/kvm_host.h | 5 +-
arch/riscv/include/asm/kvm_vcpu_fp.h | 59 +++++++++
arch/riscv/kvm/Makefile | 1 +
arch/riscv/kvm/vcpu.c | 172 ---------------------------
arch/riscv/kvm/vcpu_fp.c | 167 ++++++++++++++++++++++++++
5 files changed, 228 insertions(+), 176 deletions(-)
create mode 100644 arch/riscv/include/asm/kvm_vcpu_fp.h
create mode 100644 arch/riscv/kvm/vcpu_fp.c
diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
index d7e1696cd2ec..d27878d6adf9 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -12,6 +12,7 @@
#include <linux/types.h>
#include <linux/kvm.h>
#include <linux/kvm_types.h>
+#include <asm/kvm_vcpu_fp.h>
#include <asm/kvm_vcpu_timer.h>
#ifdef CONFIG_64BIT
@@ -247,10 +248,6 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
struct kvm_cpu_trap *trap);
void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch);
-void __kvm_riscv_fp_f_save(struct kvm_cpu_context *context);
-void __kvm_riscv_fp_f_restore(struct kvm_cpu_context *context);
-void __kvm_riscv_fp_d_save(struct kvm_cpu_context *context);
-void __kvm_riscv_fp_d_restore(struct kvm_cpu_context *context);
int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
diff --git a/arch/riscv/include/asm/kvm_vcpu_fp.h b/arch/riscv/include/asm/kvm_vcpu_fp.h
new file mode 100644
index 000000000000..4da9b8e0f050
--- /dev/null
+++ b/arch/riscv/include/asm/kvm_vcpu_fp.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra <atish.patra@wdc.com>
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __KVM_VCPU_RISCV_FP_H
+#define __KVM_VCPU_RISCV_FP_H
+
+#include <linux/types.h>
+
+struct kvm_cpu_context;
+
+#ifdef CONFIG_FPU
+void __kvm_riscv_fp_f_save(struct kvm_cpu_context *context);
+void __kvm_riscv_fp_f_restore(struct kvm_cpu_context *context);
+void __kvm_riscv_fp_d_save(struct kvm_cpu_context *context);
+void __kvm_riscv_fp_d_restore(struct kvm_cpu_context *context);
+
+void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu);
+void kvm_riscv_vcpu_guest_fp_save(struct kvm_cpu_context *cntx,
+ unsigned long isa);
+void kvm_riscv_vcpu_guest_fp_restore(struct kvm_cpu_context *cntx,
+ unsigned long isa);
+void kvm_riscv_vcpu_host_fp_save(struct kvm_cpu_context *cntx);
+void kvm_riscv_vcpu_host_fp_restore(struct kvm_cpu_context *cntx);
+#else
+static inline void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu)
+{
+}
+static inline void kvm_riscv_vcpu_guest_fp_save(struct kvm_cpu_context *cntx,
+ unsigned long isa)
+{
+}
+static inline void kvm_riscv_vcpu_guest_fp_restore(
+ struct kvm_cpu_context *cntx,
+ unsigned long isa)
+{
+}
+static inline void kvm_riscv_vcpu_host_fp_save(struct kvm_cpu_context *cntx)
+{
+}
+static inline void kvm_riscv_vcpu_host_fp_restore(
+ struct kvm_cpu_context *cntx)
+{
+}
+#endif
+
+int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu,
+ const struct kvm_one_reg *reg,
+ unsigned long rtype);
+int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu,
+ const struct kvm_one_reg *reg,
+ unsigned long rtype);
+
+#endif
diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
index 3226696b8340..30cdd1df0098 100644
--- a/arch/riscv/kvm/Makefile
+++ b/arch/riscv/kvm/Makefile
@@ -20,6 +20,7 @@ kvm-y += tlb.o
kvm-y += mmu.o
kvm-y += vcpu.o
kvm-y += vcpu_exit.o
+kvm-y += vcpu_fp.o
kvm-y += vcpu_switch.o
kvm-y += vcpu_sbi.o
kvm-y += vcpu_timer.o
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 912928586df9..e3d3aed46184 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -38,86 +38,6 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
sizeof(kvm_vcpu_stats_desc),
};
-#ifdef CONFIG_FPU
-static void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu)
-{
- unsigned long isa = vcpu->arch.isa;
- struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
-
- cntx->sstatus &= ~SR_FS;
- if (riscv_isa_extension_available(&isa, f) ||
- riscv_isa_extension_available(&isa, d))
- cntx->sstatus |= SR_FS_INITIAL;
- else
- cntx->sstatus |= SR_FS_OFF;
-}
-
-static void kvm_riscv_vcpu_fp_clean(struct kvm_cpu_context *cntx)
-{
- cntx->sstatus &= ~SR_FS;
- cntx->sstatus |= SR_FS_CLEAN;
-}
-
-static void kvm_riscv_vcpu_guest_fp_save(struct kvm_cpu_context *cntx,
- unsigned long isa)
-{
- if ((cntx->sstatus & SR_FS) == SR_FS_DIRTY) {
- if (riscv_isa_extension_available(&isa, d))
- __kvm_riscv_fp_d_save(cntx);
- else if (riscv_isa_extension_available(&isa, f))
- __kvm_riscv_fp_f_save(cntx);
- kvm_riscv_vcpu_fp_clean(cntx);
- }
-}
-
-static void kvm_riscv_vcpu_guest_fp_restore(struct kvm_cpu_context *cntx,
- unsigned long isa)
-{
- if ((cntx->sstatus & SR_FS) != SR_FS_OFF) {
- if (riscv_isa_extension_available(&isa, d))
- __kvm_riscv_fp_d_restore(cntx);
- else if (riscv_isa_extension_available(&isa, f))
- __kvm_riscv_fp_f_restore(cntx);
- kvm_riscv_vcpu_fp_clean(cntx);
- }
-}
-
-static void kvm_riscv_vcpu_host_fp_save(struct kvm_cpu_context *cntx)
-{
- /* No need to check host sstatus as it can be modified outside */
- if (riscv_isa_extension_available(NULL, d))
- __kvm_riscv_fp_d_save(cntx);
- else if (riscv_isa_extension_available(NULL, f))
- __kvm_riscv_fp_f_save(cntx);
-}
-
-static void kvm_riscv_vcpu_host_fp_restore(struct kvm_cpu_context *cntx)
-{
- if (riscv_isa_extension_available(NULL, d))
- __kvm_riscv_fp_d_restore(cntx);
- else if (riscv_isa_extension_available(NULL, f))
- __kvm_riscv_fp_f_restore(cntx);
-}
-#else
-static void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu)
-{
-}
-static void kvm_riscv_vcpu_guest_fp_save(struct kvm_cpu_context *cntx,
- unsigned long isa)
-{
-}
-static void kvm_riscv_vcpu_guest_fp_restore(struct kvm_cpu_context *cntx,
- unsigned long isa)
-{
-}
-static void kvm_riscv_vcpu_host_fp_save(struct kvm_cpu_context *cntx)
-{
-}
-static void kvm_riscv_vcpu_host_fp_restore(struct kvm_cpu_context *cntx)
-{
-}
-#endif
-
#define KVM_RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \
riscv_isa_extension_mask(c) | \
riscv_isa_extension_mask(d) | \
@@ -414,98 +334,6 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
return 0;
}
-static int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu,
- const struct kvm_one_reg *reg,
- unsigned long rtype)
-{
- struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
- unsigned long isa = vcpu->arch.isa;
- unsigned long __user *uaddr =
- (unsigned long __user *)(unsigned long)reg->addr;
- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
- KVM_REG_SIZE_MASK |
- rtype);
- void *reg_val;
-
- if ((rtype == KVM_REG_RISCV_FP_F) &&
- riscv_isa_extension_available(&isa, f)) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u32))
- return -EINVAL;
- if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
- reg_val = &cntx->fp.f.fcsr;
- else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
- reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
- reg_val = &cntx->fp.f.f[reg_num];
- else
- return -EINVAL;
- } else if ((rtype == KVM_REG_RISCV_FP_D) &&
- riscv_isa_extension_available(&isa, d)) {
- if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u32))
- return -EINVAL;
- reg_val = &cntx->fp.d.fcsr;
- } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) &&
- reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u64))
- return -EINVAL;
- reg_val = &cntx->fp.d.f[reg_num];
- } else
- return -EINVAL;
- } else
- return -EINVAL;
-
- if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id)))
- return -EFAULT;
-
- return 0;
-}
-
-static int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu,
- const struct kvm_one_reg *reg,
- unsigned long rtype)
-{
- struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
- unsigned long isa = vcpu->arch.isa;
- unsigned long __user *uaddr =
- (unsigned long __user *)(unsigned long)reg->addr;
- unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
- KVM_REG_SIZE_MASK |
- rtype);
- void *reg_val;
-
- if ((rtype == KVM_REG_RISCV_FP_F) &&
- riscv_isa_extension_available(&isa, f)) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u32))
- return -EINVAL;
- if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
- reg_val = &cntx->fp.f.fcsr;
- else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
- reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
- reg_val = &cntx->fp.f.f[reg_num];
- else
- return -EINVAL;
- } else if ((rtype == KVM_REG_RISCV_FP_D) &&
- riscv_isa_extension_available(&isa, d)) {
- if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u32))
- return -EINVAL;
- reg_val = &cntx->fp.d.fcsr;
- } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) &&
- reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
- if (KVM_REG_SIZE(reg->id) != sizeof(u64))
- return -EINVAL;
- reg_val = &cntx->fp.d.f[reg_num];
- } else
- return -EINVAL;
- } else
- return -EINVAL;
-
- if (copy_from_user(reg_val, uaddr, KVM_REG_SIZE(reg->id)))
- return -EFAULT;
-
- return 0;
-}
-
static int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu,
const struct kvm_one_reg *reg)
{
diff --git a/arch/riscv/kvm/vcpu_fp.c b/arch/riscv/kvm/vcpu_fp.c
new file mode 100644
index 000000000000..1b070152578f
--- /dev/null
+++ b/arch/riscv/kvm/vcpu_fp.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra <atish.patra@wdc.com>
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/kvm_host.h>
+#include <linux/uaccess.h>
+
+#ifdef CONFIG_FPU
+void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu)
+{
+ unsigned long isa = vcpu->arch.isa;
+ struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
+
+ cntx->sstatus &= ~SR_FS;
+ if (riscv_isa_extension_available(&isa, f) ||
+ riscv_isa_extension_available(&isa, d))
+ cntx->sstatus |= SR_FS_INITIAL;
+ else
+ cntx->sstatus |= SR_FS_OFF;
+}
+
+void kvm_riscv_vcpu_fp_clean(struct kvm_cpu_context *cntx)
+{
+ cntx->sstatus &= ~SR_FS;
+ cntx->sstatus |= SR_FS_CLEAN;
+}
+
+void kvm_riscv_vcpu_guest_fp_save(struct kvm_cpu_context *cntx,
+ unsigned long isa)
+{
+ if ((cntx->sstatus & SR_FS) == SR_FS_DIRTY) {
+ if (riscv_isa_extension_available(&isa, d))
+ __kvm_riscv_fp_d_save(cntx);
+ else if (riscv_isa_extension_available(&isa, f))
+ __kvm_riscv_fp_f_save(cntx);
+ kvm_riscv_vcpu_fp_clean(cntx);
+ }
+}
+
+void kvm_riscv_vcpu_guest_fp_restore(struct kvm_cpu_context *cntx,
+ unsigned long isa)
+{
+ if ((cntx->sstatus & SR_FS) != SR_FS_OFF) {
+ if (riscv_isa_extension_available(&isa, d))
+ __kvm_riscv_fp_d_restore(cntx);
+ else if (riscv_isa_extension_available(&isa, f))
+ __kvm_riscv_fp_f_restore(cntx);
+ kvm_riscv_vcpu_fp_clean(cntx);
+ }
+}
+
+void kvm_riscv_vcpu_host_fp_save(struct kvm_cpu_context *cntx)
+{
+ /* No need to check host sstatus as it can be modified outside */
+ if (riscv_isa_extension_available(NULL, d))
+ __kvm_riscv_fp_d_save(cntx);
+ else if (riscv_isa_extension_available(NULL, f))
+ __kvm_riscv_fp_f_save(cntx);
+}
+
+void kvm_riscv_vcpu_host_fp_restore(struct kvm_cpu_context *cntx)
+{
+ if (riscv_isa_extension_available(NULL, d))
+ __kvm_riscv_fp_d_restore(cntx);
+ else if (riscv_isa_extension_available(NULL, f))
+ __kvm_riscv_fp_f_restore(cntx);
+}
+#endif
+
+int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu,
+ const struct kvm_one_reg *reg,
+ unsigned long rtype)
+{
+ struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
+ unsigned long isa = vcpu->arch.isa;
+ unsigned long __user *uaddr =
+ (unsigned long __user *)(unsigned long)reg->addr;
+ unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
+ KVM_REG_SIZE_MASK |
+ rtype);
+ void *reg_val;
+
+ if ((rtype == KVM_REG_RISCV_FP_F) &&
+ riscv_isa_extension_available(&isa, f)) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+ return -EINVAL;
+ if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
+ reg_val = &cntx->fp.f.fcsr;
+ else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+ reg_val = &cntx->fp.f.f[reg_num];
+ else
+ return -EINVAL;
+ } else if ((rtype == KVM_REG_RISCV_FP_D) &&
+ riscv_isa_extension_available(&isa, d)) {
+ if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+ return -EINVAL;
+ reg_val = &cntx->fp.d.fcsr;
+ } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u64))
+ return -EINVAL;
+ reg_val = &cntx->fp.d.f[reg_num];
+ } else
+ return -EINVAL;
+ } else
+ return -EINVAL;
+
+ if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id)))
+ return -EFAULT;
+
+ return 0;
+}
+
+int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu,
+ const struct kvm_one_reg *reg,
+ unsigned long rtype)
+{
+ struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
+ unsigned long isa = vcpu->arch.isa;
+ unsigned long __user *uaddr =
+ (unsigned long __user *)(unsigned long)reg->addr;
+ unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
+ KVM_REG_SIZE_MASK |
+ rtype);
+ void *reg_val;
+
+ if ((rtype == KVM_REG_RISCV_FP_F) &&
+ riscv_isa_extension_available(&isa, f)) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+ return -EINVAL;
+ if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
+ reg_val = &cntx->fp.f.fcsr;
+ else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+ reg_val = &cntx->fp.f.f[reg_num];
+ else
+ return -EINVAL;
+ } else if ((rtype == KVM_REG_RISCV_FP_D) &&
+ riscv_isa_extension_available(&isa, d)) {
+ if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+ return -EINVAL;
+ reg_val = &cntx->fp.d.fcsr;
+ } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
+ if (KVM_REG_SIZE(reg->id) != sizeof(u64))
+ return -EINVAL;
+ reg_val = &cntx->fp.d.f[reg_num];
+ } else
+ return -EINVAL;
+ } else
+ return -EINVAL;
+
+ if (copy_from_user(reg_val, uaddr, KVM_REG_SIZE(reg->id)))
+ return -EFAULT;
+
+ return 0;
+}
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/3] RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions
2021-10-26 17:01 [PATCH 0/3] RISC-V: KVM: Few assorted changes Anup Patel
2021-10-26 17:01 ` [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module Anup Patel
2021-10-26 17:01 ` [PATCH 2/3] RISC-V: KVM: Factor-out FP virtualization into separate sources Anup Patel
@ 2021-10-26 17:01 ` Anup Patel
2021-10-28 14:07 ` [PATCH 0/3] RISC-V: KVM: Few assorted changes Paolo Bonzini
3 siblings, 0 replies; 9+ messages in thread
From: Anup Patel @ 2021-10-26 17:01 UTC (permalink / raw)
To: Palmer Dabbelt, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Paolo Bonzini, Atish Patra, Anup Patel, kvm, kvm-riscv,
linux-riscv, linux-kernel, Anup Patel, Ian Huang
The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).
Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because:
1) Currently, only __kvm_riscv_hfence_gvma_all() and SBI
HFENCE calls are used to invalidate TLB.
2) All H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) that we tried till now were
conservatively flushing everything upon any HFENCE.GVMA
instruction.
This patch fixes GPA passed to __kvm_riscv_hfence_gvma_vmid_gpa()
and __kvm_riscv_hfence_gvma_gpa() functions.
Fixes: fd7bb4a251df ("RISC-V: KVM: Implement VMID allocator")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/include/asm/kvm_host.h | 5 +++--
arch/riscv/kvm/tlb.S | 4 ++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
index d27878d6adf9..25ba21f98504 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -214,9 +214,10 @@ static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
#define KVM_ARCH_WANT_MMU_NOTIFIER
-void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long gpa, unsigned long vmid);
+void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long gpa_divby_4,
+ unsigned long vmid);
void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid);
-void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa);
+void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa_divby_4);
void __kvm_riscv_hfence_gvma_all(void);
int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu,
diff --git a/arch/riscv/kvm/tlb.S b/arch/riscv/kvm/tlb.S
index c858570f0856..899f75d60bad 100644
--- a/arch/riscv/kvm/tlb.S
+++ b/arch/riscv/kvm/tlb.S
@@ -31,7 +31,7 @@
ENTRY(__kvm_riscv_hfence_gvma_vmid_gpa)
/*
- * rs1 = a0 (GPA)
+ * rs1 = a0 (GPA >> 2)
* rs2 = a1 (VMID)
* HFENCE.GVMA a0, a1
* 0110001 01011 01010 000 00000 1110011
@@ -53,7 +53,7 @@ ENDPROC(__kvm_riscv_hfence_gvma_vmid)
ENTRY(__kvm_riscv_hfence_gvma_gpa)
/*
- * rs1 = a0 (GPA)
+ * rs1 = a0 (GPA >> 2)
* rs2 = zero
* HFENCE.GVMA a0
* 0110001 00000 01010 000 00000 1110011
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
2021-10-26 17:01 ` [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module Anup Patel
@ 2021-10-27 22:12 ` Palmer Dabbelt
2021-10-27 23:01 ` Paolo Bonzini
2021-10-28 15:37 ` Anup Patel
0 siblings, 2 replies; 9+ messages in thread
From: Palmer Dabbelt @ 2021-10-27 22:12 UTC (permalink / raw)
To: Anup Patel
Cc: Paul Walmsley, aou, pbonzini, Atish Patra, anup, kvm, kvm-riscv,
linux-riscv, linux-kernel, Anup Patel
On Tue, 26 Oct 2021 10:01:34 PDT (-0700), Anup Patel wrote:
> Let's enable KVM RISC-V in RV64 and RV32 defconfigs as module
> so that it always built along with the default kernel image.
Turning on KVM in the defconfigs seems like the right way to go, but
this has more diff than just that. Not sure if that's all just
savedefconfig stuff, I usually try and split out the non-functional
changes from anything that makes a change.
If you checked then
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
assuming you want to keep these together. LMK if you want me to take
this on its own (I'll split it up if you do).
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> ---
> arch/riscv/configs/defconfig | 15 +++++++--------
> arch/riscv/configs/rv32_defconfig | 8 ++++----
> 2 files changed, 11 insertions(+), 12 deletions(-)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 4ebc80315f01..40506dfab5cf 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
> CONFIG_POSIX_MQUEUE=y
> CONFIG_NO_HZ_IDLE=y
> CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_BPF_SYSCALL=y
> CONFIG_IKCONFIG=y
> CONFIG_IKCONFIG_PROC=y
> CONFIG_CGROUPS=y
> @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
> CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> -CONFIG_BPF_SYSCALL=y
> +# CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_SOC_MICROCHIP_POLARFIRE=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> -CONFIG_SOC_MICROCHIP_POLARFIRE=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
> +CONFIG_VIRTUALIZATION=y
> +CONFIG_KVM=m
> CONFIG_JUMP_LABEL=y
> CONFIG_MODULES=y
> CONFIG_MODULE_UNLOAD=y
> @@ -68,14 +71,12 @@ CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> CONFIG_SPI=y
> CONFIG_SPI_SIFIVE=y
> +# CONFIG_PTP_1588_CLOCK is not set
> CONFIG_GPIOLIB=y
> CONFIG_GPIO_SIFIVE=y
> -# CONFIG_PTP_1588_CLOCK is not set
> -CONFIG_POWER_RESET=y
> CONFIG_DRM=y
> CONFIG_DRM_RADEON=y
> CONFIG_DRM_VIRTIO_GPU=y
> -CONFIG_FRAMEBUFFER_CONSOLE=y
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_PLATFORM=y
> @@ -85,10 +86,10 @@ CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> +CONFIG_MMC=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_PLTFM=y
> CONFIG_MMC_SDHCI_CADENCE=y
> -CONFIG_MMC=y
> CONFIG_MMC_SPI=y
> CONFIG_RTC_CLASS=y
> CONFIG_VIRTIO_PCI=y
> @@ -139,5 +140,3 @@ CONFIG_RCU_EQS_DEBUG=y
> # CONFIG_FTRACE is not set
> # CONFIG_RUNTIME_TESTING_MENU is not set
> CONFIG_MEMTEST=y
> -# CONFIG_SYSFS_SYSCALL is not set
> -CONFIG_EFI=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 434ef5b64599..44022e048efd 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
> CONFIG_POSIX_MQUEUE=y
> CONFIG_NO_HZ_IDLE=y
> CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_BPF_SYSCALL=y
> CONFIG_IKCONFIG=y
> CONFIG_IKCONFIG_PROC=y
> CONFIG_CGROUPS=y
> @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
> CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> -CONFIG_BPF_SYSCALL=y
> +# CONFIG_SYSFS_SYSCALL is not set
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
> +CONFIG_VIRTUALIZATION=y
> +CONFIG_KVM=m
> CONFIG_JUMP_LABEL=y
> CONFIG_MODULES=y
> CONFIG_MODULE_UNLOAD=y
> @@ -67,11 +70,9 @@ CONFIG_HW_RANDOM_VIRTIO=y
> CONFIG_SPI=y
> CONFIG_SPI_SIFIVE=y
> # CONFIG_PTP_1588_CLOCK is not set
> -CONFIG_POWER_RESET=y
> CONFIG_DRM=y
> CONFIG_DRM_RADEON=y
> CONFIG_DRM_VIRTIO_GPU=y
> -CONFIG_FRAMEBUFFER_CONSOLE=y
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_PLATFORM=y
> @@ -130,4 +131,3 @@ CONFIG_RCU_EQS_DEBUG=y
> # CONFIG_FTRACE is not set
> # CONFIG_RUNTIME_TESTING_MENU is not set
> CONFIG_MEMTEST=y
> -# CONFIG_SYSFS_SYSCALL is not set
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
2021-10-27 22:12 ` Palmer Dabbelt
@ 2021-10-27 23:01 ` Paolo Bonzini
2021-10-28 15:37 ` Anup Patel
1 sibling, 0 replies; 9+ messages in thread
From: Paolo Bonzini @ 2021-10-27 23:01 UTC (permalink / raw)
To: Palmer Dabbelt, Anup Patel
Cc: Paul Walmsley, aou, Atish Patra, anup, kvm, kvm-riscv,
linux-riscv, linux-kernel
On 28/10/21 00:12, Palmer Dabbelt wrote:
> On Tue, 26 Oct 2021 10:01:34 PDT (-0700), Anup Patel wrote:
>> Let's enable KVM RISC-V in RV64 and RV32 defconfigs as module
>> so that it always built along with the default kernel image.
>
> Turning on KVM in the defconfigs seems like the right way to go, but
> this has more diff than just that. Not sure if that's all just
> savedefconfig stuff, I usually try and split out the non-functional
> changes from anything that makes a change.
>
> If you checked then
>
> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
>
> assuming you want to keep these together. LMK if you want me to take
> this on its own (I'll split it up if you do).
I think it's easiest if you just merge it for -rc2 or something like that.
Paolo
>>
>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>> ---
>> arch/riscv/configs/defconfig | 15 +++++++--------
>> arch/riscv/configs/rv32_defconfig | 8 ++++----
>> 2 files changed, 11 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 4ebc80315f01..40506dfab5cf 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
>> CONFIG_POSIX_MQUEUE=y
>> CONFIG_NO_HZ_IDLE=y
>> CONFIG_HIGH_RES_TIMERS=y
>> +CONFIG_BPF_SYSCALL=y
>> CONFIG_IKCONFIG=y
>> CONFIG_IKCONFIG_PROC=y
>> CONFIG_CGROUPS=y
>> @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
>> CONFIG_CHECKPOINT_RESTORE=y
>> CONFIG_BLK_DEV_INITRD=y
>> CONFIG_EXPERT=y
>> -CONFIG_BPF_SYSCALL=y
>> +# CONFIG_SYSFS_SYSCALL is not set
>> +CONFIG_SOC_MICROCHIP_POLARFIRE=y
>> CONFIG_SOC_SIFIVE=y
>> CONFIG_SOC_VIRT=y
>> -CONFIG_SOC_MICROCHIP_POLARFIRE=y
>> CONFIG_SMP=y
>> CONFIG_HOTPLUG_CPU=y
>> +CONFIG_VIRTUALIZATION=y
>> +CONFIG_KVM=m
>> CONFIG_JUMP_LABEL=y
>> CONFIG_MODULES=y
>> CONFIG_MODULE_UNLOAD=y
>> @@ -68,14 +71,12 @@ CONFIG_HW_RANDOM=y
>> CONFIG_HW_RANDOM_VIRTIO=y
>> CONFIG_SPI=y
>> CONFIG_SPI_SIFIVE=y
>> +# CONFIG_PTP_1588_CLOCK is not set
>> CONFIG_GPIOLIB=y
>> CONFIG_GPIO_SIFIVE=y
>> -# CONFIG_PTP_1588_CLOCK is not set
>> -CONFIG_POWER_RESET=y
>> CONFIG_DRM=y
>> CONFIG_DRM_RADEON=y
>> CONFIG_DRM_VIRTIO_GPU=y
>> -CONFIG_FRAMEBUFFER_CONSOLE=y
>> CONFIG_USB=y
>> CONFIG_USB_XHCI_HCD=y
>> CONFIG_USB_XHCI_PLATFORM=y
>> @@ -85,10 +86,10 @@ CONFIG_USB_OHCI_HCD=y
>> CONFIG_USB_OHCI_HCD_PLATFORM=y
>> CONFIG_USB_STORAGE=y
>> CONFIG_USB_UAS=y
>> +CONFIG_MMC=y
>> CONFIG_MMC_SDHCI=y
>> CONFIG_MMC_SDHCI_PLTFM=y
>> CONFIG_MMC_SDHCI_CADENCE=y
>> -CONFIG_MMC=y
>> CONFIG_MMC_SPI=y
>> CONFIG_RTC_CLASS=y
>> CONFIG_VIRTIO_PCI=y
>> @@ -139,5 +140,3 @@ CONFIG_RCU_EQS_DEBUG=y
>> # CONFIG_FTRACE is not set
>> # CONFIG_RUNTIME_TESTING_MENU is not set
>> CONFIG_MEMTEST=y
>> -# CONFIG_SYSFS_SYSCALL is not set
>> -CONFIG_EFI=y
>> diff --git a/arch/riscv/configs/rv32_defconfig
>> b/arch/riscv/configs/rv32_defconfig
>> index 434ef5b64599..44022e048efd 100644
>> --- a/arch/riscv/configs/rv32_defconfig
>> +++ b/arch/riscv/configs/rv32_defconfig
>> @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
>> CONFIG_POSIX_MQUEUE=y
>> CONFIG_NO_HZ_IDLE=y
>> CONFIG_HIGH_RES_TIMERS=y
>> +CONFIG_BPF_SYSCALL=y
>> CONFIG_IKCONFIG=y
>> CONFIG_IKCONFIG_PROC=y
>> CONFIG_CGROUPS=y
>> @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
>> CONFIG_CHECKPOINT_RESTORE=y
>> CONFIG_BLK_DEV_INITRD=y
>> CONFIG_EXPERT=y
>> -CONFIG_BPF_SYSCALL=y
>> +# CONFIG_SYSFS_SYSCALL is not set
>> CONFIG_SOC_SIFIVE=y
>> CONFIG_SOC_VIRT=y
>> CONFIG_ARCH_RV32I=y
>> CONFIG_SMP=y
>> CONFIG_HOTPLUG_CPU=y
>> +CONFIG_VIRTUALIZATION=y
>> +CONFIG_KVM=m
>> CONFIG_JUMP_LABEL=y
>> CONFIG_MODULES=y
>> CONFIG_MODULE_UNLOAD=y
>> @@ -67,11 +70,9 @@ CONFIG_HW_RANDOM_VIRTIO=y
>> CONFIG_SPI=y
>> CONFIG_SPI_SIFIVE=y
>> # CONFIG_PTP_1588_CLOCK is not set
>> -CONFIG_POWER_RESET=y
>> CONFIG_DRM=y
>> CONFIG_DRM_RADEON=y
>> CONFIG_DRM_VIRTIO_GPU=y
>> -CONFIG_FRAMEBUFFER_CONSOLE=y
>> CONFIG_USB=y
>> CONFIG_USB_XHCI_HCD=y
>> CONFIG_USB_XHCI_PLATFORM=y
>> @@ -130,4 +131,3 @@ CONFIG_RCU_EQS_DEBUG=y
>> # CONFIG_FTRACE is not set
>> # CONFIG_RUNTIME_TESTING_MENU is not set
>> CONFIG_MEMTEST=y
>> -# CONFIG_SYSFS_SYSCALL is not set
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] RISC-V: KVM: Few assorted changes
2021-10-26 17:01 [PATCH 0/3] RISC-V: KVM: Few assorted changes Anup Patel
` (2 preceding siblings ...)
2021-10-26 17:01 ` [PATCH 3/3] RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions Anup Patel
@ 2021-10-28 14:07 ` Paolo Bonzini
2021-10-28 15:05 ` Palmer Dabbelt
3 siblings, 1 reply; 9+ messages in thread
From: Paolo Bonzini @ 2021-10-28 14:07 UTC (permalink / raw)
To: Anup Patel, Palmer Dabbelt, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Atish Patra, Anup Patel, kvm, kvm-riscv, linux-riscv, linux-kernel
On 26/10/21 19:01, Anup Patel wrote:
> I had a few assorted KVM RISC-V changes which I wanted to sent after
> KVM RISC-V was merged hence this series.
>
> These patches can also be found in riscv_kvm_assorted_v1 branch at:
> https://github.com/avpatel/linux.git
>
> Anup Patel (3):
> RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
> RISC-V: KVM: Factor-out FP virtualization into separate sources
> RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions
>
> arch/riscv/configs/defconfig | 15 ++-
> arch/riscv/configs/rv32_defconfig | 8 +-
> arch/riscv/include/asm/kvm_host.h | 10 +-
> arch/riscv/include/asm/kvm_vcpu_fp.h | 59 +++++++++
> arch/riscv/kvm/Makefile | 1 +
> arch/riscv/kvm/tlb.S | 4 +-
> arch/riscv/kvm/vcpu.c | 172 ---------------------------
> arch/riscv/kvm/vcpu_fp.c | 167 ++++++++++++++++++++++++++
> 8 files changed, 244 insertions(+), 192 deletions(-)
> create mode 100644 arch/riscv/include/asm/kvm_vcpu_fp.h
> create mode 100644 arch/riscv/kvm/vcpu_fp.c
>
Queued 2+3, thanks.
Paolo
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] RISC-V: KVM: Few assorted changes
2021-10-28 14:07 ` [PATCH 0/3] RISC-V: KVM: Few assorted changes Paolo Bonzini
@ 2021-10-28 15:05 ` Palmer Dabbelt
0 siblings, 0 replies; 9+ messages in thread
From: Palmer Dabbelt @ 2021-10-28 15:05 UTC (permalink / raw)
To: pbonzini
Cc: Anup Patel, Paul Walmsley, aou, Atish Patra, anup, kvm,
kvm-riscv, linux-riscv, linux-kernel
On Thu, 28 Oct 2021 07:07:33 PDT (-0700), pbonzini@redhat.com wrote:
> On 26/10/21 19:01, Anup Patel wrote:
>> I had a few assorted KVM RISC-V changes which I wanted to sent after
>> KVM RISC-V was merged hence this series.
>>
>> These patches can also be found in riscv_kvm_assorted_v1 branch at:
>> https://github.com/avpatel/linux.git
>>
>> Anup Patel (3):
>> RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
>> RISC-V: KVM: Factor-out FP virtualization into separate sources
>> RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions
>>
>> arch/riscv/configs/defconfig | 15 ++-
>> arch/riscv/configs/rv32_defconfig | 8 +-
>> arch/riscv/include/asm/kvm_host.h | 10 +-
>> arch/riscv/include/asm/kvm_vcpu_fp.h | 59 +++++++++
>> arch/riscv/kvm/Makefile | 1 +
>> arch/riscv/kvm/tlb.S | 4 +-
>> arch/riscv/kvm/vcpu.c | 172 ---------------------------
>> arch/riscv/kvm/vcpu_fp.c | 167 ++++++++++++++++++++++++++
>> 8 files changed, 244 insertions(+), 192 deletions(-)
>> create mode 100644 arch/riscv/include/asm/kvm_vcpu_fp.h
>> create mode 100644 arch/riscv/kvm/vcpu_fp.c
>>
>
> Queued 2+3, thanks.
Thanks. I'll pick up 1, as per the thread.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module
2021-10-27 22:12 ` Palmer Dabbelt
2021-10-27 23:01 ` Paolo Bonzini
@ 2021-10-28 15:37 ` Anup Patel
1 sibling, 0 replies; 9+ messages in thread
From: Anup Patel @ 2021-10-28 15:37 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Anup Patel, Paul Walmsley, Albert Ou, Paolo Bonzini, Atish Patra,
KVM General, kvm-riscv, linux-riscv,
linux-kernel@vger.kernel.org List
On Thu, Oct 28, 2021 at 3:42 AM Palmer Dabbelt <palmerdabbelt@google.com> wrote:
>
> On Tue, 26 Oct 2021 10:01:34 PDT (-0700), Anup Patel wrote:
> > Let's enable KVM RISC-V in RV64 and RV32 defconfigs as module
> > so that it always built along with the default kernel image.
>
> Turning on KVM in the defconfigs seems like the right way to go, but
> this has more diff than just that. Not sure if that's all just
> savedefconfig stuff, I usually try and split out the non-functional
> changes from anything that makes a change.
Other diffs in the defconfigs are generated by "make savedefconfig". I
guess this is because most people don't use "make savedefconfig"
to generate updated defconfigs.
>
> If you checked then
>
> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
>
> assuming you want to keep these together. LMK if you want me to take
> this on its own (I'll split it up if you do).
Thanks Palmer.
Regards,
Anup
>
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > ---
> > arch/riscv/configs/defconfig | 15 +++++++--------
> > arch/riscv/configs/rv32_defconfig | 8 ++++----
> > 2 files changed, 11 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index 4ebc80315f01..40506dfab5cf 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
> > CONFIG_POSIX_MQUEUE=y
> > CONFIG_NO_HZ_IDLE=y
> > CONFIG_HIGH_RES_TIMERS=y
> > +CONFIG_BPF_SYSCALL=y
> > CONFIG_IKCONFIG=y
> > CONFIG_IKCONFIG_PROC=y
> > CONFIG_CGROUPS=y
> > @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
> > CONFIG_CHECKPOINT_RESTORE=y
> > CONFIG_BLK_DEV_INITRD=y
> > CONFIG_EXPERT=y
> > -CONFIG_BPF_SYSCALL=y
> > +# CONFIG_SYSFS_SYSCALL is not set
> > +CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_VIRT=y
> > -CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_VIRTUALIZATION=y
> > +CONFIG_KVM=m
> > CONFIG_JUMP_LABEL=y
> > CONFIG_MODULES=y
> > CONFIG_MODULE_UNLOAD=y
> > @@ -68,14 +71,12 @@ CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > CONFIG_SPI=y
> > CONFIG_SPI_SIFIVE=y
> > +# CONFIG_PTP_1588_CLOCK is not set
> > CONFIG_GPIOLIB=y
> > CONFIG_GPIO_SIFIVE=y
> > -# CONFIG_PTP_1588_CLOCK is not set
> > -CONFIG_POWER_RESET=y
> > CONFIG_DRM=y
> > CONFIG_DRM_RADEON=y
> > CONFIG_DRM_VIRTIO_GPU=y
> > -CONFIG_FRAMEBUFFER_CONSOLE=y
> > CONFIG_USB=y
> > CONFIG_USB_XHCI_HCD=y
> > CONFIG_USB_XHCI_PLATFORM=y
> > @@ -85,10 +86,10 @@ CONFIG_USB_OHCI_HCD=y
> > CONFIG_USB_OHCI_HCD_PLATFORM=y
> > CONFIG_USB_STORAGE=y
> > CONFIG_USB_UAS=y
> > +CONFIG_MMC=y
> > CONFIG_MMC_SDHCI=y
> > CONFIG_MMC_SDHCI_PLTFM=y
> > CONFIG_MMC_SDHCI_CADENCE=y
> > -CONFIG_MMC=y
> > CONFIG_MMC_SPI=y
> > CONFIG_RTC_CLASS=y
> > CONFIG_VIRTIO_PCI=y
> > @@ -139,5 +140,3 @@ CONFIG_RCU_EQS_DEBUG=y
> > # CONFIG_FTRACE is not set
> > # CONFIG_RUNTIME_TESTING_MENU is not set
> > CONFIG_MEMTEST=y
> > -# CONFIG_SYSFS_SYSCALL is not set
> > -CONFIG_EFI=y
> > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> > index 434ef5b64599..44022e048efd 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
> > @@ -2,6 +2,7 @@ CONFIG_SYSVIPC=y
> > CONFIG_POSIX_MQUEUE=y
> > CONFIG_NO_HZ_IDLE=y
> > CONFIG_HIGH_RES_TIMERS=y
> > +CONFIG_BPF_SYSCALL=y
> > CONFIG_IKCONFIG=y
> > CONFIG_IKCONFIG_PROC=y
> > CONFIG_CGROUPS=y
> > @@ -13,12 +14,14 @@ CONFIG_USER_NS=y
> > CONFIG_CHECKPOINT_RESTORE=y
> > CONFIG_BLK_DEV_INITRD=y
> > CONFIG_EXPERT=y
> > -CONFIG_BPF_SYSCALL=y
> > +# CONFIG_SYSFS_SYSCALL is not set
> > CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_VIRT=y
> > CONFIG_ARCH_RV32I=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_VIRTUALIZATION=y
> > +CONFIG_KVM=m
> > CONFIG_JUMP_LABEL=y
> > CONFIG_MODULES=y
> > CONFIG_MODULE_UNLOAD=y
> > @@ -67,11 +70,9 @@ CONFIG_HW_RANDOM_VIRTIO=y
> > CONFIG_SPI=y
> > CONFIG_SPI_SIFIVE=y
> > # CONFIG_PTP_1588_CLOCK is not set
> > -CONFIG_POWER_RESET=y
> > CONFIG_DRM=y
> > CONFIG_DRM_RADEON=y
> > CONFIG_DRM_VIRTIO_GPU=y
> > -CONFIG_FRAMEBUFFER_CONSOLE=y
> > CONFIG_USB=y
> > CONFIG_USB_XHCI_HCD=y
> > CONFIG_USB_XHCI_PLATFORM=y
> > @@ -130,4 +131,3 @@ CONFIG_RCU_EQS_DEBUG=y
> > # CONFIG_FTRACE is not set
> > # CONFIG_RUNTIME_TESTING_MENU is not set
> > CONFIG_MEMTEST=y
> > -# CONFIG_SYSFS_SYSCALL is not set
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-10-28 15:37 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-26 17:01 [PATCH 0/3] RISC-V: KVM: Few assorted changes Anup Patel
2021-10-26 17:01 ` [PATCH 1/3] RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module Anup Patel
2021-10-27 22:12 ` Palmer Dabbelt
2021-10-27 23:01 ` Paolo Bonzini
2021-10-28 15:37 ` Anup Patel
2021-10-26 17:01 ` [PATCH 2/3] RISC-V: KVM: Factor-out FP virtualization into separate sources Anup Patel
2021-10-26 17:01 ` [PATCH 3/3] RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz() functions Anup Patel
2021-10-28 14:07 ` [PATCH 0/3] RISC-V: KVM: Few assorted changes Paolo Bonzini
2021-10-28 15:05 ` Palmer Dabbelt
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