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From: Auger Eric <eric.auger@redhat.com>
To: Andrew Jones <drjones@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: kvm-devel <kvm@vger.kernel.org>, Marc Zyngier <maz@kernel.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	Andre Przywara <andre.przywara@arm.com>,
	Andrew Murray <andrew.murray@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	Eric Auger <eric.auger.pro@gmail.com>
Subject: Re: [kvm-unit-tests PATCH v2 0/9] KVM: arm64: PMUv3 Event Counter Tests
Date: Tue, 11 Feb 2020 19:23:29 +0100
Message-ID: <7daa10bc-178d-48a1-aee4-a8edcaf37bc3@redhat.com> (raw)
In-Reply-To: <20200211160733.zbqh3vbscdfgkkcd@kamzik.brq.redhat.com>



On 2/11/20 5:07 PM, Andrew Jones wrote:
> On Tue, Feb 11, 2020 at 03:42:38PM +0000, Peter Maydell wrote:
>> On Thu, 30 Jan 2020 at 11:25, Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>> This series implements tests exercising the PMUv3 event counters.
>>> It tests both the 32-bit and 64-bit versions. Overflow interrupts
>>> also are checked. Those tests only are written for arm64.
>>>
>>> It allowed to reveal some issues related to SW_INCR implementation
>>> (esp. related to 64-bit implementation), some problems related to
>>> 32-bit <-> 64-bit transitions and consistency of enabled states
>>> of odd and event counters (See [1]).
>>>
>>> Overflow interrupt testing relies of one patch from Andre
>>> ("arm: gic: Provide per-IRQ helper functions") to enable the
>>> PPI 23, coming from "arm: gic: Test SPIs and interrupt groups"
>>> (https://patchwork.kernel.org/cover/11234975/). Drew kindly
>>> provided "arm64: Provide read/write_sysreg_s".
>>>
>>> All PMU tests can be launched with:
>>> ./run_tests.sh -g pmu
>>> Tests also can be launched individually. For example:
>>> ./arm-run arm/pmu.flat -append 'chained-sw-incr'
>>>
>>> With KVM:
>>> - chain-promotion and chained-sw-incr are known to be failing.
>>>   [1] proposed a fix.
>>> - On TX2, I have some random failures due to MEM_ACCESS event
>>>   measured with a great disparity. This is not observed on
>>>   other machines I have access to.
>>> With TCG:
>>> - all new tests are skipped
>>
>> I'm having a go at using this patchset to test the support
>> I'm adding for TCG for the v8.1 and v8.4 PMU extensions...
>>
>> Q1: how can I get run_tests.sh to pass extra arguments to
>> QEMU ? The PMU events check will fail unless QEMU gets
>> the '-icount 8' to enable cycle-counting, but although
>> the underlying ./arm/run lets you add arbitrary extra
>> arguments to QEMU, run_tests.sh doesn't seem to. Trying to
>> pass them in via "QEMU=/path/to/qemu -icount 8" doesn't
>> work either.
int arm/unittests.cfg

there are tests related to TCG that are commented.

# Test PMU support (TCG) with -icount IPC=256
#[pmu-tcg-icount-256]
#file = pmu.flat
#extra_params = -icount 8 -append 'cycle-counter 256'
#groups = pmu
#accel = tcg

I wondered why we kept those and commented. Should we start with
separate tests for KVM and TCG?

> 
> Alex Bennee once submit a patch[*] allowing that to work, but
> it never got merged. I just rebased it and tried it, but it
> doesn't work now. Too much has changed in the run scripts
> since his posting. I can try to rework it though.
> 
> [*] https://github.com/rhdrjones/kvm-unit-tests/commit/9a8574bfd924f3e865611688e26bb12e53821747
> 
>>
>> Q2: do you know why arm/pmu.c:check_pmcr() insists that
>> PMCR.IMP is non-zero? The comment says "simple sanity check",
>> but architecturally a zero IMP field is permitted (meaning
>> "go look at MIDR_EL1 instead"). This causes TCG to fail this
>> test on '-cpu max', because in that case we set PMCR.IMP
>> to the same thing as MIDR_EL1.Implementer which is 0
>> ("software use", since QEMU is software...)
indeed
> 
> Probably just a misunderstanding on the part of the author (and
> reviewers). Maybe Eric can fix that while preparing this series.

Yes I can definitively fix that

Thanks

Eric
> 
> Thanks,
> drew
> 

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Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-30 11:25 Eric Auger
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 1/9] arm64: Provide read/write_sysreg_s Eric Auger
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 2/9] arm: pmu: Let pmu tests take a sub-test parameter Eric Auger
2020-03-04 18:01   ` Andre Przywara
2020-03-05  8:44   ` Andrew Jones
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 3/9] arm: pmu: Add a pmu struct Eric Auger
2020-03-04 18:02   ` Andre Przywara
2020-03-04 18:21     ` Auger Eric
2020-03-05  8:53   ` Andrew Jones
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 4/9] arm: pmu: Check Required Event Support Eric Auger
2020-02-11 15:33   ` Peter Maydell
2020-02-11 18:08     ` Auger Eric
2020-02-11 16:28   ` Peter Maydell
2020-02-11 18:32     ` Auger Eric
2020-03-04 18:02   ` Andre Przywara
2020-03-05  9:04   ` Andrew Jones
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 5/9] arm: pmu: Basic event counter Tests Eric Auger
2020-02-11 16:27   ` Peter Maydell
2020-02-11 18:31     ` Auger Eric
2020-03-04 18:03   ` Andre Przywara
2020-03-05  9:33   ` Andrew Jones
2020-03-12 11:19     ` Auger Eric
2020-03-05  9:42   ` Andrew Jones
2020-03-12 11:16     ` Auger Eric
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 6/9] arm: pmu: Test chained counter Eric Auger
2020-02-11 16:24   ` Peter Maydell
2020-02-11 18:30     ` Auger Eric
2020-03-05  9:37   ` Andrew Jones
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 7/9] arm: pmu: test 32-bit <-> 64-bit transitions Eric Auger
2020-03-05  9:50   ` Andrew Jones
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 8/9] arm: gic: Provide per-IRQ helper functions Eric Auger
2020-03-05  9:55   ` Andrew Jones
2020-03-05 11:10     ` Alexandru Elisei
2020-01-30 11:25 ` [kvm-unit-tests PATCH v2 9/9] arm: pmu: Test overflow interrupts Eric Auger
2020-03-05 10:17   ` Andrew Jones
2020-02-11 15:42 ` [kvm-unit-tests PATCH v2 0/9] KVM: arm64: PMUv3 Event Counter Tests Peter Maydell
2020-02-11 16:07   ` Andrew Jones
2020-02-11 18:23     ` Auger Eric [this message]

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