From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: narmstrong@baylibre.com, jbrunet@baylibre.com,
robh+dt@kernel.org, mark.rutland@arm.com,
linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b
Date: Sat, 21 Sep 2019 17:18:29 +0200 [thread overview]
Message-ID: <20190921151835.770263-1-martin.blumenstingl@googlemail.com> (raw)
Meson8 and Meson8b SoCs embed a DDR clock controller in their MMCBUS
registers. This series:
- adds support for this DDR clock controller (patches 0 and 1)
- wires up the DDR PLL as input for two audio clocks (patches 2 and 3)
- adds the DDR clock controller to meson8.dtsi and meson8b.dtsi
Special thanks go out to Alexandre Mergnat for switching the Amlogic
clock drivers over to parent_hws and parent_data. That made this series
a lot easier for me!
This series depends on my other series from [0]:
"provide the XTAL clock via OF on Meson8/8b/8m2"
[0] https://patchwork.kernel.org/cover/11155515/
Martin Blumenstingl (6):
dt-bindings: clock: add the Amlogic Meson8 DDR clock controller
binding
clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller
clk: meson: meson8b: use of_clk_hw_register to register the clocks
clk: meson: meson8b: add the ddr_pll input for the audio clocks
ARM: dts: meson8: add the DDR clock controller
ARM: dts: meson8b: add the DDR clock controller
.../clock/amlogic,meson8-ddr-clkc.yaml | 50 ++++++
arch/arm/boot/dts/meson8.dtsi | 13 +-
arch/arm/boot/dts/meson8b.dtsi | 13 +-
drivers/clk/meson/Makefile | 2 +-
drivers/clk/meson/meson8-ddr.c | 153 ++++++++++++++++++
drivers/clk/meson/meson8b.c | 36 ++---
include/dt-bindings/clock/meson8-ddr-clkc.h | 4 +
7 files changed, 245 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml
create mode 100644 drivers/clk/meson/meson8-ddr.c
create mode 100644 include/dt-bindings/clock/meson8-ddr-clkc.h
--
2.23.0
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next reply other threads:[~2019-09-21 15:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-21 15:18 Martin Blumenstingl [this message]
2019-09-21 15:18 ` [PATCH 1/6] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Martin Blumenstingl
2019-10-02 14:19 ` Rob Herring
2019-09-21 15:18 ` [PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller Martin Blumenstingl
2019-10-01 13:29 ` Jerome Brunet
2019-10-01 18:53 ` Martin Blumenstingl
2019-10-02 9:04 ` Jerome Brunet
2019-09-21 15:18 ` [PATCH 3/6] clk: meson: meson8b: use of_clk_hw_register to register the clocks Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 4/6] clk: meson: meson8b: add the ddr_pll input for the audio clocks Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 5/6] ARM: dts: meson8: add the DDR clock controller Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 6/6] ARM: dts: meson8b: " Martin Blumenstingl
2019-09-23 10:06 ` [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b Jerome Brunet
2019-09-23 20:49 ` Martin Blumenstingl
2019-10-01 13:33 ` Jerome Brunet
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