From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: narmstrong@baylibre.com, jbrunet@baylibre.com,
robh+dt@kernel.org, mark.rutland@arm.com,
linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: [PATCH 3/6] clk: meson: meson8b: use of_clk_hw_register to register the clocks
Date: Sat, 21 Sep 2019 17:18:32 +0200 [thread overview]
Message-ID: <20190921151835.770263-4-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20190921151835.770263-1-martin.blumenstingl@googlemail.com>
Switch from clk_hw_register to of_clk_hw_register so we can use
clk_parent_data.fw_name. This will be used to get the "xtal", "ddr_pll"
and possibly others from the .dtb.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
drivers/clk/meson/meson8b.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 15ec14fde2a0..fefb4b7185d0 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -3696,7 +3696,7 @@ static void __init meson8b_clkc_init_common(struct device_node *np,
if (!clk_hw_onecell_data->hws[i])
continue;
- ret = clk_hw_register(NULL, clk_hw_onecell_data->hws[i]);
+ ret = of_clk_hw_register(np, clk_hw_onecell_data->hws[i]);
if (ret)
return;
}
--
2.23.0
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next prev parent reply other threads:[~2019-09-21 15:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-21 15:18 [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 1/6] dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Martin Blumenstingl
2019-10-02 14:19 ` Rob Herring
2019-09-21 15:18 ` [PATCH 2/6] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller Martin Blumenstingl
2019-10-01 13:29 ` Jerome Brunet
2019-10-01 18:53 ` Martin Blumenstingl
2019-10-02 9:04 ` Jerome Brunet
2019-09-21 15:18 ` Martin Blumenstingl [this message]
2019-09-21 15:18 ` [PATCH 4/6] clk: meson: meson8b: add the ddr_pll input for the audio clocks Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 5/6] ARM: dts: meson8: add the DDR clock controller Martin Blumenstingl
2019-09-21 15:18 ` [PATCH 6/6] ARM: dts: meson8b: " Martin Blumenstingl
2019-09-23 10:06 ` [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b Jerome Brunet
2019-09-23 20:49 ` Martin Blumenstingl
2019-10-01 13:33 ` Jerome Brunet
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