[PATCH 0/2] arm64: dts: g12a/g12b: add the Ethernet PHY GPIO IRQs

[PATCH 0/2] arm64: dts: g12a/g12b: add the Ethernet PHY GPIO IRQs

[Martin Blumenstingl]

Avoid polling of the PHY status by passing the Ethernet PHY's GPIO
interrupt line to the PHY node.

I tested this successfully on my X96 Max, but I don't have an Odroid-N2
to test it there. The reset and interrupt GPIO part of the schematics
seems to be identical for both boards (and probably other "reference
design" based boards as well).

This depends on two of my other series:
1. "irqchip/meson-gpio: Add support for Meson-G12A SoC" from [0]
2. "Ethernet PHY reset GPIO updates for Amlogic SoCs" from [1]


[0] https://patchwork.kernel.org/cover/10983339/
[1] https://patchwork.kernel.org/cover/10985155/


Martin Blumenstingl (2):
  arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt
    line
  arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line

 arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts   | 4 ++++
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
 2 files changed, 8 insertions(+)

-- 
2.22.0


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[PATCH 1/2] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt line

[Martin Blumenstingl]

The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad.
Describe this in the device tree so the PHY framework doesn't have to
poll the PHY status.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index 0d9ec45b8059..8c9535880007 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -190,6 +190,10 @@
 		reset-assert-us = <10000>;
 		reset-deassert-us = <10000>;
 		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+		interrupt-parent = <&gpio_intc>;
+		/* MAC_INTR on GPIOZ_14 */
+		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
-- 
2.22.0


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[PATCH 2/2] arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line

[Martin Blumenstingl]

X96 Max has the PHY reset and interrupt lines are identical to the
Odroid-N2:
- GPIOZ_14 is the interrupt on X96 Max
- GPIOZ_15 is the reset line on X96 Max

Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to
poll for the PHY status.

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 24956edaf8e2..e3f3f37d3081 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -180,6 +180,10 @@
 		reset-assert-us = <10000>;
 		reset-deassert-us = <10000>;
 		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+
+		interrupt-parent = <&gpio_intc>;
+		/* MAC_INTR on GPIOZ_14 */
+		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
-- 
2.22.0


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Re: [PATCH 1/2] arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt line

[Neil Armstrong]

On 10/06/2019 18:45, Martin Blumenstingl wrote:
> The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad.
> Describe this in the device tree so the PHY framework doesn't have to
> poll the PHY status.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> index 0d9ec45b8059..8c9535880007 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> @@ -190,6 +190,10 @@
>  		reset-assert-us = <10000>;
>  		reset-deassert-us = <10000>;
>  		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
> +
> +		interrupt-parent = <&gpio_intc>;
> +		/* MAC_INTR on GPIOZ_14 */
> +		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
>  	};
>  };
>  
>

[   13.505835] RTL8211F Gigabit Ethernet 0.0:00: attached PHY driver [RTL8211F Gigabit Ethernet] (mii_bus:phy_addr=0.0:00, irq=26)


# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3       CPU4       CPU5
...
 26:          3          0          0          0          0          0  meson-gpio-irqchip  26 Level     0.0:00
...


Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

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Re: [PATCH 2/2] arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line

[Neil Armstrong]

On 10/06/2019 18:45, Martin Blumenstingl wrote:
> X96 Max has the PHY reset and interrupt lines are identical to the
> Odroid-N2:
> - GPIOZ_14 is the interrupt on X96 Max
> - GPIOZ_15 is the reset line on X96 Max
> 
> Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to
> poll for the PHY status.
> 
> Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
> index 24956edaf8e2..e3f3f37d3081 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
> @@ -180,6 +180,10 @@
>  		reset-assert-us = <10000>;
>  		reset-deassert-us = <10000>;
>  		reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
> +
> +		interrupt-parent = <&gpio_intc>;
> +		/* MAC_INTR on GPIOZ_14 */
> +		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
>  	};
>  };
>  
> 


[   46.844307] RTL8211F Gigabit Ethernet 0.0:00: attached PHY driver [RTL8211F Gigabit Ethernet] (mii_bus:phy_addr=0.0:00, irq=28)

# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
...
 28:          5          0          0          0  meson-gpio-irqchip  26 Level     0.0:00
...


Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

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